DE3570547D1 - Dynamic memory element and its use in a master slave flipflop and in programmable sequential circuits - Google Patents

Dynamic memory element and its use in a master slave flipflop and in programmable sequential circuits

Info

Publication number
DE3570547D1
DE3570547D1 DE8585402179T DE3570547T DE3570547D1 DE 3570547 D1 DE3570547 D1 DE 3570547D1 DE 8585402179 T DE8585402179 T DE 8585402179T DE 3570547 T DE3570547 T DE 3570547T DE 3570547 D1 DE3570547 D1 DE 3570547D1
Authority
DE
Germany
Prior art keywords
memory element
dynamic memory
master slave
sequential circuits
slave flipflop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585402179T
Other languages
English (en)
Inventor
Ngu Tung Pham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Application granted granted Critical
Publication of DE3570547D1 publication Critical patent/DE3570547D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/3562Bistable circuits of the master-slave type

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
DE8585402179T 1984-11-16 1985-11-12 Dynamic memory element and its use in a master slave flipflop and in programmable sequential circuits Expired DE3570547D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8417557A FR2573561B1 (fr) 1984-11-16 1984-11-16 Element de memoire dynamique, bascule maitre-esclave et circuits sequentiels programmables utilisant cet element de memoire dynamique

Publications (1)

Publication Number Publication Date
DE3570547D1 true DE3570547D1 (en) 1989-06-29

Family

ID=9309692

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585402179T Expired DE3570547D1 (en) 1984-11-16 1985-11-12 Dynamic memory element and its use in a master slave flipflop and in programmable sequential circuits

Country Status (3)

Country Link
EP (1) EP0186533B1 (de)
DE (1) DE3570547D1 (de)
FR (1) FR2573561B1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2595520B1 (fr) * 1986-03-07 1993-09-10 Thomson Csf Compteur binaire elementaire, compteur binaire synchrone et diviseur de frequence mettant en oeuvre ce compteur elementaire
FR2736746B1 (fr) * 1995-07-13 1997-08-22 Sgs Thomson Microelectronics Circuit de memorisation d'etats
WO2004036588A1 (fr) * 2002-10-21 2004-04-29 Victor Nikolaevich Mourachev Dispositif fonctionnel dynamique sequentiel
WO2006132560A1 (fr) * 2005-06-06 2006-12-14 Victor Nikolaevich Mourachev Dispositif fonctionnel dynamique seriel

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3395291A (en) * 1965-09-07 1968-07-30 Gen Micro Electronics Inc Circuit employing a transistor as a load element
JPS5534348A (en) * 1978-08-31 1980-03-10 Fujitsu Ltd Semiconductor memory device
JPS5895870A (ja) * 1981-11-30 1983-06-07 Mitsubishi Electric Corp シヨツトキバリア形電界効果トランジスタ

Also Published As

Publication number Publication date
EP0186533B1 (de) 1989-05-24
FR2573561A1 (fr) 1986-05-23
EP0186533A1 (de) 1986-07-02
FR2573561B1 (fr) 1989-06-16

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee