DE3521992A1 - COMPUTER WITH A MICROADDRESS PROGRAMMER FOR ADDRESSING A TAX MEMORY - Google Patents

Description

PATENTANWÄLTE ZENZ & HELBEP- D 430O ¹ ES ¹ SEN 1 · AM RUHRSTEIN 1 · TEL .: (0201) 4126

RATIONAL
1501 Salado Drive, Mountain View, California 94043, V.St, A.

Computer with microaddress programmer for addressing a control memory

The invention relates generally to the field of those using microcode Digital computer and in particular a computer with a microaddress program or sequencer for addressing a control memory that provides microinstructions for the computer.

Microcodes are widely used in digital computers of all sizes. (Instead of the term "microcode", "microcode instructions", " Microprograms "and other terms are used.) In general, the microcode makes use of sub-operations, which are not normally accessible to the computer programmer. The microcode is common in microprocessors permanently determined by mask programming on a chip. In larger computers are used to store the microcode Read-only memory or direct access memory is used, The latter are often referred to as Writable Control Stores (WCS). There are numerous integrated circuits specially designed to store and implement microcode. For example, microprogramers, which generate addresses for accessing the microcode, available in numerous configurations. Other registers, pipeline registers, Condition code multiplexers, sequential address controllers, etc. are also available.

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Hardware problems found with microcoded computers, which mainly occur where long microcode command words are used and the computer is made on multiple printed circuit cards are in conjunction with Figure 1 discussed. In general, this includes difficulties in dissipating heat from a WCS and diagnostic problems with larger ones Systems.

Relevant prior art for the present invention is, for example, in the manufacturer's data books for commercial available components in microcoded computers, for example in "Bipolar Micropocessor Logic and Interface", 1983 Data Book, Advanced Microdevices, pages 5-108 to 5-139 and 8-2 2 to 8-26.

Some known computers use two levels of control storage. The sequencer addresses a vertical memory (generally a deep but narrow word length memory). This vertical memory supplies addresses for separate horizontal memories (each generally flat memories with large word lengths). In some cases it will the output of the vertical memory is divided into horizontal memories on different cards. The size Word length from the horizontal memories forms the control signal (e.g. microinstructions). This arrangement is used for optimization the utilization of the storage capacity. It has the disadvantage that it has an additional cycle for the delivery of the Addresses required for the horizontal storage.

The invention is for use in a computer with a microaddress programmer for the sequence control of a control memory (a level or a level) is provided, which provides microinstructions for the computer. There are several according to the invention

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Control memory provided physically separated from each other. The microcode address signals from the programmer are distributed to the separate control stores via a bus. To this In this way, the heat from the control store is distributed to several different locations in the computer. You can also take diagnostic measures for each card carrying a control memory can be carried out practically independently of the rest of the computer.

In the following, the invention is explained in more detail in comparison to the prior art. In the drawing show:

Fig. 1 is a block diagram of part of a known one

Calculator with a single level writable control store; and

Figure 2 is a block diagram of a portion of a computer embodying the invention.

An improved digital computer system employing microcode will now be described. In the following In the description, numerous specific details, e.g., specific word lengths, etc., are given to make the invention better to make understandable. However, it is clear to the person skilled in the art that the invention can also be implemented without these particular details can be realized. In other instances, well known circuits are shown in block form in order to implement the present invention not to burden with unnecessary details.

In the typical known computer shown in FIG. 1 using a microcode in one level or in one Level is a command register 11 with the data bus 10 of the Connected to the computer. A portion of the instruction from register 11 is used as an input to microprogram 12. The programmer receives others in the typical order

Input signals, ζ. B. conditional input signals that are not shown in FIG. The programmer 12 delivers to the WCS 13 an address. The output of the WCS is applied to a microcode command register 14, the signals of which are numerous Control aspects of computer operation. The register 14 is also connected to a diagnosis and WCS control unit 15, the Signals to the command register 11 supplies.

Heat dissipation is an inherent problem in the WCS of the arrangement according to FIG. 1, especially when a long microinstruction word is used. The WCS is often made from static RAMs, as these components have shorter access times to have. For purposes of illustration, assume that the WCS provides a 6 4-bit microinstruction word to register 14 and 16k Saves words. If static 16k RAM's are used, 64 chips are required. Generate these static RAM's more heat than most other integrated circuits and therefore create a hot spot or spot. To have to Measures are taken to dissipate the additional heat from the WCS.

For diagnostic purposes, special commands can be sent from the control unit entered into register 11. Microinstructions specially designed for test purposes can be made available at register 14 will. During the test, the entire microcode system according to FIG. 1 must be able to take effect. An effective test is just one Part of a calculator occurs at any point in time, i.e. the output of register 14 may cause the circuit to occur one card and then the next card, etc. The long microinstruction word from register 14 is typically distributed over the computer. This distribution bus must be OK for the test to run. One problem with one Connection element which supplies part or all of the output signal of the register 14 from a printed circuit board

distributed by another can prevent the termination of the diagnostic routines.

For the purposes of the invention, the precise mode of operation of the computer is of no essential importance; however, it is worth knowing that the computer is on some printed circuit cards (e.g. a memory card, a programmer card, a VAL card and a system interface card). The computer uses a microcode with a word length of approximately 200 bits (16k words). The above with reference to known The problem described in the computer becomes of course with larger word lengths, for example in the order of 200 Bits significantly reinforced.

In the invention, the microcode address is provided by the programmer (sequencer) distributed over several separate writable control memories. This is a deviation from that known computer according to FIG. 1, in which the programmer 12 provides an address to a single writable control store (which generally has several on a single card having grouped circuits). The invention divides the microaddress instead of the microinstruction. It should be noted that even with known computers with micro-coded memories in two levels or levels, the first level or the first Level of addresses is not distributed or divided.

The computer with which the invention is used is made on several printed circuit boards, one of which three are shown in FIG. 2 as cards 1, 2 and 3. The dashed Lines 24 and 26 are used to illustrate the demarcation between the physically spaced printed circuit boards. The special division of the computer into separate Maps is not critical to the invention; for example, one card can be a storage system, another an ALU and

a third card can contain input / output logic. In Fig. 1 only the device for microaddress distribution and the associated hardware is shown, i.e. the circuit controlled by the microinstruction is not shown. Also conditional Feedback paths to the programmer 22 are not illustrated.

In the invention, as in the prior art, a microprogram is used (follow) encoder 22 used. The output of the programmer However, (micro addresses) is distributed to cards 1, 2 and 3 of the computer by a bus 20. The micro address bus is with coupled to a multiplexer 30 on each card of the computer using a microcode. The output of the writable Control memory is connected to a microinstruction register 34, the output of which in a conventional manner for controlling numerous Functions on the card is used. In the described embodiment, the WCS 32 is activated upon initiation loaded serially from the diagnostic controller by microinstruction register 34 over line 42.

In the invention, the writable control memory (first level or first level) is divided into several separate memories, one of which is arranged on each of the printed circuit cards shown in FIG. The one for a special Card required parts of a microinstruction are stored on this card. That is, the ones required for card 1 Portions of a microinstruction are stored in the writable control store 32 and not duplicated in the writable control store Control store 32 of card 3. Similarly, the parts of the microinstructions required only on card 3 are used only saved in their WCS 32. Compared to the total WCS capacity, there is therefore a lower storage capacity for the WCS is required on every card. As a result, the heat of the only larger WCS 13 in the known embodiment is

game according to FIG. 1 distributed over several cards in the computer, whereby an easier heat dissipation is possible. The capacity of the WCS on each card can and is typically different. I. E. the word length of the word used on each card Microinstruction can be different.

In the described embodiment of the invention is a diagnostic bus 40 is also distributed on each of the cards 1, 2 and 3. This bus is connected to a diagnostic control unit 38, which is present on every card. Each control device 3 8 has a microprocessor (part number 8051) and a counter to deliver the addresses to the WCS 32 via the MUX 3 0 (from line 36). In this way, a test of the card 1 independent (or essentially independent) of testing on other cards. In connection with such a test is it is not necessary that the programmer 2 2 is effective; a test can also be performed when there are interruptions exist in bus 2 0. This is important compared to the conditions when testing known facilities comparable Kinds in which both the programmer and the distribution lines for the microinstructions are required for the test.

The present invention requires fewer bus lines distributed across the computer for microcode operations. Typically, the number of address lines is significantly less than the number of lines at the output of the microaddress register. For example, 14 microaddress lines provide a capacity of 16k microinstructions. In comparison for this, in a computer with a 200-bit word length, many more than 14 lines typically have to be used to couple the Codes can be used with every card in the calculator.

Even if in the described embodiment the law

ner manufactured on several separate printed circuit boards is, the invention can be used even if the computer is otherwise in separate physical Structures is divided. For example, where a computer is built on several integrated circuits, a Microaddress buses can be connected to circuits each of which has its own WCS.

The above has been made an improvement to a microcode using the computer. The writable control store (WCS) is divided into several spaced apart memories, the microaddress being distributed to these separate memories.

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Claims (6)

PATENTANWÄLTE ZENZ & HELBER · O α3Ο6 EÖBEN 1 ·: AM RUHRSTEIN 1 · TEL .: (02 O1) 4126; H Sift RATIONAL patent claims ο r ο ι η r »<~> oz ι yyζ 1. Computer with a microaddress programmer for addressing a control memory that supplies micro-instructions for the computer, characterized in that several control stores (3 2) are physically separated from one another are provided and that a with the programmer (22) connected bus (20) with the several control memories (32) for Distribution of the addresses from the programmer (22) to the control store (32) is connected to the control store. 2. Computer according to claim 1, characterized in that a plurality of printed circuit cards, at least partially are controlled by microcode commands, each carry one of the control stores (32). 3. Computer according to claim 1 or 2, characterized in that each of the control stores (32) is a static random access store is formed writable control memory. 4. Computer according to one of claims 1 to 3, characterized in that that for address coupling between the micro address bus (20) and each of the control stores (32) a multiplexer (30) is arranged. 5. Computer according to claim 4, characterized in that each of the printed circuit cards has a second, for diagnoses usable bus (40) is assigned that the second bus (40) is coupled to microprocessors, one of which is on each of the printed circuit boards (1, 2, 3) is arranged, the arrangement being such that during diagnostic processes the microprocessors send signals through the multiplexers (30) to the control stores (32) to perform an independent test on each of the circuit cards (1, 2, 3). 6. A method for operating a computer according to one of the claims 2 to 5, characterized in that the parts of the microprogram required for each of the cards are only based on that of the cards for which these parts are required and that the microaddress from the microaddress -Program generator is coupled to the various separate control memories via a bus.