DE3484534D1 - Vergleichsschaltung mit wenig transistoren. - Google Patents

Vergleichsschaltung mit wenig transistoren.

Info

Publication number
DE3484534D1
DE3484534D1 DE8484116287T DE3484534T DE3484534D1 DE 3484534 D1 DE3484534 D1 DE 3484534D1 DE 8484116287 T DE8484116287 T DE 8484116287T DE 3484534 T DE3484534 T DE 3484534T DE 3484534 D1 DE3484534 D1 DE 3484534D1
Authority
DE
Germany
Prior art keywords
comparative circuit
little transistors
transistors
little
comparative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484116287T
Other languages
English (en)
Inventor
Jiroh C O Nec Corp Shimada
Hiroshi C O Nec Corp Morito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3484534D1 publication Critical patent/DE3484534D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
DE8484116287T 1983-12-23 1984-12-24 Vergleichsschaltung mit wenig transistoren. Expired - Fee Related DE3484534D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58243319A JPS60134627A (ja) 1983-12-23 1983-12-23 一致検出回路

Publications (1)

Publication Number Publication Date
DE3484534D1 true DE3484534D1 (de) 1991-06-06

Family

ID=17102060

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484116287T Expired - Fee Related DE3484534D1 (de) 1983-12-23 1984-12-24 Vergleichsschaltung mit wenig transistoren.

Country Status (4)

Country Link
US (1) US4694274A (de)
EP (1) EP0147842B1 (de)
JP (1) JPS60134627A (de)
DE (1) DE3484534D1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0238677B1 (de) * 1986-03-22 1991-01-23 Deutsche ITT Industries GmbH Schaltungsanordnung zur Koinzidenzüberprüfung eines Datenworts mit einem Referenzdatenwort
DE3705686C2 (de) * 1987-02-23 1995-11-30 Boehringer Mannheim Gmbh Verfahren zur Bestimmung von Antikörpern
US4797650A (en) * 1987-06-25 1989-01-10 Delco Electronics Corporation CMOS binary equals comparator with carry in and out
US4755696A (en) * 1987-06-25 1988-07-05 Delco Electronics Corporation CMOS binary threshold comparator
US4841279A (en) * 1987-10-30 1989-06-20 Advanced Micro Devices, Inc. CMOS RAM data compare circuit
JPH0797308B2 (ja) * 1987-11-04 1995-10-18 三菱電機株式会社 比較回路
US4885544A (en) * 1987-12-28 1989-12-05 Kabushiki Kaisha Toshiba Determination circuit for data coincidence
JP3071435B2 (ja) * 1989-03-02 2000-07-31 沖電気工業株式会社 多ビット一致回路
US5285419A (en) * 1991-12-17 1994-02-08 Sgs-Thomson Microelectronics, Inc. Read/write memory with improved test mode data compare
JP2559017B2 (ja) * 1993-12-08 1996-11-27 松下電器産業株式会社 カセットテープレコーダ
US5610573A (en) * 1995-09-13 1997-03-11 Lsi Logic Corporation Method and apparatus for detecting assertion of multiple signals
US5881076A (en) * 1996-07-17 1999-03-09 Intel Corporation Comparator utilizing redundancy
DE19645055C2 (de) * 1996-10-31 1999-01-07 Sgs Thomson Microelectronics Elektrische Schaltungsanordnung zur seriellen Auswertung einer bit-Folge
US6253350B1 (en) * 1998-07-09 2001-06-26 International Business Machines Corporation Method and system for detecting errors within complementary logic circuits
US6502220B1 (en) * 1999-03-15 2002-12-31 International Businesss Machines Corporation Complementary logic error detection and correction
US6507929B1 (en) * 1999-03-15 2003-01-14 International Business Machines Corporation System and method for diagnosing and repairing errors in complementary logic
US6930516B2 (en) * 2001-05-30 2005-08-16 Agere Systems Inc. Comparator circuits having non-complementary input structures
US6828898B2 (en) * 2003-04-03 2004-12-07 Cts Corporation Fuel tank resistor card having improved corrosion resistance
CN107301834B (zh) * 2017-08-25 2020-11-03 京东方科技集团股份有限公司 一种逻辑单元电路和像素驱动电路

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1188535A (en) * 1966-08-25 1970-04-15 Plessey Co Ltd Improvements in or relating to Signal Correlators
US3604944A (en) * 1970-04-09 1971-09-14 Hughes Aircraft Co Mosfet comparator circuit
US4031511A (en) * 1976-04-27 1977-06-21 Westinghouse Electric Corporation CMOS comparator
JPS5333026A (en) * 1976-09-09 1978-03-28 Toshiba Corp Coincidence detection circuit
JPH105140A (ja) * 1996-06-26 1998-01-13 Toto Ltd 洗面カウンター

Also Published As

Publication number Publication date
EP0147842A2 (de) 1985-07-10
EP0147842B1 (de) 1991-05-02
JPH0241211B2 (de) 1990-09-17
JPS60134627A (ja) 1985-07-17
EP0147842A3 (en) 1988-03-16
US4694274A (en) 1987-09-15

Similar Documents

Publication Publication Date Title
DE3481880D1 (de) Schaltkreis.
NL191912C (nl) Geïntegreerd circuit.
DE3484220D1 (de) Herstellung von mos-integrierten schaltungsvorrichtungen.
DE3482078D1 (de) Halbleiteranordnung mit erhoehter durchbruchspannung.
DE3381764D1 (de) Kombinierte schaltung mit varistor.
DE3483657D1 (de) Parallelverknuepfungsschaltung mit verkuerztem uebertragsdurchlauf.
DE3484534D1 (de) Vergleichsschaltung mit wenig transistoren.
DE3482368D1 (de) Leiterplatte.
DE3486100D1 (de) Oszillatorschaltung.
DE3586840D1 (de) Speichersystem mit integriertem schaltkreis.
DE3575246D1 (de) Stromflussumkehrschaltkreis.
DE3485897D1 (de) Elektronenstrahlerzeuger.
NL193097B (nl) Omzetschakeling.
DE3484171D1 (de) Leuchtdioden-treiberschaltung.
FI842973A0 (fi) Cylindrisk kugghjulsvaexel saerskilt foer att driva en valsmantel.
DE3483576D1 (de) Tor-schaltungsanordnung.
DE3482084D1 (de) Integrierte schaltung.
DE3484830D1 (de) Fensteradressierbare speicherschaltung.
DE3483130D1 (de) Cmos-uebertragungsschaltung.
FI831221L (fi) Radiator.
DE3485292D1 (de) Lade-entladekreis.
DE3485122D1 (de) Steuerschaltung.
DE3581159D1 (de) Halbleiteranordnung mit integrierter schaltung.
DE3484789D1 (de) Kuehlvorrichtung.
DE3485535D1 (de) Multiplizierschaltung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee