DE3483417D1 - Virtuell adressierter cachespeicher. - Google Patents

Virtuell adressierter cachespeicher.

Info

Publication number
DE3483417D1
DE3483417D1 DE8484305887T DE3483417T DE3483417D1 DE 3483417 D1 DE3483417 D1 DE 3483417D1 DE 8484305887 T DE8484305887 T DE 8484305887T DE 3483417 T DE3483417 T DE 3483417T DE 3483417 D1 DE3483417 D1 DE 3483417D1
Authority
DE
Germany
Prior art keywords
addressed cache
virtually addressed
virtually
cache
addressed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484305887T
Other languages
English (en)
Inventor
Gary Arthur Woffinden
Donald Laverne Hanson
Gene Myron Amdahl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu IT Holdings Inc
Original Assignee
Amdahl Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amdahl Corp filed Critical Amdahl Corp
Application granted granted Critical
Publication of DE3483417D1 publication Critical patent/DE3483417D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE8484305887T 1983-08-30 1984-08-29 Virtuell adressierter cachespeicher. Expired - Lifetime DE3483417D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/527,678 US4612612A (en) 1983-08-30 1983-08-30 Virtually addressed cache

Publications (1)

Publication Number Publication Date
DE3483417D1 true DE3483417D1 (de) 1990-11-22

Family

ID=24102475

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484305887T Expired - Lifetime DE3483417D1 (de) 1983-08-30 1984-08-29 Virtuell adressierter cachespeicher.

Country Status (5)

Country Link
US (1) US4612612A (de)
EP (1) EP0144121B1 (de)
AU (1) AU571564B2 (de)
CA (1) CA1212779A (de)
DE (1) DE3483417D1 (de)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5687282A (en) * 1979-12-14 1981-07-15 Nec Corp Data processor
JPS60500187A (ja) * 1982-12-30 1985-02-07 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン データ処理システム
US4727482A (en) * 1983-08-30 1988-02-23 Amdahl Corporation Apparatus for enhancing searches of data tables
US4551797A (en) * 1983-08-31 1985-11-05 Amdahl Corporation Apparatus for reverse translation
US4654790A (en) * 1983-11-28 1987-03-31 Amdahl Corporation Translation of virtual and real addresses to system addresses
US4991081A (en) * 1984-10-31 1991-02-05 Texas Instruments Incorporated Cache memory addressable by both physical and virtual addresses
JPS61206057A (ja) * 1985-03-11 1986-09-12 Hitachi Ltd アドレス変換装置
JPH0685156B2 (ja) * 1985-05-24 1994-10-26 株式会社日立製作所 アドレス変換装置
US4972338A (en) * 1985-06-13 1990-11-20 Intel Corporation Memory management for microprocessor system
US5060137A (en) * 1985-06-28 1991-10-22 Hewlett-Packard Company Explicit instructions for control of translation lookaside buffers
US4774653A (en) * 1985-08-07 1988-09-27 Hewlett-Packard Company Hybrid hardware/software method and apparatus for virtual memory address translation using primary and secondary translation buffers
US4785398A (en) * 1985-12-19 1988-11-15 Honeywell Bull Inc. Virtual cache system using page level number generating CAM to access other memories for processing requests relating to a page
US4755936A (en) * 1986-01-29 1988-07-05 Digital Equipment Corporation Apparatus and method for providing a cache memory unit with a write operation utilizing two system clock cycles
US4811209A (en) * 1986-07-31 1989-03-07 Hewlett-Packard Company Cache memory with multiple valid bits for each data indication the validity within different contents
JPH0221342A (ja) * 1987-02-27 1990-01-24 Hitachi Ltd マルチプロセッサシステム及びマルチプロセッサシステムにおける論理キャッシュメモリのアクセス方法
US5134561A (en) * 1987-07-20 1992-07-28 International Business Machines Corporation Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries
US4901233A (en) * 1987-07-20 1990-02-13 International Business Machines Corporation Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries
JPH0195347A (ja) * 1987-10-08 1989-04-13 Nec Corp アドレス変換方式
JPH01145770A (ja) * 1987-12-01 1989-06-07 Hitachi Ltd ベクトル処理装置
US4897813A (en) * 1988-02-19 1990-01-30 Unisys Corporation Partially programmable read-only memory system
US4875160A (en) * 1988-07-20 1989-10-17 Digital Equipment Corporation Method for implementing synchronous pipeline exception recovery
US5134696A (en) * 1988-07-28 1992-07-28 International Business Machines Corp. Virtual lookaside facility
US5119485A (en) * 1989-05-15 1992-06-02 Motorola, Inc. Method for data bus snooping in a data processing system by selective concurrent read and invalidate cache operation
JPH0661068B2 (ja) * 1989-07-18 1994-08-10 株式会社日立製作所 記憶再配置方法および階層化記憶システム
US5077826A (en) * 1989-08-09 1991-12-31 International Business Machines Corporation Cache performance in an information handling system employing page searching
US5307477A (en) * 1989-12-01 1994-04-26 Mips Computer Systems, Inc. Two-level cache memory system
US5088026A (en) * 1990-02-09 1992-02-11 International Business Machines Corporation Method for managing a data cache using virtual external storage addresses as arguments
US5226143A (en) * 1990-03-14 1993-07-06 International Business Machines Corporation Multiprocessor system includes operating system for notifying only those cache managers who are holders of shared locks on a designated page by global lock manager
US5301290A (en) * 1990-03-14 1994-04-05 International Business Machines Corporation Method for minimizing lock processing while ensuring consistency among pages common to local processor caches and a shared external store
JP2575543B2 (ja) * 1990-04-04 1997-01-29 インターナショナル・ビジネス・マシーンズ・コーポレイション 同時アクセス管理方法
US5197132A (en) * 1990-06-29 1993-03-23 Digital Equipment Corporation Register mapping system having a log containing sequential listing of registers that were changed in preceding cycles for precise post-branch recovery
GB2260429B (en) * 1991-10-11 1995-05-24 Intel Corp Versatile cache memory
JP2839060B2 (ja) * 1992-03-02 1998-12-16 インターナショナル・ビジネス・マシーンズ・コーポレイション データ処理システムおよびデータ処理方法
US5680598A (en) * 1995-03-31 1997-10-21 International Business Machines Corporation Millicode extended memory addressing using operand access control register to control extended address concatenation
US6356918B1 (en) 1995-07-26 2002-03-12 International Business Machines Corporation Method and system for managing registers in a data processing system supports out-of-order and speculative instruction execution
US6393548B1 (en) * 1997-02-14 2002-05-21 Advanced Micro Devices, Inc. Variable 16 or 32 bit PCI interface which supports steering and swapping of data
US6108771A (en) * 1997-12-19 2000-08-22 International Business Machines Corporation Register renaming with a pool of physical registers
US6798191B1 (en) * 1999-08-09 2004-09-28 Power Measurement Ltd. Revenue meter with a graphic user interface being operative to display scalable objects
US6724391B1 (en) 2000-06-30 2004-04-20 Intel Corporation Mechanism for implementing Z-compression transparently
US6557083B1 (en) * 2000-06-30 2003-04-29 Intel Corporation Memory system for multiple data types
GB0301448D0 (en) 2003-01-22 2003-02-19 Falanx Microsystems As Microprocessor systems
US7644239B2 (en) 2004-05-03 2010-01-05 Microsoft Corporation Non-volatile memory cache performance improvement
US7490197B2 (en) 2004-10-21 2009-02-10 Microsoft Corporation Using external memory devices to improve system performance
US8914557B2 (en) 2005-12-16 2014-12-16 Microsoft Corporation Optimizing write and wear performance for a memory
US8631203B2 (en) 2007-12-10 2014-01-14 Microsoft Corporation Management of external memory functioning as virtual cache
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US8032707B2 (en) 2008-09-15 2011-10-04 Microsoft Corporation Managing cache data and metadata
US7953774B2 (en) 2008-09-19 2011-05-31 Microsoft Corporation Aggregation of write traffic to a data store
US20110228674A1 (en) * 2010-03-18 2011-09-22 Alon Pais Packet processing optimization
US9069489B1 (en) 2010-03-29 2015-06-30 Marvell Israel (M.I.S.L) Ltd. Dynamic random access memory front end
US9037810B2 (en) * 2010-03-02 2015-05-19 Marvell Israel (M.I.S.L.) Ltd. Pre-fetching of data packets
US8380894B2 (en) 2009-12-11 2013-02-19 International Business Machines Corporation I/O mapping-path tracking in a storage configuration
US8327047B2 (en) * 2010-03-18 2012-12-04 Marvell World Trade Ltd. Buffer manager and methods for managing memory
US9098203B1 (en) 2011-03-01 2015-08-04 Marvell Israel (M.I.S.L) Ltd. Multi-input memory command prioritization
US11126559B2 (en) 2013-12-30 2021-09-21 Michael Henry Kass Translation look-aside buffer and prefetch indicator
US9514053B2 (en) 2013-12-30 2016-12-06 Michael Henry Kass Providing memory system programming interfacing
US10002080B2 (en) 2013-12-30 2018-06-19 Michael Henry Kass Memory system address modification policies
US10216632B2 (en) 2013-12-30 2019-02-26 Michael Henry Kass Memory system cache eviction policies
US12032488B1 (en) * 2022-09-14 2024-07-09 Marvell Asia Pte Ltd Circuit and method for translation lookaside buffer (TLB) implementation

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3902164A (en) * 1972-07-21 1975-08-26 Ibm Method and means for reducing the amount of address translation in a virtual memory data processing system
US4010451A (en) * 1972-10-03 1977-03-01 National Research Development Corporation Data structure processor
US3825904A (en) * 1973-06-08 1974-07-23 Ibm Virtual memory system
US4453230A (en) * 1977-12-29 1984-06-05 Tokyo Shibaura Electric Co., Ltd. Address conversion system
US4376297A (en) * 1978-04-10 1983-03-08 Signetics Corporation Virtual memory addressing device
US4218743A (en) * 1978-07-17 1980-08-19 International Business Machines Corporation Address translation apparatus
US4253145A (en) * 1978-12-26 1981-02-24 Honeywell Information Systems Inc. Hardware virtualizer for supporting recursive virtual computer systems on a host computer system
EP0212678B1 (de) * 1980-11-10 1990-05-16 International Business Machines Corporation Anordnung zur Erkennung und Verarbeitung von Synonymen in Cache-Speichern
US4400770A (en) * 1980-11-10 1983-08-23 International Business Machines Corporation Cache synonym detection and handling means
US4481573A (en) * 1980-11-17 1984-11-06 Hitachi, Ltd. Shared virtual address translation unit for a multiprocessor system
US4456954A (en) * 1981-06-15 1984-06-26 International Business Machines Corporation Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations
US4441155A (en) * 1981-11-23 1984-04-03 International Business Machines Corporation Page controlled cache directory addressing
US4551797A (en) * 1983-08-31 1985-11-05 Amdahl Corporation Apparatus for reverse translation
AU3229484A (en) * 1983-09-07 1985-03-14 Amdahl Corporation Time shared translation buffer

Also Published As

Publication number Publication date
EP0144121A2 (de) 1985-06-12
EP0144121B1 (de) 1990-10-17
AU571564B2 (en) 1988-04-21
AU3229584A (en) 1985-03-07
US4612612A (en) 1986-09-16
EP0144121A3 (en) 1987-09-30
CA1212779A (en) 1986-10-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee