DE3424003A1 - Circuit arrangement - Google Patents
Circuit arrangementInfo
- Publication number
- DE3424003A1 DE3424003A1 DE19843424003 DE3424003A DE3424003A1 DE 3424003 A1 DE3424003 A1 DE 3424003A1 DE 19843424003 DE19843424003 DE 19843424003 DE 3424003 A DE3424003 A DE 3424003A DE 3424003 A1 DE3424003 A1 DE 3424003A1
- Authority
- DE
- Germany
- Prior art keywords
- stage
- power
- circuit arrangement
- current
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 230000001419 dependent effect Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 description 6
- 239000013078 crystal Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
- H01L27/0211—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique adapted for requirements of temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/52—Circuit arrangements for protecting such amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0826—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in bipolar transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K2017/0806—Modifications for protecting switching circuit against overcurrent or overvoltage against excessive temperature
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Amplifiers (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
Description
SchaltungsanordnungCircuit arrangement
Stand der Technik Die Erfindung geht aus von einer monolitisch integrierten Schaltungsanordnung nach der Gattung des Hauptanspruchs.PRIOR ART The invention is based on a monolithically integrated one Circuit arrangement according to the preamble of the main claim.
Aus der DE-OS 32 38 880 ist bereits eine Schaltungsanordnung mit einer Leistungsstufe und einer zugehörigen Strombegrenzungsstufe bekannt, bei der schaltungstechnische Maßnahmen vorgesehen sind, die eine Strombegrenzung der Leistungsstufe bewirken. Dazu wird der Strom durch die Leistungsstufe erfaßt und durch Rückkopplungsmaßnahmen auf die Steuer seite der Leistungsendstufe begrenzt, wodurch sich eine Leistungsbegrenzung der Leistungsstufe ergibt.From DE-OS 32 38 880 a circuit arrangement with a Power stage and an associated current limiting stage known in the circuitry Measures are provided that limit the current in the power level. For this purpose, the current through the power stage is recorded and by means of feedback measures limited to the control side of the power output stage, resulting in a power limitation the performance level results.
Allein aus der Leistungsbelastung der Leistungsstufe kann jedoch nicht auf die tatsächliche Haibleitertemperatur des Endstufentransistors geschlossen werden, da diese neben der momentanen verbrauchten elektrischen Leistung durch die Wärmekapazität des Halbleiterkristalls, auf den die Schaltungsanordnung monolitisch integriert ist, von vergangenen Betriebszuständen abhängig ist. So kann es trotz einer Strombegrenzung bei Dauerbetrieb der Leistungsstufe zu einer unzulässig hohen Halbleitererwärmung kommen.However, from the performance load of the performance level alone cannot the actual semiconductor temperature of the output stage transistor can be inferred, as this is due to the thermal capacity in addition to the current electrical power consumed of the semiconductor crystal the circuit arrangement is monolithic is integrated, is dependent on previous operating states. So it can despite a current limitation with continuous operation of the power level to an impermissibly high Semiconductor heating come.
Vorteile der Erfindung Die erfindungsgemäße monolitisch integrierte Schaltungsanordnung nach der Gattung des Hauptanspruches hat demgegenüber den Vorteil, daß durch die räumliche Anordnung der Strombegrenzungsstufe in der Nähe der Leistungsstufe der Temperaturgradient der Leistungsstufe mit erfaßt wird, und damit auch die Temperatur. Das kann dazu ausgenutzt werden, die tatsächliche Halbleitertemperatur zu begrenzen, aber auch um eine leistungsabhängige Regelung des Betriebes der durch die Leistungsstufe angesteuerten Last zu ermöglichen.Advantages of the invention The monolithically integrated according to the invention Circuit arrangement according to the preamble of the main claim has the advantage that by the spatial arrangement of the current limiting stage in the vicinity of the power stage the temperature gradient of the power stage is also recorded, and thus also the temperature. This can be used to limit the actual semiconductor temperature, but also a power-dependent regulation of the operation by the power level to enable controlled load.
Zeichnung Ein Ausführungsbeispiel der Erfindung ist in der Zeichnung dargestellt und in der nachfolgenden Beschreibung näher erläutert. Es zeigt Figur 1 ein elektrisches Schaltbild des Ausführungsbeispieles, Figur 2 eine vereinfachte Darstellung des Endstufentransistors mit Isothermen.Drawing An embodiment of the invention is shown in the drawing and explained in more detail in the following description. It shows figure 1 shows an electrical circuit diagram of the exemplary embodiment, FIG. 2 a simplified one Representation of the output stage transistor with isotherms.
Beschreibung des Ausführungsbeispiels In Figur 1 ist eine Darlington-Leistungsstufe T7, T8 dargestellt, die den Strom durch eine Last L schaltet Der Strom durch den Endstufentransistor T8 wird über einen Widerstand R1 gemessen, und einer Strombegr-enzungsschaltung T1, T2, T3, T4, T5, T6 zugeführt. Uber eine Klemme 20 kann die Leistungsstufe geschaltet werden; der Widerstand R4 und die Transistoren T10, T11 dienen zum Anlauf der Schaltung. Diese Schaltungsanordnung ist bereits in der DE-OS 32 38 880 beschrieben und zur Vereinfachung der Darstellung hier nicht weiter erläutert.DESCRIPTION OF THE EXEMPLARY EMBODIMENT FIG. 1 shows a Darlington power stage T7, T8 shown, which switches the current through a load L The current through the Output stage transistor T8 is measured via a resistor R1 and a current limiting circuit T1, T2, T3, T4, T5, T6 supplied. Above a terminal 20 can control the power level be switched; the resistor R4 and the transistors T10, T11 are used for starting the circuit. This circuit arrangement is already described in DE-OS 32 38 880 and not further explained here to simplify the representation.
In Figur 2 ist der Endstufentransistor T8 dargestellt, wie er in Zellstruktur auf einem Silizium-Kristall. als monolitisch integrierte Anordnung zu sehen ist. Jede der drei dargestellten Zellen stellt einen vollständigen Transistor dar, die zur Bildung eines Endstufentransistors T8 parallelgeschaltet sind. Bei Betrieb des Endstufentransistors T8 entsteht in ihm eine Temperatur #1.In Figure 2, the output stage transistor T8 is shown as it is in cell structure on a silicon crystal. can be seen as a monolithically integrated arrangement. Each of the three cells shown represents a complete transistor that are connected in parallel to form an output stage transistor T8. When operating the Output stage transistor T8 creates a temperature # 1 in it.
Im umgebenden Halbleiterkristall entsteht gemäß der Wärmeleitungsgleichung ein Temperaturgradient, wozu in Figur 2 Isothermen e 2, o>3, #3, #4, h, eingezeichnet sind.In the surrounding semiconductor crystal arises according to the heat conduction equation a temperature gradient, for which isotherms e 2, o> 3, # 3, # 4, h, shown in FIG are.
Die Strombegrenzerstufe ist geometrisch viel kleiner als die Leistungsstufe, so daß sie bequem um die Leistungsstufe herum integriert werden kann. Hierfür ist der Transistor T2 der Strombegrenzungsstufe auf der Isotherme i»2 angeordnet, der Transistor T1 auf der Isotherme as h. Dadurch geht der Temperaturgradient mit in die Strombegrenzung ein, d.h. der durch den Endstufentransistor T8 fließende Strom wird proportional zur Differenz der Temperaturen i>2 und < h verringert. Dadurch wird eine Begrenzung der Halbleitertemperatur #1 1 des Endstufentransistors T8 durch die Strombegrenzung der Strombegrenzungsstufe erreicht.The current limiter stage is geometrically much smaller than the power stage, so that it can be conveniently integrated around the power level. For this is the transistor T2 of the current limiting stage is arranged on the isotherm i »2, the Transistor T1 on the isotherm as h. This means that the temperature gradient goes with in the current limit, i.e. the current flowing through the output stage transistor T8 is reduced proportionally to the difference between the temperatures i> 2 and <h. Through this the semiconductor temperature # 1 1 of the output stage transistor T8 is limited the current limit of the current limit stage is reached.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19843424003 DE3424003A1 (en) | 1984-06-29 | 1984-06-29 | Circuit arrangement |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19843424003 DE3424003A1 (en) | 1984-06-29 | 1984-06-29 | Circuit arrangement |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3424003A1 true DE3424003A1 (en) | 1986-01-02 |
Family
ID=6239465
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19843424003 Ceased DE3424003A1 (en) | 1984-06-29 | 1984-06-29 | Circuit arrangement |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3424003A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3744756A1 (en) * | 1987-07-07 | 1989-01-26 | Ifm Electronic Gmbh | Constant-current generator |
EP0488443A1 (en) * | 1990-11-28 | 1992-06-03 | Koninklijke Philips Electronics N.V. | Amplifier circuit with temperature compensation |
EP1139566A1 (en) * | 2000-03-30 | 2001-10-04 | Hitachi, Ltd. | Semiconductor circuit with insulated gate device and associated control circuitry |
WO2004042917A2 (en) * | 2002-10-31 | 2004-05-21 | Sun Microsystems, Inc. | Sense amplifier thermal correction scheme |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2644597A1 (en) * | 1976-10-02 | 1978-04-06 | Philips Patentverwaltung | Integrated circuit overload protection temp. sensor - uses two conducting semiconductor paths and voltage drop comparison |
DE3238880A1 (en) * | 1982-10-21 | 1984-04-26 | Robert Bosch Gmbh, 7000 Stuttgart | CIRCUIT ARRANGEMENT |
-
1984
- 1984-06-29 DE DE19843424003 patent/DE3424003A1/en not_active Ceased
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2644597A1 (en) * | 1976-10-02 | 1978-04-06 | Philips Patentverwaltung | Integrated circuit overload protection temp. sensor - uses two conducting semiconductor paths and voltage drop comparison |
DE3238880A1 (en) * | 1982-10-21 | 1984-04-26 | Robert Bosch Gmbh, 7000 Stuttgart | CIRCUIT ARRANGEMENT |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3744756A1 (en) * | 1987-07-07 | 1989-01-26 | Ifm Electronic Gmbh | Constant-current generator |
EP0488443A1 (en) * | 1990-11-28 | 1992-06-03 | Koninklijke Philips Electronics N.V. | Amplifier circuit with temperature compensation |
EP1139566A1 (en) * | 2000-03-30 | 2001-10-04 | Hitachi, Ltd. | Semiconductor circuit with insulated gate device and associated control circuitry |
WO2004042917A2 (en) * | 2002-10-31 | 2004-05-21 | Sun Microsystems, Inc. | Sense amplifier thermal correction scheme |
WO2004042917A3 (en) * | 2002-10-31 | 2004-09-16 | Sun Microsystems Inc | Sense amplifier thermal correction scheme |
US6879929B2 (en) | 2002-10-31 | 2005-04-12 | Sun Microsystems | Sense amplifier thermal correction scheme |
US7136774B2 (en) | 2002-10-31 | 2006-11-14 | Sun Microsystems, Inc. | Sense amplifier thermal correction scheme |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8110 | Request for examination paragraph 44 | ||
8131 | Rejection |