DE3405847C1 - Series regulator with a MOSFET power transistor - Google Patents
Series regulator with a MOSFET power transistorInfo
- Publication number
- DE3405847C1 DE3405847C1 DE19843405847 DE3405847A DE3405847C1 DE 3405847 C1 DE3405847 C1 DE 3405847C1 DE 19843405847 DE19843405847 DE 19843405847 DE 3405847 A DE3405847 A DE 3405847A DE 3405847 C1 DE3405847 C1 DE 3405847C1
- Authority
- DE
- Germany
- Prior art keywords
- current
- voltage
- series
- transistor
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
- G05F1/573—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
- G05F1/5735—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector with foldback current limiting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
Description
rationsverstärkcrs OPX verbunden, an dem auch das Gate G des Serientransistors Tangeschaltet ist.Ration amplifier OPX connected to which the gate G of the series transistor T is connected.
Die Regelstufe RS enthält einen weiteren Operationsverstärker OP2, dessen invertierender Eingang mit der Ausgangsklemme A, dessen nicht invertierender Hingang mit einer Rcl'ercnzspannungsklemme U, und dessen Ausgang über einen Widerstand /?6 mit dem Gate G des Scrientransistors Tverbunden ist.The control stage RS contains a further operational amplifier OP 2, whose inverting input is connected to the output terminal A, whose non- inverting input is connected to a Rcl'ercnzspannungsklemme U, and whose output is connected to the gate G of the transistor T via a resistor /? 6.
Im folgenden wird die Wirkungsweise der erfindungsgemäßen Strombegrenzung SB beschrieben. Es wird hierbei davon ausgegangen, daß die Regelstufe RS in an sich bekannter Weise das Gate G des Serientransistors T derart ansteuert, daß an der Ausgangsklemme A eine konstante Ausgangsspannung UA abgreifbar ist.The mode of operation of the current limiter SB according to the invention is described below. Here, it is assumed that the control stage RS the gate G of the series transistor T drives in a known manner such that at the output terminal A a constant output voltage UA is tapped off.
Der erfindungsgemäßen Strombegrenzung SB liegt folgender Gedanke zugrunde. Im zulässigen Strombereich des Serientransistors Γ wird, während die Drain-Source-Spannung niedrig ist, eine hohe Steuerspannung am Gate G und damit ein geringer Widerstand zwischen der Drain D und der Source S des Serientransistors T eingestellt. Der Spannungsmittelwert kann somit auf einen niedrigeren Wert eingestellt werden. Im Serientransistor Tentsteht eine geringe Verlustleistung und damit geringe Verlustwärme. Im einzelnen wird dies durch folgende Maßnahmen erreicht. The current limitation SB according to the invention is based on the following idea. In the permissible current range of the series transistor Γ, while the drain-source voltage is low, a high control voltage at the gate G and thus a low resistance between the drain D and the source S of the series transistor T is set. The voltage mean value can thus be set to a lower value. In the series transistor T there is a low power loss and thus low heat loss. This is achieved in detail by the following measures.
Der Operationsverstärker OPX der Strombegrenzung SB ist durch einen Baustein realisiert, der einen hier nicht dargestellten Ausgangstransistor mit einem offenen Kollektor, Frequenzkompensation, sowie einen Eingangsgleichtaktbereich bis zum negativen Wert der Spannung an der Source Sdes Serientransistors Taufweist. The operational amplifier OPX of the current limitation SB is implemented by a module that has an output transistor (not shown here) with an open collector, frequency compensation, and an input common mode range up to the negative value of the voltage at the source S of the series transistor T.
Es wird von einem Zustand ausgegangen, bei dem durch den Serientransistor T, dessen Drain-Source-Spannung einen mittleren Wert aufweist und damit auch durch den Lastwiderstand RL der maximal zulässige Grenzstrom fließt. Am nicht invertierenden Eingang des Operationsverstärkers OP1 liegt auf Grund der Zenerdiode Z eine Referenzspannung UR an, die auf die Spannung an der Source S des Serientransistors Tbezogen ist.A state is assumed in which the series transistor T, the drain-source voltage of which has a medium value, and thus the maximum permissible limit current also flows through the load resistor RL. At the non-inverting input of the operational amplifier OP 1, due to the Zener diode Z, there is a reference voltage UR which is related to the voltage at the source S of the series transistor T.
Ab diesem Zustand hin zu geringeren Lastwiderständen RL, die bei Einhaltung der Ausgangsspannung UA
höhere Ströme bedingen würden, wird der Strom durch den Serientransistor T über die Widerstände R 4 und
R 5 am Operationsverstärker OPl konstant gehalten. Das bedeutet, unzulässig hohe Ströme werden durch
Konstanthaltung der Spannung am Gate G des Serientransistors
T, d. h. durch eine Reduzierung des Widerstandes des Ausgangstransistors des Operationsverstärkers
OP X verhindert. Die Spannung am Gate G bleibt konstant, obwohl die Regelstufe RS auf Grund der Unterschreitung
der vorgegebenen Ausgangsspannung UA am Ausgang des Operationsverstärkers OP2 eine
höhere Spannung einstellen will. Bei einer weiteren Verkleinerung des Lastwiderstandes RL steigt bei einer
konstanten Spannung am Gate G die Drain-Source-Spannung an. Aus diesem Grund sinkt die Ausgangsspannung
UA, und damit auch die Spannung an der Source s ab. Dies bewirkt, daß auch die Spannung am
nicht invertierenden Eingang des Operationsverstärkers OPi, und über den Ausgang des Operationsverstärkers
OP1 auch die Spannung am Gate G sinken.
Zusammen mit den Widerständen R 4 und R 5 bewirkt die an der Source 5 angeschaltete Zenerdiode Z die
rückläufige Strom-Spannungskennlinie des Serientransistors Tbei sehr hohen Strömen.
Ausgehend von dem Zustand, bei dem der Grenzstrom durch den Serientransistor T fließt, wird hin zu
einer niedrigeren Drain-Source-Spannung die Spannung am Gate G stark erhöht. Beim Grenzstrom ist die
am Widerstand R 3 abgreifbare Spannung gleich der an der Diode D1. Die am invertierenden Eingang des Operationsverstärkers
OfI anliegende Spannung sinkt mit einer sinkenden Gate-Source-Spannung, da über die Diode
D X und den Widerstand R 2 ein Strom zur Drain D fließt. Dieser Strom kann über den Widerstand R 4 nur
fließen, da der Ausgang des Operationsverstärkers OP1
hochohmig wird, und infolgedessen die Gate-Source-Spannung ansteigt.From this state towards lower load resistances RL, which would require higher currents if the output voltage UA is maintained, the current through the series transistor T is kept constant via the resistors R 4 and R 5 at the operational amplifier OP1. This means that impermissibly high currents are prevented by keeping the voltage at the gate G of the series transistor T constant, ie by reducing the resistance of the output transistor of the operational amplifier OP X. The voltage at the gate G remains constant, although the control stage RS wants to set a higher voltage at the output of the operational amplifier OP 2 because it falls below the specified output voltage UA. With a further reduction in the load resistance RL , the drain-source voltage increases with a constant voltage at the gate G. For this reason, the output voltage UA drops, and with it the voltage at the source s . This causes the voltage at the non-inverting input of the operational amplifier OP, and via the output of the operational amplifier OP 1, the voltage at the gate G to fall. Together with the resistors R 4 and R 5 , the Zener diode Z connected to the source 5 causes the declining current-voltage characteristic of the series transistor T at very high currents.
Starting from the state in which the limit current flows through the series transistor T , the voltage at the gate G is greatly increased towards a lower drain-source voltage. At the limit current, the voltage that can be tapped off at resistor R 3 is the same as that at diode D 1. The voltage at the inverting input of operational amplifier OfI falls with a falling gate-source voltage, since a current flows through diode DX and resistor R 2 Drain D flows. This current can only flow through the resistor R 4 because the output of the operational amplifier OP 1 becomes high-resistance, and as a result the gate-source voltage rises.
Hierzu 1 Blatt Zeichnungen1 sheet of drawings
- Leerseite- Blank page
Claims (1)
und Der Erfindung liegt die Aufgabe zugrunde, eine daß ein zweiter Eingang des zweiten Operationsver- Strombegrenzung für einen Serienregler mit MOSFET-stärkers (OP1) über einen Widerstand (R S) mit ei- Leistungstransistoren anzugeben, bei der im Lastkreis nem Bezugspotential fOV^ verbunden ist, wobei mit- 25 ein zusätzlicher, durch die Strombegrenzungsstufe betels des Widerstandes (R S) und des Rückkopplungs- dingter Spannungsabfall vermieden wird.
Widerstandes (R 4) eine rückläufige Stromspan- Diese Aufgabe wird erfindungsgemäß durch die im nungskennlinie erzeugbar ist. kennzeichnenden Teil des Patentanspruchs 1 angegebe-derstand (RL), with a second operational amplifier (OPi) and a feedback counter- io to 388 is a series regulator according to the upper level (RA). having current limiting stage term of claim 1 equipped power supply with (SB), whose output with that of the control stage (RS) variable output voltage and adjustable current and gate electrode (G ^ of the series transistor (T) limit (see Figure 8) known. This Power supply is coupled, whereby with high load current the has two parallel connected MOSFET power current limiting stage (SB) as a current sink on the 15 transistors, whereby a Wi gate electrode (G) acts for current value acquisition, thereby identifying in the load circuit The voltage value that can be tapped off at this resistance is applied to a first input of the second operational amplifier, whose output amplifier (OP 1) is connected via a Hal Conductor element with conguration in the event of a short circuit as a current sink for the output constant voltage characteristic (Z) with the source 20 of another operational amplifier, which is connected to the one electrode (2 ^ of the series transistor (^, maintains a constant output voltage,
The invention is based on the object of specifying a second input of the second operational current limit for a series regulator with MOSFET amplifier (OP 1) via a resistor (RS) with egg power transistors in which the load circuit nem reference potential fOV ^ connected is, with an additional voltage drop caused by the current limiting stage betels the resistor (RS) and the feedback is avoided.
Resistance (R 4) a declining current voltage This object is achieved according to the invention by the voltage characteristic can be generated. characterizing part of claim 1 indicated
lektor, Frequenzkompensation, und einen Eingangs- Ein weiterer Vorteil der erfindungsgemäßen Regelgleichtaktbereich bis zum negativen Wert einer stufe liegt darin, daß in den MOSFET-Leistungstransi-Spannung an der Source-Elektrode (S) des Serien- stören nur eine geringe Verlustleistung und damit nur transistors (T) aufweist. 35 wenig Wärme entstehen.shows that the second operational amplifier 30. The advantage resulting from this is that (OPi) an output transistor with an open KoI - no current measuring resistor is necessary.
lektor, frequency compensation, and an input Another advantage of the control common mode range according to the invention up to the negative value of a stage is that in the MOSFET power transi-voltage at the source electrode (S) of the series disturb only a low power loss and thus only has transistor (T) . 35 little heat is generated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19843405847 DE3405847C1 (en) | 1984-02-17 | 1984-02-17 | Series regulator with a MOSFET power transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19843405847 DE3405847C1 (en) | 1984-02-17 | 1984-02-17 | Series regulator with a MOSFET power transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3405847C1 true DE3405847C1 (en) | 1985-08-22 |
Family
ID=6228099
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19843405847 Expired DE3405847C1 (en) | 1984-02-17 | 1984-02-17 | Series regulator with a MOSFET power transistor |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3405847C1 (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3932399C1 (en) * | 1989-09-28 | 1990-11-15 | Ant Nachrichtentechnik Gmbh, 7150 Backnang, De | Operating series length regulating loop - switching in adjuster again during delay time if current falls again below threshold value |
EP0497106A3 (en) * | 1991-01-26 | 1993-03-31 | Bosch Telecom Oeffentliche Vermittlungstechnik Gmbh | Circuit arrangement for voltage and current regulation |
DE4431077C1 (en) * | 1994-09-01 | 1995-08-31 | Ant Nachrichtentech | Overcurrent limiting device for regulator |
DE19546132A1 (en) * | 1995-12-11 | 1997-06-12 | Berthold Dr Ing Fuld | Circuit for limiting in-rush current and overvoltage in voltage converter |
EP0987615A1 (en) * | 1998-09-16 | 2000-03-22 | Matsushita Electric Industrial Co., Ltd. | Power circuit including inrush current limiter, and integrated circuit including the power circuit |
GB2347238A (en) * | 1999-02-22 | 2000-08-30 | Mitel Inc | Voltage regulator with low quiescent current draw |
FR2838891A1 (en) * | 2002-12-17 | 2003-10-24 | Siemens Vdo Automotive | Electronic circuit for controlling and limiting an electric current in a load subjected to a supply voltage |
DE10338272A1 (en) * | 2003-08-15 | 2005-03-17 | Atmel Germany Gmbh | Circuit arrangement and method for power supply |
-
1984
- 1984-02-17 DE DE19843405847 patent/DE3405847C1/en not_active Expired
Non-Patent Citations (3)
Title |
---|
DD-Z.: "Elektrie", 1982, H.7, S.366-370 * |
DE-Z.: "Elektronik", Aug.1982, S.41-43 * |
DE-Z.: "Funk-Technik" 1982, H.9, S.385-388 * |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3932399C1 (en) * | 1989-09-28 | 1990-11-15 | Ant Nachrichtentechnik Gmbh, 7150 Backnang, De | Operating series length regulating loop - switching in adjuster again during delay time if current falls again below threshold value |
EP0497106A3 (en) * | 1991-01-26 | 1993-03-31 | Bosch Telecom Oeffentliche Vermittlungstechnik Gmbh | Circuit arrangement for voltage and current regulation |
DE4431077C1 (en) * | 1994-09-01 | 1995-08-31 | Ant Nachrichtentech | Overcurrent limiting device for regulator |
EP0699987A2 (en) | 1994-09-01 | 1996-03-06 | ANT Nachrichtentechnik GmbH | Device for limiting excess currents |
DE19546132A1 (en) * | 1995-12-11 | 1997-06-12 | Berthold Dr Ing Fuld | Circuit for limiting in-rush current and overvoltage in voltage converter |
DE19546132C2 (en) * | 1995-12-11 | 2000-10-12 | Berthold Fuld | Circuit arrangement for protection against overcurrent on the input side for voltage intermediate circuit converters |
EP0987615A1 (en) * | 1998-09-16 | 2000-03-22 | Matsushita Electric Industrial Co., Ltd. | Power circuit including inrush current limiter, and integrated circuit including the power circuit |
GB2347238A (en) * | 1999-02-22 | 2000-08-30 | Mitel Inc | Voltage regulator with low quiescent current draw |
GB2347238B (en) * | 1999-02-22 | 2003-02-05 | Mitel Inc | Onhook telecom power supply regulator mode |
FR2838891A1 (en) * | 2002-12-17 | 2003-10-24 | Siemens Vdo Automotive | Electronic circuit for controlling and limiting an electric current in a load subjected to a supply voltage |
DE10338272A1 (en) * | 2003-08-15 | 2005-03-17 | Atmel Germany Gmbh | Circuit arrangement and method for power supply |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE19530472B4 (en) | Constant current circuit | |
DE60225124T2 (en) | Control device with low loss voltage, with a large load range and fast inner control loop | |
EP0421516B1 (en) | Power supply arrangement with voltage regulation and current limiting | |
DE69532886T2 (en) | IMPEDANCE EMULATOR | |
DE4420041C2 (en) | Constant voltage generating device | |
DE2705201B2 (en) | Logarithmic compression circuit | |
DE3405847C1 (en) | Series regulator with a MOSFET power transistor | |
DE3780442T2 (en) | POWER SUPPLY. | |
DE2617444A1 (en) | STABILIZED POWER SUPPLY | |
DE10212863B4 (en) | Drive circuit for a junction field effect transistor | |
DE2639790B2 (en) | Circuit arrangement for supplying constant current | |
DE4444623A1 (en) | Power MOSFET load current control circuit | |
DE3433817C2 (en) | ||
EP0143375B1 (en) | Transformerless push-pull amplifier | |
DE3516112A1 (en) | INTEGRATED LOAD VOLTAGE SAMPLING CIRCUIT FOR EFFECTIVE LOAD MEDIUM VOLTAGE CONTROL DEVICE | |
EP0961403B1 (en) | Integrated amplifying circuit comprising temperature compensation | |
DE2349462B2 (en) | STABILIZATION CIRCUIT FOR A CONSTANT CURRENT | |
DE3901560C2 (en) | ||
DE3038197C2 (en) | ||
DE2040531C3 (en) | Method for automatically setting the output DC voltage of series push-pull amplifiers | |
EP1197825B1 (en) | Integrated circuit with parts supplied with a different supply voltage | |
DE2148880A1 (en) | Power source | |
DE3925342C2 (en) | AB amplifier in single-ended or push-pull circuit | |
DE2911171A1 (en) | CIRCUIT FOR CONTROLLING A POWER SOURCE TRANSISTOR | |
DE2641535A1 (en) | Voltage divider with variable division ratio - has AC test voltage applied to divider to control variable resistance |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8100 | Publication of the examined application without publication of unexamined application | ||
D1 | Grant (no unexamined application published) patent law 81 | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |