DE3381935D1 - Teilproduktakkumulation in hochleistungsmultipliziern. - Google Patents
Teilproduktakkumulation in hochleistungsmultipliziern.Info
- Publication number
- DE3381935D1 DE3381935D1 DE8383303303T DE3381935T DE3381935D1 DE 3381935 D1 DE3381935 D1 DE 3381935D1 DE 8383303303 T DE8383303303 T DE 8383303303T DE 3381935 T DE3381935 T DE 3381935T DE 3381935 D1 DE3381935 D1 DE 3381935D1
- Authority
- DE
- Germany
- Prior art keywords
- sub
- product accumulation
- multiplication
- performance
- performance multiplication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/509—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/434,298 US4545028A (en) | 1982-10-13 | 1982-10-13 | Partial product accumulation in high performance multipliers |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3381935D1 true DE3381935D1 (de) | 1990-11-15 |
Family
ID=23723657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383303303T Expired - Lifetime DE3381935D1 (de) | 1982-10-13 | 1983-06-08 | Teilproduktakkumulation in hochleistungsmultipliziern. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4545028A (de) |
EP (1) | EP0109137B1 (de) |
JP (1) | JPS5981737A (de) |
DE (1) | DE3381935D1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4577282A (en) | 1982-02-22 | 1986-03-18 | Texas Instruments Incorporated | Microcomputer system for digital signal processing |
US4646257A (en) * | 1983-10-03 | 1987-02-24 | Texas Instruments Incorporated | Digital multiplication circuit for use in a microprocessor |
US4680701A (en) * | 1984-04-11 | 1987-07-14 | Texas Instruments Incorporated | Asynchronous high speed processor having high speed memories with domino circuits contained therein |
JPS61114338A (ja) * | 1984-11-09 | 1986-06-02 | Hitachi Ltd | 乗算器 |
US4831577A (en) * | 1986-09-17 | 1989-05-16 | Intersil, Inc. | Digital multiplier architecture with triple array summation of partial products |
US4839848A (en) * | 1987-09-14 | 1989-06-13 | Unisys Corporation | Fast multiplier circuit incorporating parallel arrays of two-bit and three-bit adders |
DE3823722A1 (de) * | 1988-07-13 | 1990-01-18 | Siemens Ag | Multiplizierer |
EP0448367B1 (de) * | 1990-03-20 | 1998-12-23 | Fujitsu Limited | Digitaler paralleler Hochgeschwindigkeitsmultiplizierer |
US5808927A (en) * | 1994-10-18 | 1998-09-15 | International Business Machines Corporation | Apparatus for performing two's complement and unsigned multiply accumulate |
EP1622178A1 (de) * | 2004-07-29 | 2006-02-01 | Ecole Polytechnique Federale De Lausanne (Epfl) | 2,2 -Bipyridinligand, Sensibilisierungsfarbstoff und farbstoffsensibilisierte Solarzelle |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2007353C3 (de) * | 1970-02-18 | 1973-11-29 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Vierteiliges Addierwerk |
JPS5270727A (en) * | 1975-12-10 | 1977-06-13 | Fujitsu Ltd | Computation system |
US4153938A (en) * | 1977-08-18 | 1979-05-08 | Monolithic Memories Inc. | High speed combinatorial digital multiplier |
-
1982
- 1982-10-13 US US06/434,298 patent/US4545028A/en not_active Expired - Lifetime
-
1983
- 1983-06-08 DE DE8383303303T patent/DE3381935D1/de not_active Expired - Lifetime
- 1983-06-08 EP EP83303303A patent/EP0109137B1/de not_active Expired
- 1983-09-27 JP JP58179051A patent/JPS5981737A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
EP0109137B1 (de) | 1990-10-10 |
JPH0312738B2 (de) | 1991-02-20 |
JPS5981737A (ja) | 1984-05-11 |
EP0109137A2 (de) | 1984-05-23 |
US4545028A (en) | 1985-10-01 |
EP0109137A3 (en) | 1986-05-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |