DE3362981D1 - Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like - Google Patents

Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like

Info

Publication number
DE3362981D1
DE3362981D1 DE8383300276T DE3362981T DE3362981D1 DE 3362981 D1 DE3362981 D1 DE 3362981D1 DE 8383300276 T DE8383300276 T DE 8383300276T DE 3362981 T DE3362981 T DE 3362981T DE 3362981 D1 DE3362981 D1 DE 3362981D1
Authority
DE
Germany
Prior art keywords
failure
devices connected
electrical devices
common bus
automatic diagnosis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383300276T
Other languages
English (en)
Inventor
Joseph A Prang
Ronald E Roetzer
Michael W Schraeder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Genrad Inc
Original Assignee
Genrad Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Genrad Inc filed Critical Genrad Inc
Application granted granted Critical
Publication of DE3362981D1 publication Critical patent/DE3362981D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. by varying supply voltage

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
DE8383300276T 1982-01-26 1983-01-19 Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like Expired DE3362981D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/342,902 US4459693A (en) 1982-01-26 1982-01-26 Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like

Publications (1)

Publication Number Publication Date
DE3362981D1 true DE3362981D1 (en) 1986-05-22

Family

ID=23343783

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383300276T Expired DE3362981D1 (en) 1982-01-26 1983-01-19 Method of and apparatus for the automatic diagnosis of the failure of electrical devices connected to common bus nodes and the like

Country Status (4)

Country Link
US (1) US4459693A (de)
EP (1) EP0087212B1 (de)
JP (1) JPS58140652A (de)
DE (1) DE3362981D1 (de)

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GB2186701B (en) * 1986-02-14 1990-03-28 Membrain Ltd Circuit testers
US5126953A (en) * 1986-06-27 1992-06-30 Berger James K Printed circuit board assembly tester
US4864219A (en) * 1987-03-19 1989-09-05 Genrad, Inc. Method and apparatus for verifying proper placement of integrated circuits on circuit boards
US4799006A (en) * 1987-06-11 1989-01-17 Augat Inc. ATE test fixture having a self-sealing vacuum skirt
US4862069A (en) * 1987-08-05 1989-08-29 Genrad, Inc. Method of in-circuit testing
US4857833A (en) * 1987-08-27 1989-08-15 Teradyne, Inc. Diagnosis of faults on circuit board
US5231637A (en) * 1988-01-27 1993-07-27 Oki Electric Industry Co., Ltd. Apparatus for testing a PLA by measuring a current consumed by the PLO when activated with known codes
US4841232A (en) * 1988-04-29 1989-06-20 International Business Machines Corporation Method and apparatus for testing three state drivers
JPH0394183A (ja) * 1989-05-19 1991-04-18 Fujitsu Ltd 半導体集積回路の試験方法及び回路
US5127009A (en) * 1989-08-29 1992-06-30 Genrad, Inc. Method and apparatus for circuit board testing with controlled backdrive stress
US5059897A (en) * 1989-12-07 1991-10-22 Texas Instruments Incorporated Method and apparatus for testing passive substrates for integrated circuit mounting
US4985672A (en) * 1989-12-11 1991-01-15 Advantest Corporation Test equipment for a low current IC
US5321701A (en) * 1990-12-06 1994-06-14 Teradyne, Inc. Method and apparatus for a minimal memory in-circuit digital tester
US5132612A (en) * 1991-03-14 1992-07-21 The United States Of America As Represented By The Secretary Of The Air Force Apparatus for electrostatic discharge (ESD) stress/testing
US5448166A (en) * 1992-01-03 1995-09-05 Hewlett-Packard Company Powered testing of mixed conventional/boundary-scan logic
US5260649A (en) * 1992-01-03 1993-11-09 Hewlett-Packard Company Powered testing of mixed conventional/boundary-scan logic
JPH06225448A (ja) * 1992-12-04 1994-08-12 Fuji Electric Co Ltd 母線保護方法
US5623202A (en) * 1994-09-26 1997-04-22 United Microelectronics Corporation Testing multiple IC in parallel by a single IC tester
US5822512A (en) * 1995-05-19 1998-10-13 Compaq Computer Corporartion Switching control in a fault tolerant system
US5968155A (en) * 1995-08-23 1999-10-19 Sun Microsystems, Inc. Digital gate computer bus
US5570036A (en) * 1995-08-25 1996-10-29 Hal Computer Systems, Inc. CMOS buffer circuit having power-down feature
JPH09160690A (ja) * 1995-12-08 1997-06-20 Nec Corp バスドライバ故障検出方式
US6240535B1 (en) * 1995-12-22 2001-05-29 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US5796746A (en) * 1995-12-22 1998-08-18 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US6032271A (en) * 1996-06-05 2000-02-29 Compaq Computer Corporation Method and apparatus for identifying faulty devices in a computer system
US5802074A (en) * 1996-09-19 1998-09-01 Intel Corporation Method and apparatus for the non-invasive testing of printed circuit board assemblies
US5796639A (en) * 1996-09-19 1998-08-18 Intel Corporation Method and apparatus for verifying the installation of strapping devices on a circuit board assembly
WO1999031588A1 (en) * 1997-12-14 1999-06-24 E & M Engineering (Y.G.R.) Ltd. Method, apparatus and device for digital testing and diagnostics of pc boards
WO2000002057A1 (en) * 1998-07-02 2000-01-13 Huntron Instruments, Inc. Apparatus for detecting electrical shorts and opens on circuit boards having a plurality of bus lines
US7174480B1 (en) 1998-07-24 2007-02-06 International Business Machines Corporation Data processing method and system for simulation of hardware faults utilizing a PCI bus
ATE347699T1 (de) * 2001-09-07 2006-12-15 Koninkl Philips Electronics Nv Minimum detektor
WO2003084015A1 (fr) 2002-03-28 2003-10-09 Fujitsu Limited Dispositif a reseau de lasers et procede de commande de reseau de lasers
US20030191978A1 (en) * 2002-04-04 2003-10-09 International Business Machines Corporation Multiple fault location in a series of devices
US6971049B2 (en) * 2002-05-23 2005-11-29 International Business Machines Corporation Method and apparatus for detecting and isolating failures in equipment connected to a data bus
DE10320926A1 (de) * 2003-05-09 2004-12-16 Siemens Ag Verfahren und Anordnung zur Prüfung einer Leistungsendstufe
WO2009024172A1 (en) * 2007-08-22 2009-02-26 Verigy (Singapore) Pte. Ltd. Chip tester, chip test system, chip test setup, method for identifying an open-line failure and computer program
WO2017207352A1 (en) * 2016-06-01 2017-12-07 Philips Lighting Holding B.V. Error detection on integrated circuit input/output pins
US11467211B2 (en) 2016-06-01 2022-10-11 Signify Holding B.V. Error detection on integrated circuit input/output pins

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3469186A (en) * 1967-03-14 1969-09-23 Us Navy Stimulus injection system for localizing defective components in cascaded systems
US3870953A (en) * 1972-08-01 1975-03-11 Roger Boatman & Associates Inc In circuit electronic component tester
USRE30502E (en) * 1976-08-16 1981-02-03 Beckman Instruments, Inc. Open lead testing system for EEG
US4070565A (en) * 1976-08-18 1978-01-24 Zehntel, Inc. Programmable tester method and apparatus
US4186338A (en) * 1976-12-16 1980-01-29 Genrad, Inc. Phase change detection method of and apparatus for current-tracing the location of faults on printed circuit boards and similar systems
DE2738594A1 (de) * 1977-08-26 1979-03-01 Siemens Ag Rechnersystem
US4194113A (en) * 1978-04-13 1980-03-18 Ncr Corporation Method and apparatus for isolating faults in a logic circuit
DE2829839C2 (de) * 1978-07-07 1987-02-19 Vdo Adolf Schindling Ag, 6000 Frankfurt Anordnung zur zeitmultiplexen Datenübertragung in einem Bus-System
US4242751A (en) * 1978-08-28 1980-12-30 Genrad, Inc. Automatic fault-probing method and apparatus for checking electrical circuits and the like
US4228537A (en) * 1978-08-29 1980-10-14 Genrad, Inc. Method of and apparatus for automatic fault diagnosis of electrical circuits employing on-line simulation of faults in such circuits during diagnosis
US4236246A (en) * 1978-11-03 1980-11-25 Genrad, Inc. Method of and apparatus for testing electronic circuit assemblies and the like
US4255748A (en) * 1979-02-12 1981-03-10 Automation Systems, Inc. Bus fault detector
US4290013A (en) * 1979-06-22 1981-09-15 Genrad, Inc. Method of and apparatus for electrical short testing and the like
US4354268A (en) * 1980-04-03 1982-10-12 Santek, Inc. Intelligent test head for automatic test system
US4348760A (en) * 1980-09-25 1982-09-07 Lockheed Corporation Digital-fault loop probe and system

Also Published As

Publication number Publication date
JPS58140652A (ja) 1983-08-20
US4459693A (en) 1984-07-10
EP0087212B1 (de) 1986-04-16
EP0087212A1 (de) 1983-08-31
JPH0582554B2 (de) 1993-11-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition