DE3279117D1 - Semiconductor device incorporated in a semiconductor layer formed on an insulating layer - Google Patents

Semiconductor device incorporated in a semiconductor layer formed on an insulating layer

Info

Publication number
DE3279117D1
DE3279117D1 DE8282104721T DE3279117T DE3279117D1 DE 3279117 D1 DE3279117 D1 DE 3279117D1 DE 8282104721 T DE8282104721 T DE 8282104721T DE 3279117 T DE3279117 T DE 3279117T DE 3279117 D1 DE3279117 D1 DE 3279117D1
Authority
DE
Germany
Prior art keywords
semiconductor
device incorporated
semiconductor device
insulating layer
layer formed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282104721T
Other languages
English (en)
Inventor
Shigeru Komatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP8211981A external-priority patent/JPS57197860A/ja
Priority claimed from JP10651081A external-priority patent/JPS589376A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3279117D1 publication Critical patent/DE3279117D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/452Ohmic electrodes on AIII-BV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/7317Bipolar thin film transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE8282104721T 1981-05-29 1982-05-28 Semiconductor device incorporated in a semiconductor layer formed on an insulating layer Expired DE3279117D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8211981A JPS57197860A (en) 1981-05-29 1981-05-29 Semiconductor device
JP10651081A JPS589376A (ja) 1981-07-08 1981-07-08 半導体装置

Publications (1)

Publication Number Publication Date
DE3279117D1 true DE3279117D1 (en) 1988-11-17

Family

ID=26423134

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282104721T Expired DE3279117D1 (en) 1981-05-29 1982-05-28 Semiconductor device incorporated in a semiconductor layer formed on an insulating layer

Country Status (2)

Country Link
EP (1) EP0066810B1 (de)
DE (1) DE3279117D1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0212207A1 (de) * 1985-07-19 1987-03-04 Siemens Aktiengesellschaft Bipolartransistorstruktur für integrierte Schaltungen mit hohen Schaltgeschwindigkeiten und Verfahren zu ihrer Herstellung
EP0390606A3 (de) * 1989-03-31 1991-10-09 Canon Kabushiki Kaisha Halbleitervorrichtung mit einem hinsichtlich des Emittorgebietes und/oder der Basiselektrode verbesserten Transistor

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2508874C3 (de) * 1975-02-28 1982-03-18 Siemens AG, 1000 Berlin und 8000 München Bipolarer Transistor in einer epitaktischen Schicht aus Halbleitermaterial auf einem isolierenden Substrat
DE2631880A1 (de) * 1975-07-18 1977-03-31 Futaba Denshi Kogyo Kk Halbleiterbauelement mit schottky- sperrschicht und verfahren zu seiner herstellung
US4139857A (en) * 1975-07-18 1979-02-13 Futaba Denshi Kogyo Kabushiki Kaisha Schottky barrier type solid-state element
US4169746A (en) * 1977-04-28 1979-10-02 Rca Corp. Method for making silicon on sapphire transistor utilizing predeposition of leads
US4119992A (en) * 1977-04-28 1978-10-10 Rca Corp. Integrated circuit structure and method for making same
DE3069973D1 (en) * 1979-08-25 1985-02-28 Zaidan Hojin Handotai Kenkyu Insulated-gate field-effect transistor

Also Published As

Publication number Publication date
EP0066810B1 (de) 1988-10-12
EP0066810A2 (de) 1982-12-15
EP0066810A3 (en) 1985-11-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee