DE3278183D1 - A semiconductor integrated device and a method for manufacturing the same - Google Patents

A semiconductor integrated device and a method for manufacturing the same

Info

Publication number
DE3278183D1
DE3278183D1 DE8282303391T DE3278183T DE3278183D1 DE 3278183 D1 DE3278183 D1 DE 3278183D1 DE 8282303391 T DE8282303391 T DE 8282303391T DE 3278183 T DE3278183 T DE 3278183T DE 3278183 D1 DE3278183 D1 DE 3278183D1
Authority
DE
Germany
Prior art keywords
manufacturing
same
semiconductor integrated
integrated device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282303391T
Other languages
English (en)
Inventor
Takehide Shirato
Kouichi Fujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3278183D1 publication Critical patent/DE3278183D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/04Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
    • G09G3/06Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources
    • G09G3/10Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources using gas tubes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE8282303391T 1981-06-30 1982-06-29 A semiconductor integrated device and a method for manufacturing the same Expired DE3278183D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56100510A JPS583264A (ja) 1981-06-30 1981-06-30 高耐圧半導体集積回路およびその製造方法

Publications (1)

Publication Number Publication Date
DE3278183D1 true DE3278183D1 (en) 1988-04-07

Family

ID=14275940

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282303391T Expired DE3278183D1 (en) 1981-06-30 1982-06-29 A semiconductor integrated device and a method for manufacturing the same

Country Status (4)

Country Link
US (1) US4677314A (de)
EP (1) EP0069524B1 (de)
JP (1) JPS583264A (de)
DE (1) DE3278183D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2552575B1 (fr) * 1983-09-27 1985-11-08 Thomson Csf Circuit de commande d'un panneau a plasma de type alternatif
US5016077A (en) * 1985-08-26 1991-05-14 Kabushiki Kaisha Toshiba Insulated gate type semiconductor device and method of manufacturing the same
NL8503331A (nl) * 1985-12-03 1987-07-01 Philips Nv Geintegreerde schakeling bevattende een lastkapaciteit en geintegreerde referentiebron.
US4737667A (en) * 1986-03-11 1988-04-12 Siemens Aktiengesellschaft Driving circuitry for a MOSFET having a source load
JP2728424B2 (ja) * 1988-03-16 1998-03-18 株式会社日立製作所 半導体集積回路装置
US5128823A (en) * 1989-06-14 1992-07-07 Nippondenso Co., Ltd. Power semiconductor apparatus
US5471225A (en) * 1993-04-28 1995-11-28 Dell Usa, L.P. Liquid crystal display with integrated frame buffer
US20080056795A1 (en) * 2006-08-31 2008-03-06 Toshiba Tec Kabushiki Kaisha Ribbon cassette and printer using the ribbon cassette

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3472712A (en) * 1966-10-27 1969-10-14 Hughes Aircraft Co Field-effect device with insulated gate
GB1233545A (de) * 1967-08-18 1971-05-26
US3925120A (en) * 1969-10-27 1975-12-09 Hitachi Ltd A method for manufacturing a semiconductor device having a buried epitaxial layer
US3657568A (en) * 1970-01-05 1972-04-18 Hamilton Watch Co Pulse shaping circuit using complementary mos devices
US3679492A (en) * 1970-03-23 1972-07-25 Ibm Process for making mosfet's
US3997813A (en) * 1975-11-10 1976-12-14 Burroughs Corporation MOS integrated circuit chip for display panels
US4072937A (en) * 1976-01-15 1978-02-07 Bell Telephone Laboratories, Incorporated MOS transistor driver circuits for plasma panels and similar matrix display devices
US4268847A (en) * 1977-09-16 1981-05-19 Nippon Electric Co., Ltd. Semiconductor device having an insulated gate type field effect transistor and method for producing the same
DE2832388C2 (de) * 1978-07-24 1986-08-14 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat
US4223334A (en) * 1978-08-29 1980-09-16 Harris Corporation High voltage CMOS with local oxidation for self-aligned guard rings and process of fabrication
US4232327A (en) * 1978-11-13 1980-11-04 Rca Corporation Extended drain self-aligned silicon gate MOSFET

Also Published As

Publication number Publication date
US4677314A (en) 1987-06-30
JPS583264A (ja) 1983-01-10
EP0069524B1 (de) 1988-03-02
EP0069524A1 (de) 1983-01-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee