DE3269712D1 - Process for manufacturing a semiconductor device using a diffusion step involving a previous implantation step, and device made by that process - Google Patents
Process for manufacturing a semiconductor device using a diffusion step involving a previous implantation step, and device made by that processInfo
- Publication number
- DE3269712D1 DE3269712D1 DE8282402141T DE3269712T DE3269712D1 DE 3269712 D1 DE3269712 D1 DE 3269712D1 DE 8282402141 T DE8282402141 T DE 8282402141T DE 3269712 T DE3269712 T DE 3269712T DE 3269712 D1 DE3269712 D1 DE 3269712D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- previous implantation
- device made
- involving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 title 2
- 238000009792 diffusion process Methods 0.000 title 1
- 238000002513 implantation Methods 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
- H01L21/2233—Diffusion into or out of AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/207—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds further characterised by the doping material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8122167A FR2517120A1 (fr) | 1981-11-26 | 1981-11-26 | Procede de fabrication d'un composant semiconducteur par diffusion avec implantation ionique prealable et composant obtenu |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3269712D1 true DE3269712D1 (en) | 1986-04-10 |
Family
ID=9264399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282402141T Expired DE3269712D1 (en) | 1981-11-26 | 1982-11-24 | Process for manufacturing a semiconductor device using a diffusion step involving a previous implantation step, and device made by that process |
Country Status (5)
Country | Link |
---|---|
US (1) | US4545824A (de) |
EP (1) | EP0080937B1 (de) |
CA (1) | CA1206628A (de) |
DE (1) | DE3269712D1 (de) |
FR (1) | FR2517120A1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60220975A (ja) * | 1984-04-18 | 1985-11-05 | Toshiba Corp | GaAs電界効果トランジスタ及びその製造方法 |
US4632713A (en) * | 1985-07-31 | 1986-12-30 | Texas Instruments Incorporated | Process of making Schottky barrier devices formed by diffusion before contacting |
US4673446A (en) * | 1985-12-12 | 1987-06-16 | The United States Of America As Represented By The Secretary Of The Navy | Method of forming thermally stable high resistivity regions in n-type indium phosphide by oxygen implantation |
US4738934A (en) * | 1986-05-16 | 1988-04-19 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of making indium phosphide devices |
US4818721A (en) * | 1987-07-29 | 1989-04-04 | American Telephone And Telegraph Company, At&T Bell Laboratories | Ion implantation into In-based group III-V compound semiconductors |
JPH01220822A (ja) * | 1988-02-29 | 1989-09-04 | Mitsubishi Electric Corp | 化合物半導体装置の製造方法 |
US5037766A (en) * | 1988-12-06 | 1991-08-06 | Industrial Technology Research Institute | Method of fabricating a thin film polysilicon thin film transistor or resistor |
JPH0383332A (ja) * | 1989-08-28 | 1991-04-09 | Sharp Corp | 炭化珪素半導体装置の製造方法 |
US5374589A (en) * | 1994-04-05 | 1994-12-20 | The United States Of America As Represented By The Secretary Of The Navy | Process of making a bistable photoconductive component |
US6335562B1 (en) | 1999-12-09 | 2002-01-01 | The United States Of America As Represented By The Secretary Of The Navy | Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1098564A (en) * | 1966-09-20 | 1968-01-10 | Standard Telephones Cables Ltd | A method for producing gallium arsenide devices |
US4017887A (en) * | 1972-07-25 | 1977-04-12 | The United States Of America As Represented By The Secretary Of The Air Force | Method and means for passivation and isolation in semiconductor devices |
JPS5459074A (en) * | 1977-10-20 | 1979-05-12 | Toshiba Corp | Semiconductor device |
US4252580A (en) * | 1977-10-27 | 1981-02-24 | Messick Louis J | Method of producing a microwave InP/SiO2 insulated gate field effect transistor |
US4372032A (en) * | 1979-09-04 | 1983-02-08 | The United States Of America As Represented By The Secretary Of The Navy | Normally off InP field effect transistor making process |
US4383869A (en) * | 1981-06-15 | 1983-05-17 | Rca Corporation | Method for enhancing electron mobility in GaAs |
FR2513439B1 (fr) * | 1981-09-18 | 1985-09-13 | Labo Electronique Physique | Procede de traitement de substrat de gaas, par implantation ionique, et substrats ainsi obtenus |
US4391651A (en) * | 1981-10-15 | 1983-07-05 | The United States Of America As Represented By The Secretary Of The Navy | Method of forming a hyperabrupt interface in a GaAs substrate |
-
1981
- 1981-11-26 FR FR8122167A patent/FR2517120A1/fr active Granted
-
1982
- 1982-11-22 CA CA000416107A patent/CA1206628A/en not_active Expired
- 1982-11-24 US US06/444,429 patent/US4545824A/en not_active Expired - Fee Related
- 1982-11-24 EP EP82402141A patent/EP0080937B1/de not_active Expired
- 1982-11-24 DE DE8282402141T patent/DE3269712D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US4545824A (en) | 1985-10-08 |
FR2517120A1 (fr) | 1983-05-27 |
EP0080937B1 (de) | 1986-03-05 |
FR2517120B1 (de) | 1985-05-17 |
CA1206628A (en) | 1986-06-24 |
EP0080937A1 (de) | 1983-06-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |