DE3260721D1 - Vertical junction field-effect transistor and process for its production - Google Patents

Vertical junction field-effect transistor and process for its production

Info

Publication number
DE3260721D1
DE3260721D1 DE8282401016T DE3260721T DE3260721D1 DE 3260721 D1 DE3260721 D1 DE 3260721D1 DE 8282401016 T DE8282401016 T DE 8282401016T DE 3260721 T DE3260721 T DE 3260721T DE 3260721 D1 DE3260721 D1 DE 3260721D1
Authority
DE
Germany
Prior art keywords
production
effect transistor
junction field
vertical junction
vertical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282401016T
Other languages
German (de)
English (en)
Inventor
Pierre Briere
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Application granted granted Critical
Publication of DE3260721D1 publication Critical patent/DE3260721D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/051Manufacture or treatment of FETs having PN junction gates
    • H10D30/0512Manufacture or treatment of FETs having PN junction gates of FETs having PN homojunction gates
    • H10D30/0515Manufacture or treatment of FETs having PN junction gates of FETs having PN homojunction gates of vertical FETs having PN homojunction gates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40Crystalline structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/252Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/978Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE8282401016T 1981-06-16 1982-06-04 Vertical junction field-effect transistor and process for its production Expired DE3260721D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8111838A FR2507821A1 (fr) 1981-06-16 1981-06-16 Transistor a effet de champ vertical a jonction et procede de fabrication

Publications (1)

Publication Number Publication Date
DE3260721D1 true DE3260721D1 (en) 1984-10-18

Family

ID=9259579

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282401016T Expired DE3260721D1 (en) 1981-06-16 1982-06-04 Vertical junction field-effect transistor and process for its production

Country Status (4)

Country Link
US (1) US4505022A (enExample)
EP (1) EP0069606B1 (enExample)
DE (1) DE3260721D1 (enExample)
FR (1) FR2507821A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4550489A (en) * 1981-11-23 1985-11-05 International Business Machines Corporation Heterojunction semiconductor
US4625388A (en) * 1982-04-26 1986-12-02 Acrian, Inc. Method of fabricating mesa MOSFET using overhang mask and resulting structure
JPS59108372A (ja) * 1982-12-13 1984-06-22 Fuji Photo Film Co Ltd 半導体光検出装置及びその製造方法
US4566172A (en) * 1984-02-24 1986-01-28 Gte Laboratories Incorporated Method of fabricating a static induction type recessed junction field effect transistor
US4543706A (en) * 1984-02-24 1985-10-01 Gte Laboratories Incorporated Fabrication of junction field effect transistor with filled grooves
US5264381A (en) * 1989-01-18 1993-11-23 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a static induction type switching device
US5143859A (en) * 1989-01-18 1992-09-01 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a static induction type switching device
FR2679068B1 (fr) * 1991-07-10 1997-04-25 France Telecom Procede de fabrication d'un transistor a effet de champ vertical, et transistor obtenu par ce procede.
FR2693314B1 (fr) * 1992-07-02 1994-10-07 Alain Chantre Transistor JFET vertical à mode de fonctionnement bipolaire optimisé et procédé de fabrication correspondant.
US5260227A (en) * 1992-11-24 1993-11-09 Hughes Aircraft Company Method of making a self aligned static induction transistor
KR100206876B1 (ko) * 1995-12-28 1999-07-01 구본준 모스전계효과트랜지스터 제조방법
FR2855653B1 (fr) * 2003-05-27 2005-10-21 Thales Sa Structure amorphe de couplage optique pour detecteur d'ondes electromagnetiques et detecteur associe

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3851379A (en) * 1973-05-16 1974-12-03 Westinghouse Electric Corp Solid state components
JPS52147063A (en) * 1976-06-02 1977-12-07 Toshiba Corp Semiconductor electrode forming method
US4070690A (en) * 1976-08-17 1978-01-24 Westinghouse Electric Corporation VMOS transistor
US4129879A (en) * 1977-04-21 1978-12-12 General Electric Company Vertical field effect transistor
US4262296A (en) * 1979-07-27 1981-04-14 General Electric Company Vertical field effect transistor with improved gate and channel structure

Also Published As

Publication number Publication date
EP0069606B1 (fr) 1984-09-12
US4505022A (en) 1985-03-19
FR2507821A1 (fr) 1982-12-17
EP0069606A1 (fr) 1983-01-12
FR2507821B1 (enExample) 1983-10-07

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