DE3174752D1 - Method for manufacturing a semiconductor device - Google Patents

Method for manufacturing a semiconductor device

Info

Publication number
DE3174752D1
DE3174752D1 DE8181100998T DE3174752T DE3174752D1 DE 3174752 D1 DE3174752 D1 DE 3174752D1 DE 8181100998 T DE8181100998 T DE 8181100998T DE 3174752 T DE3174752 T DE 3174752T DE 3174752 D1 DE3174752 D1 DE 3174752D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181100998T
Other languages
German (de)
English (en)
Inventor
Koichi Kanzaki
Minoru Taguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3174752D1 publication Critical patent/DE3174752D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0116—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including integrated injection logic [I2L]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P76/40—
DE8181100998T 1980-02-18 1981-02-12 Method for manufacturing a semiconductor device Expired DE3174752D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1869080A JPS56115560A (en) 1980-02-18 1980-02-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
DE3174752D1 true DE3174752D1 (en) 1986-07-10

Family

ID=11978607

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181100998T Expired DE3174752D1 (en) 1980-02-18 1981-02-12 Method for manufacturing a semiconductor device

Country Status (4)

Country Link
US (1) US4377903A (cg-RX-API-DMAC10.html)
EP (1) EP0034341B1 (cg-RX-API-DMAC10.html)
JP (1) JPS56115560A (cg-RX-API-DMAC10.html)
DE (1) DE3174752D1 (cg-RX-API-DMAC10.html)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0051534B1 (en) * 1980-10-29 1986-05-14 FAIRCHILD CAMERA & INSTRUMENT CORPORATION A method of fabricating a self-aligned integrated circuit structure using differential oxide growth
US4539742A (en) * 1981-06-22 1985-09-10 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device and method for manufacturing the same
US4430791A (en) * 1981-12-30 1984-02-14 International Business Machines Corporation Sub-micrometer channel length field effect transistor process
DE3688711T2 (de) * 1985-03-07 1993-12-16 Toshiba Kawasaki Kk Integrierte Halbleiterschaltungsanordnung und Verfahren zu ihrer Herstellung.
GB2172744B (en) * 1985-03-23 1989-07-19 Stc Plc Semiconductor devices
JPH07235602A (ja) * 1994-02-21 1995-09-05 Mitsubishi Electric Corp Ｉｉｌ回路を有する半導体装置およびその製造方法
FR2956242A1 (fr) * 2010-02-05 2011-08-12 Commissariat Energie Atomique Procede de realisation de premier et second volumes dopes dans un substrat

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7700420A (nl) * 1977-01-17 1978-07-19 Philips Nv Halfgeleiderinrichting en werkwijze ter ver- vaardiging daarvan.
US4273805A (en) * 1978-06-19 1981-06-16 Rca Corporation Passivating composite for a semiconductor device comprising a silicon nitride (Si1 3N4) layer and phosphosilicate glass (PSG) layer
US4338622A (en) * 1979-06-29 1982-07-06 International Business Machines Corporation Self-aligned semiconductor circuits and process therefor

Also Published As

Publication number Publication date
EP0034341A1 (en) 1981-08-26
EP0034341B1 (en) 1986-06-04
US4377903A (en) 1983-03-29
JPS6161540B2 (cg-RX-API-DMAC10.html) 1986-12-26
JPS56115560A (en) 1981-09-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee