DE3061678D1 - Method and device for adjusting the phase of a local clock - Google Patents
Method and device for adjusting the phase of a local clockInfo
- Publication number
- DE3061678D1 DE3061678D1 DE8080401021T DE3061678T DE3061678D1 DE 3061678 D1 DE3061678 D1 DE 3061678D1 DE 8080401021 T DE8080401021 T DE 8080401021T DE 3061678 T DE3061678 T DE 3061678T DE 3061678 D1 DE3061678 D1 DE 3061678D1
- Authority
- DE
- Germany
- Prior art keywords
- adjusting
- phase
- local clock
- clock
- local
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
- H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5672—Multiplexing, e.g. coding, scrambling
- H04L2012/5674—Synchronisation, timing recovery or alignment
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7919425A FR2462825A1 (fr) | 1979-07-27 | 1979-07-27 | Procede et dispositif pour la mise en phase d'une horloge locale |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3061678D1 true DE3061678D1 (en) | 1983-02-24 |
Family
ID=9228373
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8080401021T Expired DE3061678D1 (en) | 1979-07-27 | 1980-07-04 | Method and device for adjusting the phase of a local clock |
Country Status (4)
Country | Link |
---|---|
US (1) | US4365329A (de) |
EP (1) | EP0023852B1 (de) |
DE (1) | DE3061678D1 (de) |
FR (1) | FR2462825A1 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4561100A (en) * | 1981-01-20 | 1985-12-24 | Sanyo Electric Co., Ltd. | Digital signal receiver |
US4461002A (en) * | 1981-04-07 | 1984-07-17 | Sanyo Electric Co., Ltd. | Digital signal receiver |
FR2527029A1 (fr) * | 1982-05-14 | 1983-11-18 | Thomson Csf Mat Tel | Emetteur et recepteur de donnees en mode paquet |
JPS5986385A (ja) * | 1982-11-09 | 1984-05-18 | Toshiba Corp | サンプリングパルス生成回路 |
JPS59225640A (ja) * | 1983-06-06 | 1984-12-18 | Nitsuko Ltd | クロツク位相同期方式 |
JPS60182833A (ja) * | 1984-02-10 | 1985-09-18 | プライム・コンピユータ・インコーポレイテツド | リング形式データ通信回路網におけるクロツク回復装置 |
FR2567697B1 (fr) * | 1984-07-13 | 1991-03-29 | Servel Michel | Dispositif de localisation des transitions d'un signal de donnees par rapport a un signal d'horloge et mecanisme de cadrage comprenant un tel dispositif |
FR2604318B1 (fr) * | 1986-09-23 | 1989-03-31 | Thomson Csf | Procede et dispositif de synchronisation symbole et leur application a la demodulation symbole de messages numeriques |
EP0390958A1 (de) * | 1989-04-07 | 1990-10-10 | Siemens Aktiengesellschaft | Verfahren zur Datentaktregenerierung für Datensignale und Schaltungsanordnung zur Durchführung des Verfahrens |
US5228057A (en) * | 1989-11-15 | 1993-07-13 | Telefonaktiebolaget L M Ericsson | Method of determining sampling time points |
EP0472756B1 (de) * | 1990-08-29 | 1995-08-16 | Deutsche ITT Industries GmbH | Signal-Abtrennvorrichtung |
FR2705850B1 (fr) * | 1993-05-25 | 1995-06-30 | Cit Alcatel | Dispositif de rephasage d'un signal numérique transmis suivant une transmission synchrone et susceptible d'être affecté de gigue. |
GB2366971A (en) * | 2000-09-13 | 2002-03-20 | Marconi Comm Ltd | Bit and frame synchronisation |
CN113341680B (zh) * | 2021-06-30 | 2022-05-27 | 广东电网有限责任公司 | 一种用于配电物联网端设备的对时方法及设备 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3594502A (en) * | 1968-12-04 | 1971-07-20 | Itt | A rapid frame synchronization system |
US3701894A (en) * | 1970-09-11 | 1972-10-31 | Nasa | Apparatus for deriving synchronizing pulses from pulses in a single channel pcm communications system |
FR2313827A1 (fr) * | 1975-06-02 | 1976-12-31 | Materiel Telephonique | Systeme de transmission de suites d'elements binaires |
US4034352A (en) * | 1976-02-20 | 1977-07-05 | The United States Of America As Represented By The Secretary Of The Army | Phase control of clock and sync pulser |
US4180701A (en) * | 1977-01-28 | 1979-12-25 | Ampex Corporation | Phase lock loop for data decoder clock generator |
-
1979
- 1979-07-27 FR FR7919425A patent/FR2462825A1/fr active Granted
-
1980
- 1980-07-04 DE DE8080401021T patent/DE3061678D1/de not_active Expired
- 1980-07-04 EP EP80401021A patent/EP0023852B1/de not_active Expired
- 1980-07-25 US US06/172,192 patent/US4365329A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2462825A1 (fr) | 1981-02-13 |
EP0023852B1 (de) | 1983-01-19 |
EP0023852A1 (de) | 1981-02-11 |
FR2462825B1 (de) | 1981-07-24 |
US4365329A (en) | 1982-12-21 |
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