DE29722904U1 - Lamp dimmer circuit - Google Patents

Description

Gerhard Wittmann 1 WS0309

29 December 1997 Rr/ks

Lamp dimmer circuit

The invention relates to a lamp dimmer circuit, in particular in the form of a trailing edge phase dimmer.

The lamp dimmer circuit according to the invention is characterized by the features specified in claim 1 and/or in the further claims and can be inserted like a two-pole between a mains phase (mains voltage input termination) and a lamp connection. The lamp connection can be connected directly to the lamp to be controlled or to an electrical component connected in front of the lamp, for example a ballast. The lamp dimmer circuit according to the invention is suitable for all types of lamps, for example for conventional incandescent lamps, metal halide lamps, low-pressure metal halide lamps and/or halogen lamps. The lamp dimmer circuit enables very low-loss dimming, in particular trailing edge dimming, and thus very good energy utilization. The lamp dimmer circuit is also characterized by good control behavior and by extending the lamp life.

At least one, preferably two, series-connected switching elements, in particular field-effect transistors (MOS-FETs), are inserted between the mains voltage input connection and the output connection. This allows low-loss dimming in both half-waves through appropriate pulse width modulation control of the field-effect transistors without the need for rectifiers and inverters.

In a preferred embodiment, the zero crossings or the polarity of the voltage drop across the switching element series circuit are detected and the switching elements are essentially switched on at the respective voltage zero crossings. These voltage zero crossings can be phase-shifted compared to the mains voltage zero crossings.

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be pushed, especially if a capacitive or inductive (also compensated) load is connected to the output, for example a lamp ballast. By connecting the switching elements to the respective zero crossings of the voltage drop across their series connection, it is ensured that the switching elements do not switch through when high voltages are present, which could lead to considerable interference voltages and load current peaks.

However, the switching off of the switching elements, in particular the field effect transistors, is preferably based on the mains voltage zero crossings and is set to a mains voltage phase angle that depends on the respective dimming level. This enables reliable power control without the risk of damage to the field effect transistors or other components. Furthermore, this results in an optimal extension of the lamp life and very good control behavior.

Preferably, a protective circuit is provided which measures the current flowing through the switching elements and limits or even reduces it in the event of excess current. This not only helps to protect the switching elements, but also increases the lamp life. Furthermore, a gate protective circuit can be provided which limits the maximum gate voltage of the field effect transistors to safe values.

In an advantageous embodiment, a start circuit is provided which, when the lamps are switched on, commands the maximum power supply to the lamp so that it heats up as quickly as possible. This overrides the currently set dimming level during an initial phase so that dimming only begins after this initial time interval has subsided and thus when the lamp has heated up.

For metal halide/halogen lamps, a restart lock is preferably also provided that blocks the lamp from being switched on again for a predefined time interval.

This ensures that the lamp can cool down and is only subjected to a ignition process again when it has cooled down. This also contributes to the service life.

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The dimming level is advantageously set by a setpoint value controller, whereby preferably a minimum and maximum limit of the setpoint value is also provided. This can prevent excessive dimming, which can lead to malfunctions and excessive cooling of the lamp, and also excessive dimming, which can lead to unstable areas close to the mains voltage zero crossings.

The pulse width modulation circuit is preferably connected not only to the zero voltage detector, which detects the zero voltage crossings on the field effect transistor series circuit, but also to a mains voltage zero crossing detector, so that the mains voltage zero crossings are also signaled to it by the edges of the applied square wave signal. This makes it possible to switch on the field effect transistors at the zero voltage crossing in the series circuit, as already mentioned above, and to switch them off, based on the mains voltage phase angle.

The lamp dimmer circuit according to the invention can also be provided with a direct current generator that generates the direct current (for example +12 V) required to supply the control components from the alternating mains voltage. This means that the dimmer circuit according to the invention is self-sufficient and can be handled like a two-pole. Of course, the circuit can also be designed as a three- or four-pole.

The invention is described in more detail below using an embodiment with reference to the drawing.

The embodiment of the lamp dimmer circuit according to the invention shown in the drawing is connected between a mains voltage input terminal L and an output terminal 15 to which the lamp (not shown) or a ballast connected to it or another component is connected. The lamp control circuit contains a series circuit of field effect transistors 13, 13', the

Gerhard Wittmann 4 WS0309

Drain-source paths are in series and carry out the phase control during alternating half-waves of the mains voltage. Parallel to the drain-source paths of the field-effect transistors 13, 13', the reverse diodes 14, 14', which are required for manufacturing technology, are connected in opposite directions. Since these reverse diodes are each conductive during a half-wave, the other field-effect transistor takes over the phase control during this half-wave. The series circuit can also contain resistors 16, 16' connected in series, the common connection point of which is connected to circuit ground. The voltage drop across the resistors 16, 16' is detected by a protective circuit 8, which, if the voltage is too high, i.e. if the current flow through the series circuit is too high, generates an output signal that is fed to a pulse width modulation circuit 6, which controls the activation of the field effect transistors 13, 13' and limits or reduces their maximum conduction angle in the event of excess current. Gate protective circuits 7, 7' are also connected to the gates of the field effect transistors 13, 13', which become active if the gate voltages (voltages between gate and source or drain) are too high and limit the maximum gate voltage. These gate protective circuits can, for example, be formed by Zener diodes.

To adjust the dimming level, the lamp control circuit according to the invention has a setpoint generator 2, which can be controlled by a variable voltage on the input side and/or by a variable resistance value on the input side and outputs a corresponding setpoint (control value) which is fed to the pulse width modulation circuit 6 and causes a corresponding pulse width modulation. The setpoint generator 2 has a galvanic decoupling from the other components of the lamp control circuit according to the invention and can contain a transformer whose secondary winding is fed by an oscillator 1 (oscillation frequency, for example, 100 kHz) and whose primary side is connected to the dimming level control input. Either a control voltage of 0 to 10 V can be applied to the dimming level control input or a variable resistance between 0 and 100 kß can be connected. The setpoint (control value) is formed from this input variable by a secondary-side circuit. The maximum adjustment range of the setpoint generated by setpoint generator 2 is determined by a

Gerhard Wittmann 5 WS0309

Minimum value limiting circuit 12 and a maximum value limiting circuit 11 are limited so that the setpoint cannot fall below a certain minimum value and cannot exceed a certain maximum value.

The lamp dimmer circuit also has a DC voltage generator 3, which is connected to the mains voltage input connection L and, if necessary, also to a mains neutral conductor connection N ₅ and generates the mains sinusoidal voltage into a DC supply voltage of, for example, +12 V, based on the internal circuit ground, which is separated from the neutral conductor potential. This DC supply voltage is used to feed the components of the lamp control circuit according to the invention.

The lamp dimmer circuit according to the invention also has a zero crossing or polarity detector 4, both inputs of which are connected to the mains voltage input connection L and the output connection 15. Between the inputs of the polarity detector 4 there is thus the voltage dropping across the series connection of the field effect transistors 13, 13' (and possibly 16, 16'), which fluctuates sinusoidally (with harmonics). This voltage is converted into a square wave voltage, the edge changes of which occur at the zero crossings of the voltage applied on the input side. This square wave voltage is fed to a control input of the pulse width modulation circuit 6, which generates corresponding switch-on signals for the field effect transistors 13, 13' in response to the edge changes. The field effect transistors 13, 13' are therefore only switched on when there is no voltage dropping across them.

The lamp dimmer circuit according to the invention also has a zero crossing detector 5 for the mains voltage, the inputs of which are connected to the mains voltage input connection L and the neutral conductor connection N. The zero crossing detector 5 converts the input-side sinusoidal voltage into a square-wave voltage, the edge changes of which are at the zero crossings of the input-side sinusoidal voltage. This square-wave output signal of the zero crossing detector 5 is applied to the pulse width modulation circuit 6, which determines the switch-off phase angle depending on the respectively set

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Dimming level refers to the mains voltage zero crossing, i.e. for example, the field effect transistors 13, 13' are switched off at a mains voltage phase angle of 120°. The output signal of the pulse width modulation circuit 6 is fed to the gates of the field effect transistors 13, 13' via the gate protection circuits 7, 7'. The pulse width modulation circuit 6 thus synchronizes the switching on of the field effect transistors 13, 13' with the zero crossings of the voltage drop between the terminals L and 15, whereas the switching off is synchronized with the mains voltage zero crossings (with a dimming level-dependent advance of the switch-off phase angle before the zero crossings).

The dimmer circuit according to the invention also has a start circuit 9, which is active when the lamp is switched on and supplies the pulse width modulation circuit 6 with an output signal for a predetermined time interval of, for example, 1 to 15 minutes, preferably 3 minutes, which causes the field effect transistors 13, 13' to be excited for as long as possible, in particular continuously. During this initial phase, no dimming takes place, but rather maximum power is supplied to the lamp or lamps connected to the connection 15. The lamp is thus quickly heated up to operating temperature after ignition with maximum power. When the output signal of the start circuit 9 has died down, the pulse width modulation circuit 6 carries out the pulse width modulation depending on the set dimming level, gradually changing over to the new target value.

In the lamp dimmer circuit according to the invention, an ignition lock circuit 10 can also be provided, which has, for example, an independent timer and is started when the lamp is switched off. The ignition lock circuit is set to a specific time interval of, for example, 5 to 20 minutes, preferably about 15 minutes, and blocks the pulse width modulation circuit 6 during this time interval. If an attempt is made to switch on the lamp during this time interval, the blocked pulse width modulation circuit 6 blocks any excitation of the field effect transistors 13, 13', so that no current flow to the lamp is possible. The lamp will therefore be forced to cool down. Only after the time set in the ignition lock circuit has elapsed

Claims (14)

Gerhard Wittmann 7 WS0309 Claims 1. Lamp dimmer circuit with a mains voltage input connection (L) and an output connection (15) to which a lamp or an electrical component that can be connected to the lamp can be connected, and with a controllable circuit element arrangement (13, 13') that is connected between the mains voltage input connection (L) and the output connection (15) and contains at least one controllable switching element that is switched intermittently, in particular controlled by pulse width modulation. 2. Lamp dimmer circuit according to claim 1, characterized in that the circuit element arrangement contains a series circuit with two series-connected semiconductor switches, in particular field effect transistors (13, 13'), which control the current flow alternately in each half-wave. 3. Lamp dimmer circuit according to claim 2, characterized by a detector circuit (4) which detects zero crossings or the polarity of the voltage drop across the series circuit and outputs a corresponding output signal to a pulse width modulation circuit (6). 4. Lamp dimmer circuit according to claim 3, characterized in that the pulse width modulation circuit (6) emits a switch-on signal to the field effect transistors (13, 13') upon detection of the zero crossings of the voltage drop across the series circuit. 5. Lamp dimmer circuit according to claim 4, characterized in that the pulse width modulation circuit (6) switches off the switch-on signal at a specific, variable phase angle, based on the mains voltage zero crossing. ft ·» · f* ·* toi Gerhard Wittmann 8 WS0309 6. Lamp dimmer circuit according to claim 4 or 5, characterized by a protective circuit (8) which measures the current flow through the switching element(s) and limits or reduces the current flow in the event of an overcurrent. 7. Lamp dimmer circuit according to one of claims 2 to 6, characterized by a gate protection circuit (7, 7') which limits the maximum gate voltage of the field effect transistor(s) (13, 13'). 8. Lamp dimmer circuit according to one of claims 3 to 7, characterized in that the pulse width modulation circuit (6) is connected to a start circuit (9) which controls the pulse width modulation circuit (6) to supply maximum power for a specific time interval when the lamp is switched on. 9. Lamp dimmer circuit according to one of claims 1 to 8, characterized by an ignition lock circuit (10) which is activated when the lamp is switched off and blocks switching on again for a certain time interval. 10. Lamp dimmer circuit according to one of the preceding claims, characterized by a setpoint generator (2) for setting the dimming level. 11. Lamp dimmer circuit according to claim 10, characterized in that the setpoint generator (2) has a voltage and/or resistance input with galvanic decoupling. 12. Lamp dimmer circuit according to claim 10 or 11, characterized by a maximum value setting circuit (11) and/or a minimum value setting circuit (12) for limiting the maximum value and/or minimum value of the setpoint value output by the setpoint generator (2). Gerhard Wittmann 9 WS0309 13. Lamp dimmer circuit according to one of the preceding claims, characterized by a zero crossing detector (5), the output of which is connected to the pulse width modulation circuit (6) for signaling the mains voltage zero crossings. 14. Lamp dimmer circuit according to one of the preceding claims, characterized by a direct voltage generator (3) connected to the mains voltage input connection (L) for supplying voltage to the functional components of the lamp dimmer circuit.