DE2914329A1 - PHOTOELECTRIC BARRIER - Google Patents

Description

29U329

Photoelectric barrier

The present invention relates to a light barrier. Under light barrier In the following description, a combination of light-emitting and light-sensing arrangements on each side of a surveillance area together with the accessories required to activate these arrangements according to a given course is required and to be in the Ueberwachungsbereich To be able to track down the object located, understood.

Taking into account the above definition, this one refers to Invention in particular on the type of light barriers, which are made up of a plurality of light-emitting arrangements on one side of the surveillance area and from a plurality of light-sensing organs on the opposite one Side of the surveillance area. The light giving arrangements are can be activated and the light-sensing arrangements can also be activated, via a signal generated by an oscillator, in such a way that during one and of the same period of time only one light-emitting arrangement and one light-perceiving one Arrangement are activated at the same time, but for a different period of time other arrangements are activated in pairs, etc.

It is in and of itself already an arrangement for the detection of one in one Surveillance area introduced object known by the object a light beam interrupts, which is generated by a light-emitting arrangement, and thus the light beam is prevented from going to a light-perceiving arrangement to get »If the light reception is interrupted, the light-sensing arrangement designed in such a way that it stimulates an object-detecting arrangement to activate. The light-emitting arrangements and the light-sensing arrangements are controlled with one another via their respective control units. These control units are identical and such that they are consecutive Switch on each of the light-emitting or light-sensing arrangements. As a result, the first light-

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dispensing arrangement and the first light-sensing arrangement switched on at the same time, itfor a different light-emitting arrangement and a different light-perceiving arrangement Arrangement are switched on simultaneously during a second period of time, etc. The two control units are connected to the same clock pulse generator connected. The output signal of the clock pulse generator is intended partly to control the successive switching on of all the light-emitting devices Arrangements serve and partly a corresponding successive switching on all light-sensing arrangements corresponding to the light-emitting arrangements. The signal from the clock pulse generator is also used for activation of a signal comparing circle used during the duration of the clock pulse identify the presence or absence of an output signal from the light-sensing arrangement activated during the duration of the clock pulse can.

Devices of the aforementioned type are already known and come in a plurality different areas to use. The simplest type of application is when a single beam of light generated in a light-emitting arrangement is, arrives at a light-perceiving arrangement, but as soon as the light beam is interrupted by an object, for example a hand, becomes the interrupted one Light reception in the light-sensing arrangement in an electrical one Circuit converted so that thereby the shutdown device of a machine, for example a punching machine.

The present invention assumes that the use of a single Light beam is not sufficient, but the present invention is based on it from having a plurality of light-emitting arrangements on one side of one Monitoring area and a plurality of light-sensing arrangements the opposite side of the surveillance area must be present, so that the monitored area is normally flat. Through this there is a need to determine whether a light beam between a light-emitting arrangement and a light-sensing arrangement during the time period j if the light-emitting arrangement and the light-extinguishing arrangement activated is interrupted.

When a light barrier of the aforementioned type is used in a punching machine comes, the electrical circuits connected to the light barrier are designed in such a way that that the punching machine is stopped as soon as a single light beam among all light beams in the monitoring area of the light barrier through an in The object introduced into the monitoring area, for example a hand, is interrupted will.

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In connection with this area of application, it has proven to be essential Requirement result that all parts contained in the light barrier must be designed and checked during operation in such a way that when they occur a single fault in one or more of these parts, this triggers an incorrect signal, xvelches is usually connected in such a way that it the punching machine is stopped.

If this requirement is met, there is no possibility of an error in a part or accessory evaluates an interrupted light beam incorrectly or not at all and thereby allows the punch to continue working.

Based on the aforementioned requirements, a light barrier results in which should meet the requirements, a very complex system.

A complete analysis in which every combination of errors is dealt with, Cdie Combinations of errors can result from a short circuit, interruption or parameter changes in one component or a unit of the whole complex system) is very time-consuming and for this reason are in the following "Error analysis" only shows certain types of errors.

The present invention builds on the fact that most internal Errors that can occur should cause such a change in the internally generated signals that they are an artificial light beam interruption represent or cause and thereby trigger a false signal or stop signal.

Taking this into account, the present invention is based on the knowledge that parallel to the switch-on cycle of the light-emitting and the light-perceiving Arrangements, a calculation chain should work. This arithmetic chain is provided in order to interact with another organ to generate a Signal with the same frequency and timing as those of the light-perceiving Arrays are received with uninterrupted beams of light. The output signals from the light-sensing arrangements can then be combined with the output signal the arithmetic chain can be compared in terms of time, phase and polarity and only if there is no agreement an output signal in the form generate a false signal, stop signal or alarm signal.

In the construction of the exemplary embodiment, according to the present Invention, it was assumed in the aforementioned error analysis that the Immediately identify most errors as errors in the clock, zero point, synchronization or received pulses. An error in one of these pulses means that one or more of these pulses result in a signal image which is different from the signal image of an intact channel deviates and this can trigger a false signal

29U329

So that all errors can be recognized in the above-mentioned way designed the circular solutions chosen for the present invention in a special way. The following error analysis is therefore for the sake of simplicity Above all, only deal with the more complex types of errors that have directly guided the choice of the circular solutions given in the exemplary embodiment.

In light of the foregoing, it is a purpose of the present invention, instruction to give over two separately working channels, in which light-donating Arrangements and light-sensing arrangements, as well as control equipment in which a channel (Α-channel) is included, a calculation chain and the associated Control equipment, however, is contained in the other channel (B-channel) and that the signals generated by the arithmetic chain and those of the light-sensing ones Arrangements received output signals are compared for time, phase and polarity in order to be able to evaluate in a comparator circuit whether there is an error signal triggered, i.e. should be activated, or not.

It is also a purpose of the present invention to provide instruction about a possibility to give to use one and the same oscillator to generate the so-called clock pulses, to both the light-emitting and the light-perceiving Arrangements so that these can be activated in pairs. This oscillator should be crystal controlled and can be controlled by a phase lock Control the second oscillator in order to be able to generate an equivalent signal, which is used in a computer chain and the associated control equipment can be.

Another purpose with the present invention is to provide synchronization pulses to be generated for a predetermined period of time, during this period of time an artificial error occurs and if an error occurs occurs in other time segments, a synchronization pulse is generated in the wrong time segment, with asynchronization resulting in a certain Requires time interval between synchronization pulses.

Another purpose of the present invention is to send synchronization pulses in to produce the organ which is intended to operate the light-emitting arrangements. The synchronization pulses are partly connected to the arithmetic chain and partly connected to the organs for light perception.

Another purpose is that during a certain section an output signal from the receiver always corresponds to an interrupted light beam (dark) and during another specific section the output signal of the Receiver correspond to an uninterrupted light beam (bright).

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Another purpose of the present invention is that the light-emitting arrangements only during a fraction of the section, preferably half, are activated.

Ultimately, it is a purpose of the present invention that only one pair of light-emitting and light-sensing arrangements is switched on at the same time
and control circles are available for this purpose.

Furthermore, the sequence for a light-emitting arrangement should be during a Match the order of the light-sensing arrangement and during the following period of time, other arrangements should be activated in pairs, but not those in the sequence are immediately next to it.

What is primarily indicative of a light barrier according to the present Invention can be viewed, goes from the characterizing part of the claim 1 emerged. A currently proposed embodiment, which has the particular characteristics for the present invention, is indicated with reference described in more detail on the attached drawings, in which

Fig. 1 shows a block diagram of a light barrier,

Fig. 2 shows a connection diagram via a central unit, which shows a number of printed circuits, power supply plates and a number
Contains relay plates, as well as connection sockets for the transmitter unit and receiver unit,

FIG. 3 shows a printed circuit board belonging to the Α channel, which is shown in FIG
is included,

FIG. 4 shows a printed circuit board belonging to the B-channel, which is shown in FIG
is included,

Fig. 5 shows the transmitter unit of the light-emitting arrangements,

Fig. 6 shows the receiver unit of the light sensing arrangements,

7 shows the light scattering angle of each of the light-emitting arrangements, as well as shows an object introduced into the surveillance area,

Fig. 8 shows different pulse shapes for signals on the circuit board can occur according to Fig. 3,

Fig. 9 shows different pulse shapes for signals on the circuit board can occur according to Fig. 4,

Fig. 10 shows different pulse shapes for signals that are in the receiver unit can occur according to Fig. 6 and

Fig. 11 shows different pulse shapes for signals that are in the transmitter unit according to Fig. 5 can occur.

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With reference to FIG. 1, a block diagram according to the principle of present invention constructed light barrier shown, which consists of a plurality of light-emitting arrangements S1, S2, S3 ... Sn, mounted on one Side of a monitoring area 1a, as well as a plurality of light-sensing arrangements M1, M2, M3 ... Mn, attached to the opposite side of the Monitoring area. The monitoring area 1a received due to the alignment the arrangements SI-Sn and arrangements MI-Mn have a flat extension. Both the light-emitting arrangements SI-Sn, as well as the light-perceiving arrangements M1-Mn can be activated via signals in the form of pulses that are generated by an oscillator 2, so that during one and the same time segment only a light-emitting and a light-perceiving arrangement activated at the same time and other arrangements are activated in pairs during another period of time. In the exemplary embodiment according to FIG. 1 it was shown that a Oscillator 2 is arranged so that it has both the light-emitting via a line 2a Arrangements, as well as the light-sensing arrangements can control. The signal of the oscillator 2 on the line 2a is also at one input, the clock pulse input, connected, for a flip-flop 10. However, nothing prevents these arrangements 3 and 4 from each of their oscillator can be controlled, but in this case the two oscillators must be locked together.

All light-emitting arrangements SI-Sn are housed in a transmitter unit 3, whereas all light-perceiving arrangements in one receiver unit 4 are housed.

The transmitter unit 3 is designed so that the synchronization pulses can be generated, as will be described later in more detail, and these can be transferred via a line 3a. Some of the synchronization pulses arrive to the receiver part 4 and partly to a computation chain 5, to in certain time segments delete the calculator. The arithmetic chain 5 is controlled by an oscillator 6. The oscillator 6 sends so-called clock pulses partly to the arithmetic chain 5, partly to the clock pulse input of a flip-flop 7 via a line 6a. The receiver unit 4 sends over a line 4a signals correspondingly received Light intensities at one input of an EXCLUSIVE-OR gate 8, as well as on another similar gate 9. The output of the gate 8 is over a Line 8 'in connection with a data input of the flip-flop 10, the output of the gate 9 is connected to a data input via a line 9 ' of the flip-flop 7.

The other input of the gates 8 and 9 is via a line 5a to the computer 5 connected. If the signal image on line 5a exactly matches the phase

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if the signal pattern on the line 4a is the same, the signals are available lines 8 'and 9' high. A short or long dear instinct between signals 5a and 4a result in a low level on lines 8 'and 9', respectively. If at least one of the flip-flops 7 or 10 changes its setting, a Signal corresponding to a beam interruption signal to the downstream control equipment sent to the punching machine. Normally, in a faultless system, the ratio should prevail that in the case of a real interruption of the radiation both flip-flops change their position at the same time.

A subsequent monitoring device 11 (in the attached drawing not shown in detail) checked that the two flip-flops 7 and 10 at the same time switch and assume the same state. If there is a discrepancy between the flip-flops 7 and 10, a signal is received which the system sends through a so-called channel deviation blocks.

From Fig. 1 it can be seen that one and the same oscillator 2 for generating Clock pulses to both the light-emitting arrangements in the transmitter unit 3, as the light-sensing arrangements are also provided in the receiver unit 4, in order to be able to activate pairs of the arrangements at the same time. The oscillator 2 is preferably crystal controlled and via a phase lock and the line 2b, the oscillator 2 controls the second oscillator 6 in order to send a signal to the arithmetic chain 5 to generate. The second oscillator 6 can preferably consist of a voltage-operated Oscillator CVCO).

The oscillator 2, the transmitter unit 3, receiver unit 4, gate 8 and flip-flop 10 are contained in a so-called Α channel (denoted by A in FIG. 1), on the other hand the oscillator 6, the computer 5, the gate 9 and the flip-flop 7 are contained in a so-called B-channel (denoted by B in FIG. 1).

As far as the physical structure of the design is concerned, it can be mentioned that this happens via printed circuits on printed circuit boards.

Accordingly, the transmitter unit 3 was built on a circuit board (Fig. 5), the receiver unit 4 in turn on another circuit board (Fig. 6). A central unit (Fig. 2) has connecting pins to the transmitter unit 3 and the receiver unit 4 and includes a power supply board 21, a printed circuit board 24 for the Α-channel and a printed circuit 25 for the B-channel, as well as one Number of relay plates 22 and 23 on which the relays for the earlier mentioned Monitoring device are attached.

The transmitter unit 3 and the receiver unit 4 have their own power supply equipped.

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The signals from and to the transmitter unit 3 and receiver unit 4 are transferred an opto-switch.

Thus, in Fig. 2 is a connection diagram including the above-mentioned printed Circuits, shown. The circuit board 21, which consists of a power supply board and the parts contained on this plate do not form an essential part of the present invention and therefore did not described in more detail. However, the power supply board 21 includes a lot of details and components that make it possible to generate the voltages required for the system. The central equipment shown in Fig. 2 contains a logic board 24, for the Α-channel, a logic board 25 for the B-channel, which follows but to be described in more detail. There is also a relay plate and a relay plate 23, of which the relay plate 22 comprises two by three relays, which are used for outputting the necessary control signals to, for example, a press are provided, whereas the relay plate 23 contains relays for monitoring the functions of the relays on plate 22 are provided.

A connector socket with a connector pin on the transmitter unit 3 was given the informational designation 26 and a connector socket with a connector pin of the receiver unit 4 has been given the reference designation 26a. Via a connection socket it is possible to connect different functions to the light barrier, depending of which function is current. In the figure there is a clamp for "single cycle and protection" on the left and one on the right Clamping for "one-stroke and two-stroke" shown, referring to the different Relate operating modes of the punching machine.

FIG. 3 shows a connection diagram via the logic board 24 indicated in FIG shown. The connection of the oscillator 2 is evident from FIG. 3, and the outgoing signal of the flip-flop 10 is consequently connected via the line 2a '. The outgoing signal from the oscillator is sent to the transmitter unit via the line 2a 3 and receiver unit 4 connected. The oscillator 2 itself is connected to an IC circuit CCD 4024 BE) 31 and in this the frequency of the oscillator is divided.

In the execution example it was shown how half the divided frequency over a line 2b is transmitted to the oscillator 6.

The output signal of the oscillator is via a line 2a * to the clock pulse input of IC circuit 10 (CD 4013 BE) connected. This circle consists of the flip-flop 10 in FIG. 1. The flip-flop 10 is in connection with others Flip-flops (IC circles CD 4027 BE) 34a and 34b. An interruption in the light barrier causes the flip-flop 10 to flip over. This eliminates the normal

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wise "1O" -set flip-flops or computers 34a and 34b set to "00". When the computer output goes high for 34b, the J input of the computer 34a goes high, opening the clock pulse input of the computer to which the Synchronization pulse is connected. At the end of the search process, computers 34a and 34b therefore count on "01", but if there are obstacles, this will be reset to "00" for the next round of searching. Only after elimination of the obstacle and after two synchronization pulses have passed, the "10" position occurs, whereby the J input goes down and stops counting. This ensures that a completely uninterrupted search cycle has to be carried out before a clear signal is given again. The circle 34b is connected to the IC circle (CD 4027 BE) 34c and 33, which is used to generate signals that were previously mentioned different types of control are provided.

The IC circuit 33 is in communication with the IC circuit (9668 PC) 35, the one Operating circuit for the relays on the relay plate 22 represents. The IC circuit CCD 4070 BE) 37 consists of the gate 8 in FIG. 1.

The synchronization pulses are connected via opto-switch 36, whereas the receiver pulses are connected via opto-switch 36a.

4 shows a connection diagram for the logic board indicated in FIG shown.

The oscillator 6 consists of an IC circuit (CD 4046 BE) 44 with a phase comparator, the clock pulses on the line 6a 'emits. The output signal is in an IC circuit CCD 4013 BE) 44a divided into half the frequency, which is fed back and compared in the phase comparator with the signal on line 2b.

As a result, the oscillator 6 is blocked so that its output signal on the Line 6a becomes equal in frequency and phase to the signal on line 2a '.

On the line 6a 'pulses appear in two interconnected IC circuits CCD 4029) 43 and 43a. These are clamped at 43b in such a way that the arithmetic chain 43, 43a gives an output signal 5a which is inverse to the signal image of an uninterrupted light signal 4a. The pulse on line 6a 'is also extrapolated in another arithmetic chain (IC 4029 BE) 43e and 43f. This arithmetic chain 43e, 43f is synchronized by the synchronization signal on the line 3a and in turn gives a synchronization signal to computers 43 and 43a. In the "Protection" control mode, an incorrect interrupt signal is generated in the B channel. This is done via the opto switch

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- 14 40a introduced and locks the computer 43 and 43a in the ¹¹ O "position.

The output signal on the line 5a is fed to the IC circuit CCD 4070 BE) 47 and represents gate 9 in Figure 1. The sync pulse on line 43g is connected to circuit 42. The circle 47 is in connection with the IC circle (CD 4013 BE) 42a, which in turn with the IC circles (CD 4027 BE) 42, 41, 41a, 41b and 45 cooperate in a similar way to FIG. 3.

In Fig. 5 a connection diagram via the transmitter unit 3 is shown. This carries 23 light-emitting arrangements SI-Sn (where n = 23). Any arrangement, for example S1, becomes through an associated transistor 5: 0a and a load resistor 50b operated.

The respective base of these transistors 50a is connected to three IC circuits (CD 4051 BE) 51, 51a and 51b connected, which in turn cooperate with a similar circle 51c. The circle 51c is in connection with an IC circle (CD 4024 BE) 54.

An IC circuit (CD 4013 BE) 56 is intended to generate a synchronization pulse, which is generated in a comparator unit 55. Clock pulses on line 2a pass through a comparator circuit 58.

In Fig. 6 a connection diagram via the receiver unit 4 is shown. These carries light-sensing arrangements in the form of photo-transistors MI-Mn (where n = 23) with associated resistors 60a and 60b. These transistors (TIL 81) are connected to three IC circuits (CD 4051 BE) 63, 64 and 65, which in turn cooperate with a similar IC circuit 61a. The circle 61a stands in connection with an IC circuit (CD 4024 BE) 61 (computer).

The clock pulses on line 2a pass through a comparator 62 and a monitoring circuit (Comparator) 62a to computer 61.

The synchronization pulses on the line 3a pass through a comparator 69 and a monitoring circuit (comparator) 69a for computer 61.

With the help of multiplex circuits 63, 64 and 65 during each time period only one of the transistors turned on and the information received is passed on to an IC circuit (CA 3130 BE) 67, the output of which is via a Capacitor 68 is in connection with an IC circuit (CA 3130 BE) 66, which in turn is in connection with an IC circuit 66a (comparator) whose output signal is fed to line 4a.

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The radiation diagram for the type of light emitting diodes S1 or phototransistors M1, which are used on the respective side of the monitoring area 1a and which emerge from FIG. 7, make a control necessary required that only one diode or transistor is activated at the same time. It is assumed here that the transmitter S1 and the receiver M1 have the same radiation diagram.

From Fig. 7 it can be seen that a light emitting diode S4 has a light effect on several Receiver can transmit simultaneously, namely M1-M7 and it is therefore necessary to check that only one transmitter and one receiver are switched on at the same time, so that there is no indication that an object is located 70 is located in the monitoring area, is lost.

In Fig. 8 different pulse shapes are shown for signals that are on the circuit board according to Fig. 5 can occur. In FIG. 3, the reference designations 8a-8i have been used to indicate where these signals occur. Under periods 4 and 5 a beam interruption was indicated in FIG. 8f.

In Fig. 9 different pulse shapes are shown for signals that are on the circuit board occur according to FIG. 4. In FIG. 4, the reference designations 9a-9e have therefore been used to indicate where these signals occur. In Figs. 9g and 9f the setting of the computer during different periods of time is shown with numbers specified. In Fig. 9h the pulse shape in the B-channel is shown with a dark pulse.

In Fig. 10 different pulse shapes are shown on signals that are in the Receiver unit according to FIG. 6 occur. In Fig. 6, therefore, the reference designations 1Oa-IOc drawn in for the current pulses.

Fig. 11 shows different pulse shapes for signals in the signal unit according to Fig. 5 occur. For this reason, the reference designations 11a-11i for the current pulses have been drawn in in FIG. 5. In Fig. 11c 'and 11d' it is indicated that two transmitters S7 and S8 are activated at the same time and, as this results in an extra synchronization pulse in FIG. 11g.

FUNCTIONAL DESCRIPTION

A channel

The frequency of the clock pulse is divided up in the computer 54 and decoded in this way, that the outputs on 51, 51a and 51b are activated one after the other. It should be noted that the time during which the light-emitting diode is lit is exactly one

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as long as the period precedes during which all diodes are switched off are. During this time, the receiver zero point is matched. A search cycle has 25 periods. The LEDs are only activated during the first twenty-three. After a complete search cycle, the Transmitter plate sends a synchronization pulse to the receiver plate and the central unit away.

The outputs of the decoder 51, 51a and 51b are not switched in such a way that the LEDs are lit in a sequence, e.g. from top to bottom. They are instead switched in such a way that the light beam is in groups of approx. 8 diodes "jumps". The light-sensing arrangements MI-Mn are also open procure the same way. The reason for this is described in more detail under error analysis.

After the radiation diagram for the type of light emitting diode or phototransistor that are used in the light barrier is relatively wide, must be checked be that only a single diode or transistor is activated at a time. Errors in the decoder or computer could, for example, include cause several LEDs to be lit at the same time.

This control is done in the transmitter part by the fact that the current through the for all light emitting diodes common resistance 54 is measured with the comparator 55.

Each scan cycle is tested to ensure that this measurement really works the diode "No. 25" is replaced with a resistor (54a), the corresponding gives more current than a switched-on diode. The error signal thus obtained is used as a synchronization pulse on the receiver and the central unit and at the same time the computer 54 is set to zero, which switches it on which controls the light emitting diodes. Possible errors in computers, decoder or synchronization circuits mean that synchronization pulses fail to appear or occur with a periodicity that deviates from 25 periods (50 clock pulses). Due to the structure of the B-channel, this means that The A and B channels are out of synchronization, i.e. an error occurs that is equivalent to a constant beam interruption.

Corresponding decoders are located on the receiver plate according to FIG. 6 63, 64 and 65, as on the transmitter plate according to FIG. 5. The computer 61 divides the clock pulses. The synchronization signal from the transmitter ensures that the Receiver starts with the correct phototransistor and in the correct phase. The various phototransistors are connected to analog multiplex devices

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63, 64 and 65, isolation amplifiers 66 and 69 and capacitor 68 to the comparator (66a) switched on. During the first half cycle of a switch-on interval (corresponds to the LED deleted), the capacitor is discharged to the reference voltage "L-" when the field effect transistor V30 conducts. During a measurement of the light during the following half cycle, the dark current of the charge is therefore balanced via the capacitor.

When the light emitting diode is lit, you get a level change, its Level depends on how much light hits the phototransistor. With obstacles The level change does not occur in the beam path or faults in the phototransistor or the light-emitting diode.

None of the diodes was lit during the 24th period of the search process. During this period, only the dark current is measured, i.e. the output voltage should be low over the entire period. Possible errors in the amplifier, connection capacitor or comparator that result in an incorrect signal could be discovered through it. No light emitting diode is lit during the 25th period of the search process. The output voltage of 66 so could be low during this period as well. The resistor R90 generates a level during the last part of the pulse 25 which corresponds to the corresponds during a light pulse. Even if all the beams are interrupted, the pulse 25 is high. Regardless of how many beams are interrupted are, the output signal of the receiver can never be purely periodic or static. The output signal of the comparator 66a is switched via an opto-switch 36a guided into the plate 24 of the central unit.

Just like in the transmitter part was monitored that only a single light emitting diode is ignited at a time, it is checked in the receiver part that the phototransistors can be switched on individually (via circle 69a). More than one transistor switched on leads to the search process - as with the transmitter automatically goes back to the zero position. The function of the monitoring circuit is tested during each search process by the synchronization signal of the transmitter goes over this circle 69a. More than a phototransistor or fault in the monitoring lead to the fact that the sender and receiver become asynchronous, i.e. recognized as "ray interruption". The test that only one phototransistor is switched on is done via resistor 60a. A possible interruption in one of these would mean that it cannot be determined whether the corresponding phototransistor is together with another phototransistor is switched on. Another monitoring circuit, the comparator 62a, tests therefore, that at least one resistor is always switched on. The function

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This monitoring is used to test that the clock pulses are normally go through circle 62a. A break in one of the resistors 60a lowers the output of the comparator 62a, further clock pulses cannot pass and the search on the receiver side stops, i.e. during the following clock pulse period beam interruption is displayed.

The light barrier contains 23 diode-transistor pairs, but can easily be extended to 62 Pairs are expanded by using the computer outputs Q1, Q2 and Q3, as well as the "enable outputs" for another 5 IC circles CD 4051 from the computer 61 or the Multiplex circuit 61a are pulled out.

B channel

A pulse train is generated in the B-channel, as it is normally done by the receiver is obtained if the beam is not interrupted. This "wrong" pulse sequence comes from computers 43 and 43a. The synchronization pulse from the Α channel is used to start the computer in the correct phase.

Applying this pulse directly to synchronize the B-channel harbors that There is a risk that both channels will be blocked if the synchronization channel is different is constantly moving upwards or is given a repetition frequency that is the same as or higher than the clock pulse. This means that none Beam interruption can be determined.

When the repetition frequency of the synchronization signal is lower than If the clock pulse frequency is different from the normal, this means that part of the light barrier is never switched on after both the Start the A and B channels again before a full scan cycle has expired. But this also means danger.

For this reason, the computer does not allow the synchronization pulse to control that generates the B signal. Instead, the synchronization pulse should Bring another computer, 43e and 43f to zero, which in turn generates the synchronization pulse at 43 and 43a. So that the computers 43e and 43f can emit a synchronization pulse, the synchronization pulses arriving in the B-channel must not occur closer than every 50th clock pulse. The above Error thus only blocks computers 43e and 43f, whereas computers 43 and 43a, which generates the B signal continues asynchronously after the synchronization signals fail to do so. This leads to a constant beam interruption signal .

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An error on the computers 43e and 43f with surrounding circles means one harmless state after the Α-channel is not influenced. Errors can only result in asynchronization between the A and B channels, i.e. beam interruption, to lead.

9 shows the pulse diagram for the generation and synchronization of the B channel. The settings of the two computers 43e and 43f and 43 and 43a, respectively, have been given in FIGS. 9a and 9f.

In the "protection" position, an incorrect interrupt signal is generated in the B-channel. This is introduced via the opto-switch 40a and locks the computers 43 and 43a in position "0".

As already mentioned, there are EXCLUSIVE OR gates in both the A and B channels 8 and 9, in which the signals of the two channels are compared. It should be noted that the B-channel is phase swapped in relation to the Α-channel is. As long as there is no obstacle in the beam bundle, so are Both channels are different and the EXCLUSIVE OR gate outputs are high. Obstacles give the channels equality and the exits are thus located low.

After the EXCLUSIVE-OR gate there is a D flip-flop, which is controlled by A or B-clock pulses is clocked. The phase position is such that at every switch-on interval the output signal of the EXCLUSIVE-OR gate is supplied for the first time when the transmitter diodes are not activated and a second time when the transmitter is activated. See Fig.

When the calculator output goes high for 34b, the J input of calculator 34a goes high and this opens the clock input of the computer to which the synchronization pulse is connected. Therefore, at the end of the search round, do the math the computers 34a and 34b up to "01", but if there are still obstacles, it is brought back to position "00" during the next search round. First after the obstacle is removed and two synchronization pulses passed position "10" is reached with the J input going low and counting on locks. This ensures that a completely uninterrupted search cycle must run before a clear signal is issued again.

Output circles - different modes of operation

The light barrier is connected to the control system for eccentric presses via relays switched on: 22a (protection A) or, 22c (single-cycle A) and 22b (two-cycle A) or 22a *, 22c "urid" 22b:

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The start condition for the press is that all relays 22a, 22b and 22c are pulled, while relays 22a ', 22b' and 22c 'are released.

Another group of relays, 23a, 23b and 23c monitor the other relays (all relays have positively controlled contacts). The switching of the relay 22a, 22b or 22c and the corresponding relay 22a ^ 22b 'and 22c' must happen within a certain time so that the relay 23a, 23b or 23c does not drop.

The control system controls the light barrier with a signal, which is normally is interrupted during a minimum of 200 ms with upward movement. This signal is used somewhat differently in the different driving styles can be adjusted by clamps 27 in the control system.

Failure analysis

In order to clarify the interaction of the different parts, an error analysis of the more complex error types is carried out. failure The components that occur in front of the flip-flops 7 and 10 are discovered within a scan cycle time, i.e. they become a continuous one Interrupt signal result in that either the receiver pulse fails between transmitter and receiver or between A and B channel, or there is asynchronization occurs. Even after gates 8 and 9, most errors are found within a scan cycle time and in no case can a single fault be replaced and the protective function can continue until the next pressing process stay without triggering a stop.

Error in light emitting diode or photo transistor

Errors that can occur here are, for example, interruption, short circuit, degeneration (weaken). These are detected when one or more light pulses fail to arrive at the receiver and this causes a constant interruption signal on.

Operation at the recipient

Operation at the receiver, i.e. operation in the preamplifier 66 and 67 or comparator 66, scatter in the connection capacitor 68, faulty FET (V 30), whereby a light pulse could arise even if there is an obstacle in the beam path result in a deviation (beam interruption) during the pulse position 24 after this pulse should normally be dark.

Also other errors in the receiver that lead to a static output or self-oscillation lead, are recognized as a deviation (beam interruption).

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Short circuits in the connection capacitor 68 lead to a static output signal and thus deviation after the output of the amplifier 67 is at approximately -8V, whereas the comparator level 66a is at -5V.

Errors in the search circles

More extensive errors, i.e. errors on several bits in computers 54 and 61 or with the multiplex circuits 51, 51a, 51b and 5ic, as well as 63, 64, 65 and 61a are immediately recognized as a deviation (beam interruption).

But there are a number of errors in computers and multiplex circuits that do not lead directly to a beam interruption signal, i.e. in "holes" would result in the light barrier. Such errors are e.g. simple bit errors on the computer, short circuit between a pair of multiplex outputs or low inhibition inputs on more than one multiplex circuit at the same time. So that these errors also result in a beam interruption signal, some special circular solutions have been introduced, such as monitoring, that only one diode or transistor is activated at a time, jumping light beam, as well as a special synchronization process.

Bit error

If one of the computer outputs 54 and 61 is statically high or low (or follows another output), this means that some diodes (or transistors) are activated several times during the same scan cycle time, whereas others are not activated at all, i.e. a "Hole" in the light barrier.

If the radiation lobe of a light-emitting diode (or a phototransistor) so would be narrow that it would only hit the corresponding phototransistor (light diode), such an error would be discovered immediately after expected Light pulses would be absent.

It assumes that both are not exactly the same bug at the same time can occur on the sender as well as on the receiver side.

The width of the radiation lobe for the current distance is between Sender and receiver approx. 8 beam distances (distance between adjacent Senders or receivers); so there is not enough to detect errors in the am to be able to discover few identifying bits. By connecting light emitting diodes or transistors in such a way that the light beam is 8 beam distances jumps from plus to plus, this problem can be solved. On two occasions, when the multiplex circuits 63 to 64 to 65

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however, this distance is only one beam distance. The same is true 51, 51a and 51b in the transmitter unit 3. However, a bit error always results in errors in more than two occasions the discovery of this combination of errors ensures.

Error in the multiplex circuits

Bit errors are discovered in the same way as with computers. failure which result in several light emitting diodes or phototransistors at the same time activated, could mean that there are "holes" in the light barrier appeared. However, special circuits in the transmitter and receiver monitor that only one pair is activated at a time. If this surveillance determines that more than one pair are turned on, the end result is a beam interruption .

On the receiver side, it is switched on via resistor 60a. In order to the switch-on monitoring works, it is necessary that these resistors 60a are whole and therefore it is necessary that these are also checked with regard to interruption. Short circuit does not require any special monitoring, after this produces the same effect as switching on two phototransistors.

The interruption monitoring takes place by means of a special circle 62a, over which the clock pulses normally go to the computer 61, which do the search steer. In the event of a possible interruption, the clock pulse is prevented from reaching the computer 61, which leads to asynchronization between the receivers and transmitter, i.e. a beam interruption signal.

Synchronization pulse generation

A synchronization pulse is generated in the transmitter part, which is sent to both the receiver part as well as the B-channel. Possible errors on the part of the synchronization pulse generation, which is common for all parts, can, If no special measures are taken, open both channels or ensure that parts of the light barrier are never switched on. Both these conditions are dangerous. For this reason, the B-channel was designed that it is only ready to receive synchronization pulses that are received at the correct time interval and the correct phase position. A mistake that led to it leads to the fact that these conditions are not fulfilled (phase-shifted signal, wrong repetition frequency), can in no case prevent the B-channel from to generate a signal image that does not include at least 25 periods, where-

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by means of an error display, which appears as asynchronization between A- and B-channel occurs. The synchronization circuits in the B-channel influence the A-side not and any errors in this will for this reason also show up as asynchronization, i.e. beam interruption signal.

Clock pulses

The failure of clock pulses (static, indefinite or noisy) outside or within the transmitter and receiver parts, leads to asynchronization and thus a beam interruption signal and usually also channel deviation.

A oscillator

ο The oscillator stops:

Outgoing clock pulse is high or low. Search process stops. The pulse from the receiver goes high or low. The oscillator of the B-channel remains at its basic frequency, which is why a stop occurs. partly as a ray interruption in the B-channel, partly as a channel inequality.

ο Frequency of the A channel:

If the frequency of the channel is outside the capture range of the phase lock of the B-channel oscillator, asynchronization occurs between the A and B channels, which leads to a beam interruption signal.

ο Missing in divisor 31 so that 8a = 8b:

Starting clock pulse receives wrong pulse width and phase position. Stop due to Beam interruption signal due to asynchronicity.

ο Error in the inverter for signals 8a and 8b or AND gate 31a.

Outgoing faulty clock pulse. Phase mismatch between the channels. Beam interruption signal.

ο Error in transistor 31b.

The search process stops or becomes asynchronous. Beam interruption signal .

B oscillator

The phase lock signal from the Α channel remains off (high or low), or the difference in frequency between the A and B channels is too great. The B oscillator remains at its base frequency _a stop by beam interruption signal

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- 24 through asynchronicity.

ο Error in oscillator 44:

The phase lock input is locked to + or -. The Α oscillator will not influenced due to the resistance in between. Beam interruption signal .

ο Interruption in the resistance of the phase blocking line: results in asynchronicity between the A and B channels. Beam interruption signal.

ο Phase blocking occurs at a frequency that is half the clock pulse frequency matters.

Errors in oscillator 44 mean that the oscillator stops, but the output that follows the incoming signal from the channel A oscillator, would not be detectable if the incoming signal had the same frequency and phase as the outgoing clock pulse. Possible later Errors in the Α oscillator would result in a state with both oscillators bring to a standstill. If, however, the phase comparison occurs at half the frequency, the above-mentioned error in the oscillator 44 leads to the fact that the frequency of the B cycle also drops by half, which leads directly to the beam interruption system due to asynchronicity.

ο Errors in both computers 43, 43a, 43e and 43f: This means, just like in nearby circles, a failure of the B signal or a faulty B signal (pulse 24). Beam interruption signal and event. Channel inequality.

ο Error in the inverter for the clock pulse input to flip-flop 7 or 10: This either leads to the failure of the clock pulse signal to the flip-flop, with the result that the output of the affected channel is switched over has to happen with every pressing process, i.e. the monitoring relay falls (channel deviation), or it leads to the wrong phase position on the clock pulse signal, which leads to a stop due to the beam interruption signal leads. The channel not touched retains the protective function during the entire pressing process.

Receiver pulse

The receiver pulse on the line 4a goes into the circuit board 24 via a Opto-switch (36) and a pulse modulator (comparator). Errors in these circles can lead to the receiving pulse being sent to gate (8)

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becomes neither static nor noisy. In both cases, both channels will detect a constant beam interruption.

Channel comparison

The critical point when comparing channels are gates 8 and 9 (37 and 47), after the two channels are connected to each other on the input side. As a result, you have to make sure that there is a fault in one of the Gate does not also disable the other channel. This is done by connecting resistors to the inputs of the gates.

ο output at gate 8 or 9 short-circuited with + or indefinite, (Oscillation, interruption).

The protective function of the other channel is retained. The faulty one Channel can result in a stop in an indefinite position. If there is no stop before the next pressing process, after the monitoring signal falls, in that there is no counting up of single-cycle 34c or 41a (and two-cycle skipper 33 or 41b) in the faulty channel.

ο Gate output 8 or 9 is low.

This results in a beam interruption signal and possible channel deviation.

ο Gate input 8 or 9 briefly connects to + and earth.

This results in a beam interruption signal in at least one of the channels and possibly channel deviation.

ο Short circuit between the gate inputs.

This results in a beam interruption signal in at least one of the channels and possibly channel deviation.

ο interruption in one of the gate inputs (indefinite NieVeau).

This leads to a beam interruption signal after the input signals have to change after a certain sequence.

ο The output follows one of the inputs.

Beam interruption signal and channel deviation after the exit should normally be high.

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ο One or both inputs follow the output.

Beam interruption signal, at least from the healthy channel.

Flip-flops 7 and 10 and subsequent flip-flops, opto-switches and relays

The function of these circles (including gates 8 and 9) is performed with each running The pressing process is tested in that a new one cannot be created without a detected interruption (either a correct beam interruption, or, like able protection, a wrong) can start.

ο Error in one of the circles after gates 8 and 9.

This means that not both relays are in one of the three relay pairs 22a, 22b, 22c, 22a ″, 22b ', 22c' or that they do not switch at the same time (channel deviation). In both cases the intrinsic hold falls of the monitoring relay. It should be noted that for the majority the faults previously described, the inherent relay does not fall, but the errors show up as persistent, not

Resettable beam interruptions. The relays are force controlled

This leads to the fact that when a contact welds and does not opens, the other contacts of the relay fail to close, i.e. the monitoring relay drops.

One contact of each monitoring relay is (closed for not pulled Relay) pulled out into a separate loop. This loop can be used to check that the contacts of the monitoring relay are de-energized Open state can be used, a control which is expediently carried out by the higher-level control system.

A failure of the counter pulse from the control system brings it to one of the channels the monitoring relay to fall. The failure of the counter pulse to both, blocks the system after a radiation interruption.

Power failure

Failure of the relay voltage means stop after all relays trigger (normally the relays in the Α-channel should be pulled and the relays in the B-channel solved). If the supply voltage to the relays is too low, so that one relay drops out, the corresponding monitoring relays drop out. The logic boards are fed by a separate mains unit. If one of these voltages becomes too low, the other channel retains the protective function, whereas the monitoring relay responded to the differences in resolution.

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The invention is of course not limited to the above as examples Embodiments described are limited, but can be modified within the scope of the inventive concept.

It is particularly important to note that a majority of the circuit solutions have a special applicability and is not limited to the light barrier shown as an example.

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L e r s e i t e

Claims (27)

29U329 Fat ^ i itqnsp cueche | nachgi-is enough 1. Light barrier, consisting of a plurality of light-emitting arrangements that are located on one side of a surveillance area and a plurality of light-sensing arrangements located on the opposite Side of the area, the light-emitting and the light-perceiving Arrangements can be activated via a signal generated by an oscillator, so that during one and the same time segment only in each case a light-emitting and a light-perceiving arrangement activated at the same time and other arrangements are activated at the same time during a different period of time, characterized in that parallel to the switch-on cycle the light-emitting and light-sensing arrangements a counting register (hereinafter referred to as the arithmetic chain) is present, which the The task is to generate a signal with the same signal frequency as it is received from the light-sensing arrangements in the case of an uninterrupted light barrier is that the output signal of the light-sensing arrangements is compared with the signal of the arithmetic chain and that in the event of a certain deviation, an output signal is produced. 2. Light barrier according to claim 1, characterized in that that one and the same oscillator so-called clock pulses to both the light-emitting as well as to the light-sensing arrangements in order to activate the arrangements in pairs at the same time. 3. Light barrier according to claim 2, characterized in that the oscillator is crystal-controlled and a phase lock controls the second oscillator in order to be able to send a signal to the arithmetic chain. 4. Light barrier according to claim 3, thereby marked, that the second oscillator consists of a voltage controlled oscillator (VCO) consists. 5 »light barrier according to claim 1, characterized thereby, that synchronization pulses are generated in the organs to generate light To operate arrangements and these pulses are partly connected to the arithmetic chain and partly to the organs for light perception. 6. Light barrier according to claim 1, characterized in that that the output signals of the light-emitting arrangements to the one input of two EXCLUSIVE-OR gates are connected to that output signal the arithmetic chain is connected to the other inputs of the switching gates, that the output of the respective switching gate is connected to one input of a flip-flop, the other input of which is fed with oscillator signals will. 9098 46/0 571 ORIGINAL INSPECTH) _ ₂ . 29U329 7. Light barrier according to claim 6, characterized in that that a control circle is in place to sense that the position of the two Flip-flops is the same and that they change their position at the same time. 8. Light barrier according to claim 7, characterized in that if there is a lack of correspondence between the flip-flops, the control circuit generates a signal. 9. Light barrier according to claim 1, characterized in that an activated light-emitting arrangement during a period of time is directed against an activated light-sensing arrangement, the latter arrangement being assigned an order that corresponds to the order corresponds to the light-emitting arrangement and that during the next period of time other arrangements are activated in pairs, but not those that are immediately adjacent to one another in the order. 10. Light barrier according to claim 1, characterized in that that monitoring circuits and / or control circuits in senders and receivers are checked at least once per cycle. 11. Light barrier according to claim 10, thereby marked, that synchronization pulses and / or clock pulses are controlled in such a way that they bypass monitoring circuits and / or control circuits. 12. Light barrier according to claim 3, characterized in that that the phase lock is triggered by a signal which has half the clock pulse frequency. 13. Light barrier according to claim 1, thereby marked, that a control circuit monitors that only one light-emitting arrangement is activated during a period of time. 14. Light barrier according to claim 1, characterized in that that a control circuit monitors that only one light-sensing arrangement is activated during a period of time. 15. Light barrier according to claims 13 and 14, characterized in that the control circuit by a further control circuit is controlled. 16. Light barrier according to claim 1, characterized in that that at least one pulse during a course is an artificial arrangement 9098 46/057 29H329 activated, which has an output signal corresponding to that of a light-donating Arrangement gives. 17. Light barrier according to claim 1, characterized in that that at least one pulse is selected during a sequence in order to give a signal which does not activate a light dispenser. 18. Light signal according to claim 1, characterized in that the receiver is designed so that it is activated when several light-sensing arrangements generated an internal synchronization pulse. 19. Light barrier according to claim 1, characterized in that that the transmitter is designed in such a way that it generates a synchronous pulse at the end of a search process. 20. Light barrier according to claim 19, characterized in that that the transmitter senses the voltage via a resistor that emits a signal that responds when several transmitter organs are at the same time are activated and that this error-indicating signal is used to generate a synchronous signal. 21. Light barrier according to claim 20, characterized in that that the signal clears a computer that controls the switching on of the light-emitting arrangements. 22. Light barrier according to claim 20, characterized in that that the signal is given off as a signal after all light donating and light-sensing arrangements were activated in pairs. 23. Light barrier according to patent claims 16 or 17, characterized in that the pulse is assigned a specific position in the cycle is. 24. Light barrier according to claim 1, characterized in that that the arithmetic chain can be activated by synchronization pulses that occur at given time intervals. 25. Light barrier according to claim 1, characterized in that that the light-emitting arrangements are only activated during a fraction of the period time, preferably half that period. 26. Light barrier according to claim 25, characterized in that the light-sensing arrangement is adjusted during the dark period. ₉₀ 98A6 / 057S 29U329 27. Light barrier according to patent claims 25 or 26, characterized in that the dark period of time before the light period of time occurs. 909846/057
-ORIGINAL INSPEGTEP