DE2820574C2 - Transmission method for a data modem with multiple transmission channels - Google Patents

Description

The invention relates to a transmission method for a data modem with several transmission channels which are operated according to a defined priority sequence and whose sum of the individual transmission capacities corresponds at most to the total transmission capacity of a transmission path connected to the modem.

Digital data modems are already known with which data processing systems or the like can be connected to a transmission channel, for example a telephone line. Such modems can have several connections or ports in order to connect several transmission channels to an equal number of channels of a data processing system. The multi-channel information is transmitted via a single line in multiplex, normally in time division multiplex, in which the channels are interleaved. However, other multiplexing methods are also known which can be used in conjunction with the invention.

To initiate a connection over a transmission line between modems, it is known to transmit "handshake" signals which indicate that a data source wishes to transmit data and therefore wants to have an operational channel assigned. There are various operating modes for this, of which the RTS (request to send) method is most commonly used. An alternative to this is the DTR (data terminal ready) method or the DSR (data set ready) method. Other signals during such data transmissions are DCD (data carrier detect) and RLSD (receive line signal detect). A commercially available modem of this type is the Milgo 96 MM modem, and the signals used there can be used with particular advantage in the method according to the invention.

Such multiport modems usually contain switching devices to manually switch the channel allocation depending on the volume of traffic. If not all transmission channels are occupied, it is advisable to allocate the freed-up capacity to other channels so that they can operate with a higher transmission capacity. The switching of such multiport modems in transmission systems takes place according to fixed operating diagrams, according to which an operator carries out a change of operating mode, which of course has to be coordinated at both ends of a transmission path.

DE-AS 24 19 853 discloses a circuit arrangement for controlling a time-division multiplex data transmission system, in which several exchangeable and switchable control boards are provided for adaptation to different channel speeds in order to adapt the system to special or changed customer requirements in a system that has already been delivered or only at the time of delivery. Adaptation of the transmission capacity of the individual channels during operation is not provided.

Furthermore, US-PS 37 00 820 discloses an adaptive data transmission system in which the total bandwidth is reduced when the transmission path's transmission conditions are poor. This requires that individual channels are switched off according to a priority sequence, even if these channels still have data to transmit.

The present invention is based on the object of automatically creating the port configuration of the modems in a transmission system with multi-port modems and, if individual channels are not used, to allocate the transmission capacity thus released to other channels so that they can operate with increased transmission capacity. It goes without saying that the transmission reliability of the individual channels is not impaired.

This object is achieved according to the invention in that, in a basic operating mode of the modem, the total transmission capacity of the transmission path is initially evenly distributed among the individual transmission channels and that, in specified special operating modes, the transmission capacity not required by a free transmission channel of low priority is automatically allocated to one or more of the transmission channels of higher priority.

Advantageous embodiments of the method according to the invention can be found in the subclaims. The invention is explained in more detail below using an embodiment with reference to the drawings. It shows

Fig. 1 is a simplified block diagram of an advantageous embodiment of the subject matter of the invention;

Fig. 2 is a block diagram of the channel allocation circuit;

Fig. 3 is an illustration of the input configuration selection sequence according to the invention;

Fig. 4 is a flow chart illustrating the operation of the subject invention when converting channels from the active to an inactive state;

Fig. 5 shows an illustration of the advantageous embodiment of the invention when converting channels from an inactive to an active status:

Fig. 6 is a schematic block diagram showing a port configuration selection circuit; and

Fig. 7 is a schematic diagram showing a port configuration conversion circuit for use with either the master or slave modem of the preferred embodiment.

Referring to Fig. 1, a pair of modems 11, 13 are provided which are connected to one another by a transmission channel 15. Each modem 11, 13 is connected to a data processing system, such as a central computer, a data terminal or another peripheral device. For example, the multi-port modem 11 may be connected to a central processing unit (CPU) 12 , while the multi-port modem 13 may be connected to different data terminals (DTE) 14. In a known manner, a multi-port modem multiplexes a plurality of channels of connected processing devices for connection over a transmission line. For example, a multi-port modem may multiplex four ports 16 , each of which transmits 2400 bits per second, resulting in a total transmission of 9600 bits per second. The partner modem descrambles the information arriving over the one channel. Typically, a two-way (reciprocal) transmission system with a four-wire line is used so that the multiplexing and demultiplexing operations are carried out at both ends of the transmission line.

In practice, it is often desirable to change the channel or port arrangement. For example, if two channels of a four-port device are not currently needed to transmit data, then one would like to be able to allocate the bandwidth of those channels to channels that are actually transmitting data. In this way, more efficient data transmission is achieved.

As indicated above, the known multiport modems contain the necessary circuitry to switch between different port configurations in response to manual commands. A typical method of data encoding for a multiport transmitter is shown in Fig. 2. Although Fig. 2 is somewhat simplified, the structure of this circuit will be readily apparent to those skilled in the art.

As shown in Fig. 2, the bandwidth allocation in a four-channel system can be determined by a multiplex timing signal selection circuit 101 which selects timing signals to be fed to four multiplex/demultiplex units 103. The timing selection circuit 101 is fed from a timer 105 and includes frequency parts and logic circuits which derive four divided timing signals interleaved in a cyclic four-phase timing sequence ; Φ1, Φ2, Φ3 and Φ4. The timing phases are selectively fed to the multiplex/demultiplex units 103 in accordance with a manually set code in accordance with the state of the art. The phase outputs of the multiplex/demultiplex units are combined into a 9600 bit/s signal by an OR gate 104 and fed onto a single line. The OR gate 104 feeds the 9600 bits/s data to a modem transmission circuit 106 where the data is modulated in the usual manner.

For example, if only two channels A and B out of four channels A, B, C and D are needed for data transmission, two time phases are fed to the multiplexing unit of these channels A, B , doubling the bit addition over these two channels A, B , while the other two channels C, D remain inactive.

The table below shows one way of interleaving the data bits at different speeds. Table A &udf53;vu10&udf54;&udf53;vz19&udf54;&udf53;vu10&udf54;

According to the preferred embodiment of the invention, a modem 11 operating as a master modem receives a port configuration or channel allocation request in coded form from an attached data processing device such as the central processing unit 12. The particular port configuration is controlled by a code provided by a shift register 17 or other storage device. The code provided by the shift register 17 selects the port configuration, as is done by manual selection in known multi-port modems. A comparator 19 continuously compares the port configuration request of the unit 12 with that indicated by the mode shift register 17. If the central processing unit requests a different port configuration than that indicated by the shift register 17 , the comparator 19 generates shift register control signals which correspond to a new mode code which must be provided by the register 17 . After a delay determined by a timer 21, the shift register control information is used to change the operating mode code in the shift register 17 and thereby establish a new port configuration in the multiport modem 11 .

The delay caused by the delay element 21 gives the second or slave modem 13 sufficient time to respond and establish a port configuration which corresponds to the port configuration newly requested by the master modem 11. During this time period, the master modem 11 transmits signals to the slave modem 13 which are interpreted by the modem 13 as a transmitted port configuration request. A device acting analogously to that of the master modem 11 then establishes the port configuration of the slave modem 13. In particular, a comparator 23 determines the request for a new port configuration by comparing the request code with the operating mode indicated by the shift register 25. The comparator 23 in turn generates shift register control information which, after a suitable delay, changes the operating mode indication of the shift register 25 to change the port configuration of the modem 13 .

In constructing the device described above ( Fig. 1), it is very advantageous to establish a channel priority and a conversion sub-order in order to simplify the circuit and to utilize already existing modem line sub-orders. Therefore, in accordance with the preferred embodiment of the invention, a port configuration mode selection sequence is established which is shown in Fig. 3 and Table I below: Table I &udf53;vu10&udf54;&udf53;vz17&udf54;&udf53;vu10&udf54;

Table I shows that to reactivate a channel, the port configuration circuit must always return to Mode 3, in which all channels are active. This involves removing all active channels until the desired state is reached. Since channel A is always active, the DCD decay code for that channel °K(&udf53;lu,4,,100,5,1&udf54;ADCD&udf53;lu&udf54;)°k is used to designate and initiate a return to the highest mode, 3. From Mode 3, the normal DCD channel decay sequence is then used to return to the correct configuration.

An example of the sequencing technique described above is illustrated in Figs. 4 and 5. In this example, DTR (data terminal ready) signals are used as control code on the master side, which is initially organized according to mode 3, then changes to mode 1 and finally to mode 5.

Figure 4 illustrates the dropping of channels between Mode 3 and Mode 1. Initially, the master modem is in the normal Mode 3 idle state in which the DTR signals for channels A and D are logic ones according to the logic convention of Table I. Similarly, the slave modem is in the "idle" state of Mode 3 and the DCD signals for channels A and D are logic ones. A change to Mode 1 is initiated by the master modem when the DTR signals for channels B, C and D simultaneously drop to zero. There follows a 200 millisecond (ms) delay during which the DCD drop code for channels B, C and D is transmitted to the slave modem. A 100 ms time delay in the slave modem allows it to detect the DCD fall and initiate the change through Mode Data 5 and 4 to Mode 1. Preferably, intermediate stations such as modes 5 and 4 are traversed quickly, as indicated by the time of 0.416 ms in Figure 4. Due to the longer delay in the master modem, the slave modem reaches mode 1 before the master modem falls back to mode 1. This ensures that the slave modem is ready to operate with the new master configuration. Similarly, any number of active ports can be blanked. When the master modem falls back to mode 1, the only remaining channel A resumes normal transmission at 9600 bps.

Fig. 5 illustrates the process of adding ports as the system transitions from Mode 1, in which only channel A is operating, to Mode 5, in which channels A, B and C are operating. Initially, the master modem is in Mode 1, in which the DTR signal for channel 1 is positive. Similarly, the slave modem is in Mode 1 and the DCD signal for channel A is positive. The transition to Mode 5 is initiated when the DTR signals for channels B and C go high. A delay of approximately 200 ms is then provided during which the master modem transmits all marks to the slave modem, indicating the fall of the DCD signal for channel A. In the slave modem, after detecting the fall, a delay of 100 ms occurs during which the slave modem switches to Mode 3, in which all four channels are operating. Again, due to the different time delays, the slave modem reaches mode 3 before the master modem switches to this mode.

If the master modem is in mode 3, it determines that mode 3 is still not the correct one because the DTR signal for channel D is low. It then essentially repeats the process shown in Figure 4 and described above to blank channel 5 and return to mode 5. The DCD drop code for channel 5 is transmitted to the slave modem, which falls back to mode 5 after a delay. A longer delay on the master modem causes it to switch to mode 5 after the slave modem, whereupon normal transmission is resumed on channel A at 4800 bits/s and on channels B and C at 2400 bits/s each. Accordingly, Figure 5 illustrates the technique of returning to an all-channel-active mode to add ports.

As shown above, the use of DTR and DCD signals has been proposed because these are typical signals that are detected during transmission between modems. However, other signals can also be used to provide mode codes for the master and slave modems. For example, the signal known as RTS can be used in place of the DTR signal described above in the master modem to specify the mode code.

As mentioned above, a request signal can indicate when a data source wishes to transmit data or wants to have a channel available that is ready for transmission. An example of the first alternative is the RTS signal currently in use. An example of the second alternative is the DTR signal. Which of these signals is used as the request signal depends largely on the nature of the data source. For example, if the data source is a tape reader that mainly transmits in long blocks of a few minutes, alternating with similarly long idle periods, it will normally be sufficient to use RTS as the request signal. RTS is only present during a transmission, and the use of RTS allows bandwidth to be redistributed during the longer periods when the data source is not transmitting and an RTS signal is not present.

Such an approach will normally be impractical if the data source is an interactive one, for example a data processing terminal. Such an interactive data source switches rapidly between the transmission and idle states. A correspondingly rapid change of operating mode is undesirable. In this case, the request signal can therefore be formed by the DRT signal which is present during the time in which the data source is in interactive connection with a central processing unit or a similar device at the slave end of the transmission line. Bandwidth redistribution then only occurs when the data source drops the DRT signal because it does not need any further connection with the central processing unit.

As indicated above, it is known not only to provide a DCD signal in the presence of a data carrier from the master modem, but also to decrement the DCD signal upon receipt of an encoded RTS signal. A conventional form of the encoded RTS signal is a string of ones for a predetermined interval, which may be about 200 ms in the case of channels B, C and D , although it is also possible for a specific digital code word to be associated with the encoded RTS.

The slave modem detects an encoded RTS signal on channels B, C and D. As described above, this process is delayed to ensure reliable detection (otherwise a false detection could be caused by a long string of 1's occurring during a normal data transmission).

Fig. 6 shows a simplified block diagram of a circuit which controls the port configuration in a master modem or a slave modem according to the sequencing and coding techniques described above with reference to Figs. 3 to 5. This circuit comprises a magnitude comparator 31 , two timers 33, 35 and a mode indicating shift register 37. The magnitude comparator 31 compares the inversion of the channel operating signals B, C and D provided by the mode indicating shift register 37 with the inversion of the input DRT signals (in the master modem) or the input DCD signals (in the slave modem). The channel operating signals are provided by converting the shift register output code in a decoder 36. The inputs to the magnitude comparator 31 are collectively designated X and Y , respectively.

The relationship of X and Y indicates the type of channel transformation required. For example, if it is necessary to change from Mode 1 to Mode 5, the °K&udf53;lu,4,,100,5,1&udf54;ABCD&udf53;lu&udf54;°k input at X will be 0111, while the °K&udf53;lu,4,,100,5,1&udf54;ABCD&udf53;lu&udf54;°k inputs at Y will be 0001. In this case, X > Y and the shift register automatically stores Mode 3. The stored "Mode 3" signal is delayed by timer 35 for a period of time as discussed above with respect to Figs. 4 and 5. On the other hand, if X is less than Y , this indicates that a channel is to be removed. In this case, the shift register 37 is simply stepped to the next mode code after a time delay provided by the timer 33. If after one step the comparison again fails to be X < Y , the shift register 37 is stepped again. Finally, when X is equal to Y , there is a rest state in which the desired mode is equal to the channel operating configuration. From the above discussion it has become clear that the importance of the comparison lies in determining whether channels must be added or removed. Various logic schemes can be derived to derive this indication from the relevant channel codes without thereby departing from the scope of the invention.

Fig. 7 illustrates in detail a circuit which can be used to control the configuration conversion of both the master modem and the slave modem in accordance with the preferred embodiment of the invention. The master/slave selection is made by a control line which controls the multiplexers in the manner described below.

In master mode, the control signals, such as the DTR signals from four inputs 16 , are fed to a four-bit latch 39. The contents of latch 39 are fed through a multiplexer 41 to a "port of least significance" control logic 43 and then to a comparator 45. The comparator compares the channel operating signals at input X with the output of control circuit 43 and feeds output control signals to a shift timer 47 or a latch timer 49. Shift timer 47 and latch timer 49 are connected by a multiplexer 51 and control a mode indicating shift register 53. The "X = Y" or "idle" output of comparator 45 is fed back to latch control logic 55 which controls the operation of latch 39 .

A control line 57 selects the master or slave mode of the circuit. In the master mode, the multiplexer 41 is caused to transfer the output of the four-bit latch 39 to the control logic 43. In the slave mode, the multiplexer 41 routes the DCD signals from a bus to the control logic 43. The control line 57 also causes the multiplexer 51 to transfer the 200 ms output of the shift timer 47 and the 200 ms output of the latch timer 49 to the mode shift register 53 when the mode is master. In the slave mode, the multiplexer 51 selects the 100 ms outputs of the latch and shift timers. The function of the multiplexers as gate circuits is well known.

In master mode, latch 39 is normally scanned at high speed. However, if a state change is detected such that a "quiet" output of comparator 45 indicates that the X = Y condition no longer exists, latch control logic 25 causes latch 39 to lock in the indication of the newly desired mode of operation.

The latch control logic 55 includes an AND gate 59 , a NAND gate 61 , and a delay flip-flop 63. The AND gate 59 receives an input indicating X ≠ Y and an input indicating the selected master mode. When these conditions are met, the output of the AND gate 59 is high as is the output of the normally reset delay flip-flop 63. In this case, the NAND gate 61 produces a low output indicating the latch state and disabling the sample timer via an AND gate 65. However, if X = Y or the master mode is not selected, then a high output of the NAND gate 61 indicates the sample state of the latch 39 .

The delay flip-flop 63 becomes operative when mode 3 is selected. In this case, the ADTR signal transitions (goes low as discussed herein) to drive the slave modem. To prevent the comparator from erroneously detecting a mismatch and locking the ADTR signal low, the delay flip-flop responds to a latch command so that latching (locking) is inhibited until ADTR returns to its original (high) state. As shown in Figure 4, this is accomplished by timing the delay flip-flop at baud rate, with its D input fed with the latch command and its reset input fed with the ADTR signal.

The latch 39 therefore prevents any interrupts or input changes until the port configuration circuit has completely implemented the preceding changes. In this way, control signals can be generated, applied to the slave modem and executed before new interrupts for other requests for port assignments are accepted.

The code selected by the multiplexer 41 is then transferred to the control logic 43 where the least significant channel is given priority. The presence of the least significant channel forces the more significant channel information into the active state, essentially filling in the "ignore" states in Table I. The channel A information is not affected by this circuit. The operation and construction of the "least significant" logic gate is shown in Table II below: Table II &udf53;vu10&udf54;&udf53;vz11&udf54;&udf53;vu10&udf54;

The magnitude comparator, which is a normal digital comparator, produces, as noted, "X >Y" , "X <Y" and "X = Y" outputs. These each indicate that a channel mode is desired, which is being established. The "idle" or "X = Y" output of comparator 45 is fed back to control latch control logic 55. The "X ≠ Y" state initiates the latch operation. The "X <Y" output goes to shift timer 47 which issues a shift command to mode shift register 53 after a period of time selected by multiplexer 51 as discussed above. The "X <Y" load triggers store timer 49 which loads shift register 53 with "mode 3" code after a period of time again selected by multiplexer 51 . Both the shift timer and the load timer can be conventional counting circuits.

Upon receipt of a shift command from the shift timer 47, the shift register rapidly cycles through its output states until the comparator 45 detects equality. This logic function is illustrated in Fig. 7 by an AND gate 50 which, in response to the shift signal from the timer 47, supplies a timing signal to the shift register until the comparator 45 produces the "idle" output. If equality is not achieved after storing mode 3, the X < Y output of the comparator 45 is activated, thereby initiating the shift sequence just described.

When the mode shift register 53 is not in the shift or load state, it simply indicates the mode at its outputs. This mode indication can be fed to an appropriate line to select either mode 2 or mode 4.

Accordingly, when a new channel configuration is requested in master mode, comparator 45 issues either a shift or a store command. These commands are appropriately delayed by timers 47, 49. During this delay, the signals are sent over the channel to the slave modem. In particular, channel drops are detected by the output of the four-bit latch 39 and the associated drop code is sent. The device used to transmit the drop code receives the latch output via lines 40 and is known per se. When it becomes necessary to store mode 3, the code supplied to the slave modem is reset after the load indication is detected by comparator 45. 45 via line 42. At the end of the time cycle determined by timers 47 , 49 , the appropriate shift or store command is transmitted to shift register 53. The output of the shift register is then fed back to comparator 45 to determine whether a further change in the shift register contents is required or whether equilibrium has now been reached.

When configuring the slave modem, latch 39 is turned off by multiplexer 41. Basically, the circuit operation is still the same except that the DCD signals are fed to the "least significant input" logic and comparator 45. The timing multiplexer 51 selects a shorter time period and a DCD command must be present during the duration of the timing cycle for the circuit to respond.

Other methods may be used within the scope of the invention to perform port configuration switching at spatially separate modem locations. One such method is to provide a frequency shift keyed (FSK) secondary channel or a completely independent data path for transmitting the synchronization information. Such a channel path may be provided within the transmission system or by means of external equipment.

Another method allows the modem user to synchronize two systems by requesting port configuration simultaneously at predetermined times. For example, at the end of the day, the device associated with each remote modem (such as a computer or data terminal) may specify a particular channel for a particular data transfer. Since the modem controller at each modem location has a master clock, synchronization using that master clock is a simple matter. Because of the synchronized master clocks at each modem location, there is no need for signaling between the two data devices, which are each tied to follow the request that occurs at the data terminal interface. Since each modem is under master control, this synchronization technique is called master/master synchronization. When using the master/master method, a user can effect direct software control of the port configuration by entering his own synchronization codes.

Claims (6)

1. Transmission method for a data modem with several transmission channels which are operated according to a defined priority sequence and whose sum of the individual transmission capacities corresponds at most to the total transmission capacity of a transmission path connected to the modem, characterized in that
that in a basic mode of operation of the modem, the total transmission capacity of the transmission path is initially divided equally between the individual transmission channels and
that in defined special operating modes, the transmission capacity not required by a free transmission channel of low priority is automatically allocated to one or more of the transmission channels of higher priority. 2. Method according to claim 1, characterized in that when transmission capacities are requested by the transmission channels, the operating mode in which the requesting transmission channel with the lowest priority occurs is automatically selected. 3. Method according to claim 2, characterized in that the desired operating mode is compared with the current operating mode in order to initiate a corresponding switchover depending on the comparison result. 4. Method according to one of the preceding claims, characterized in that when the number of transmission channels requesting operation is reduced, the special operating modes are switched one after the other in a specific order, but that when the number of transmission channels requesting operation is increased, the basic operating mode is initially switched back to. 5. Method according to one or more of the preceding claims, characterized in that the transmission capacity not required by transmission channels of lower priority is automatically assigned to the transmission channel with the higher priority. 6. Method according to one or more of the preceding claims, characterized in that when a change of operating mode is requested in a modem at one end of the transmission path, this request is stored and transmitted via the transmission path to a modem at the other end and that after a certain delay both modems switch to a new operating mode.