DE2463404C2 - Franking device with a franking machine - Google Patents

Description

The invention relates to a franking device containing a franking machine with an input device for entering the information to be printed out. Postage corresponding data, with a postage printing device for printing the postage fees a billing device for billing the printed site fees, with a control circuit to control the postage printing device and the accounting device and with a security device to physically protect the accounting facility and the postage printing device against unauthorized adjustment or falsification.

A franking machine is from the ÜE-AS 15 24 572 Known The known franking machine contains a mechanical counter for displaying the entire value the stamped fees, a mechanical credit counter and a setting device for setting the fee to be stamped. The two mechanical counters are at the top of a housing Franking machine visible. A control device is mechanically coupled to this postage meter machine. Also coupled is an electrical image recording device, such as. B. a photographic camera with an electromagnetically operated shutter and a motorized film advance. With help This recording / calibration device records the charge values of one or both meters at specific times recorded.

The control device, which is mechanically coupled to the postage meter machine, contains a control circuit with step switches which are connected to one another in such a way that they form a so-called decade counter. The mechanical coupling of the control device to the postage meter machine takes place via a so-called contact or pulse generator, which generates electrical pulses. The electrical pulse generator is located in the connected control device. The dec. ··. Counter, together with the pulse generator, forms the credit counter provided in the control device. The fees to be stamped can be set on the franking machine by means of a lever. These levers provided on the franking machine act on voltage dividers provided in the control device, which together with the step switches form a bridge circuit. The result of the comparison measurement in the bridge circuit is transmitted either to a display device or to a contact line in order to switch off a drive in the postage meter machine. After the credit values in the franking machine have been used up, the credit counter in the control circuit is controlled from a central point by a value corresponding to the requested value. itr electrically trained control device is connected, in which each time stamping is carried out in the comparison circuit, it is compared whether the credit counter still has enough reserve or not

In de - DE-AS 15 24 572 the suggestion is given, the credit counter of the control device also consists of semiconductor components or magnetic storage elements as used to store messages in digital computing systems will. However, this suggestion lacks the indication of how to proceed here. A replacement of the electromechanical parts of the control device coupled to the known franking machine Control circuit by electronic elements would ultimately mean that a control without signal feedback is realized electronically. This would mean that you have a control circuit and again no control circuit received The known franking machine therefore has the disadvantage that the values set in it are controlled by comparative measurement be converted electrically and that it is not checked whether the control is correct is performed.

Because of the strict security requirements for the transmission of franking machines and evaluation of the quantities, it had not previously been thought of, including those mechanically in a fixed interrelation to electronify mutually standing parts of the franking machines. For franking machines In contrast to calculating machines, there are several reasons that suggest that it is not useful all mechanical parts by electrical and electronics. '. ho Parts to replace. So z. B. the printing process and the mail transport remain mechanical. Also, mechanical counting wheels stand out in contrast to electronic storage by the fact that they work together in firm engagement and therefore without slippage and store information by their respective positions mechanically, while electronic Memories are usually volatile in nature. Such mechanically operating franking machines however, they have the disadvantage that they are more exposed to wear and tear and that they only have a limited processing speed can develop and that they also require larger dimensions. Another The disadvantage is that there is no monitoring of the individual parts in order to

to report their bugs.

The billing takes place through the mechanical register of the postage meter machine, whereby the stored information through the photographic camera monitored or recorded. Furthermore, there is no monitoring of the individual control processes when stamping, as long as the credit register has sufficient reserve. The franking machine is only blocked if there is insufficient credit.

Against the use of electronics in franking machines speaks the fact that in franking machines the functions of printing in monetary value, the Control, storage and billing only within a self-contained and secure Device can take place and that these individual functions must work together in a safe manner, whereby faults must not lead to incorrect results.

From US-PS 30 39 585 sine load or weight measuring device is known which has calculation devices which are connected to a condition measuring device, in particular a scale, and to an application device, in particular a postage printing device. These scales with the calculation device are functionally connected to the postage printing device of a franking machine. The computing device responds only to the signals of a condition measuring device, namely below certain conditions to avoid incorrect or undesired actuation. This calculating device also assumes the presence these states automatically come true.

Electrical signals are generated in the balance correspond to the weight of the shipment to be weighed. These electrical signals are made up of a series of pulses, whereby the number of these pulses corresponds to the weight of the shipment. The resulting pulses are sent to the calculation device as well as control devices supplied. The calculation device works together with electronic counters, which have a minimum weight in the form of a lower Can take counter value into account. In addition to the weight-related pulses, a multiplication is carried out in the counters with corresponding constant values that take other factors into account. Taking these constants into account calculated value is then stored in the counters

The calculation is done electronically. However, the franking machine is operated electromechanically. The disadvantage here is that there is no feedback whatsoever from the postage meter machine to the other circuit parts The electronic scales send a message from the franking machine to the calculation device absent because the postage meter, similar to DE-AS 15 24 572, is electromechanical Such a feedback is not required due to the mechanical design of the postage meter machine.

Furthermore, in US-PS 30 39 686 a detector device is provided which measures the moment and signals that the weighing pan is in equilibrium and in a state of rest. If this state of equilibrium is reached, a termination signal is given sent to the calculating device, which indicates that the calculating device has a correct Has performed the operation without taking into account any error signals from the balance. The sense of this measure is that an actuation of the scale including the involved circuit stages is prevented should be when the item to be weighed is placed on the scales until equilibrium is achieved. The balance calculation device therefore only enters into its calculation operations when the input signals from the balance and from of the factor selection device (postal zones) are correct, in order to then subsequently use the electromechanical To adjust the franking machine. This well-known Fran kiermaschine does not offer the possibility of a signal off exchanges with the balance calculation device.

It is therefore the object of the present invention to develop a franking machine according to the preamble of claim 1 in such a way that, on the one hand, it

is largely electronic and on the other hand a signal exchange between the postage meter machine and an external electronic digital one Control device allows.

This object is achieved according to the invention.

position.

- With a first status memory for receiving control command signals and data signals from an external electronic digital control device, such as signals for setting Printing elements of the postage printing device and for reading out the contents of registers of the accounting device and forwarding them to the control circuit of the franking machine, and

- With a second status memory for receiving status signals and data signals from the Postage meter, such as a message that includes the correct setting of the printing elements and the contents of the registers of the billing device and their forwarding to the external electronic digital control device.

Accordingly, the first status memory is used to store

take the control command signals and the data signalc from the external electronic digital control device. As a command signal, for. B. the signal for setting the printing elements of the postage printing device and the command signal for reading out the content of Serving registers of the accounting facility. These Command signals are forwarded to the control circuit of the postage meter machine. Corresponding data signals are also forwarded for further processing in response to command signals

The second status memory now serves as a memory for receiving the status signals and the data signals from the postage meter machine. Uient as a status signal z. B. the message that the printing elements are set correctly. When reading out the registers of the log processing device, the assigned data signals from the registers of the accounting device in transferred to the second status memory and are available there for forwarding to the external electronic digital control device

Furthermore, the first status memory and the second status memory offer the advantage that direct communication between the external electronic digital control device and the postage meter machine is possible. The external electronic digital The control device therefore supplies command signals and possibly additional signals to the first state memory Data signals that are then used for further processing in the postage meter machine, in particular in the control circuit

and are available in the accounting device. This first state memory allows the external digital electronic control device the possibility to continue working in its sequence, since the relevant control key signals and data signals are recorded in the franking machine and ready for processing stand. On the other hand, the second status memory offers the possibility of storing both the status signals of the postage meter machine as well as to save the data signals of the franking machine and forward them to the external to electronic digital control device. The second status memory therefore embodies both a monitoring memory as well as a data store. In an advantageous manner, a digital step-by-step is thus obtained Signal forward and back transmission both with regard to the command and status signals as well as with regard to of the data signals. Another advantage is that due to the external signal generation in the external electronic digital control device made extensions with regard to the signal evaluation without having to intervene in the franking machine itself. Of the digital signal flow offers the advantage of being able to encode, in particular for the security of the signal flow. Due to the signal status feedback from the postage meter machine via the second additional memory to the external electronic digital control device given the advantage that possible Error states within the franking machine can be determined immediately, namely before implementation a postage print. The external electronic digital control device can, for. B. with signaling of an error in the context of a subroutine input signals into the postage meter machine in order to be correctable Eliminate errors.

According to a further embodiment, the first status memory stands for the external electronic digital Control device and the second status memory for the postage meter machine via an interface circuit the electronic interface with the external electronic digital control device in connection. The first status memory for the external electronic digital control device advantageously has a first storage section for the control command signals and a second storage section for the data signals on.

The second status memory for the postage meter machine is also advantageously in two memory sections divided, namely the first memory section for the status signals and the second memory section for the data signals.

According to a further embodiment, the first status memory is a computer status register while the second status memory is a postage meter status register.

A first line leads from the first memory section of the computer status register to the transmission of the control command signal for setting the pressure elements, a second line for transmission of the control command signal for reading out the contents of the registers of the accounting device and a third Line for transmitting a control command signal for postage printing to the control circuit. While the first line and the second line lead directly to a control logic of the control circuit is the third line connected to a mode sequential circuit connected upstream of the control logic. From this it follows the advantage that the two lines directly connected to the control logic with direct control measures overriding priority, while the third control line only becomes effective when the appropriate mode is selected.

From the second memory section of the computer status register For the data signals, a line leads to a postage charge storage device of a postage printing circuit the postage printing device.

The aforementioned line from the second memory section of the computer status register for the data signals leads to a memory address decoder of the accounting facility for addressing the registers the accounting facility for reading out the desired contents of the registers.

According to a further embodiment, lead from the first memory section of the postage meter machine status register for the status signals a data return line for the correct setting of the printing elements containing signal to the postage printing device, another line for insufficient postage credit containing status signal to a test circuit, which the contents of the registers of the accounting facility Checked for insufficient postage before printing and a line for a print confirmation signal including the execution of postage printing to a print confirmation circuit.

According to a further embodiment, an additional line leads from the first storage section of the Postage meter machine status register for a supply voltage that is too low or a failure of the Status signal containing postage meter to a power supply circuit.

From the second storage section of the postage meter status register leads a line for the transmission of the data signals to the registers of the accounting facility.

the second memory section is advantageous of the computer status register is divided into two memory sections, namely one memory section for data signals and a separate memory section for address data signals.

Further advantages result from the remaining subclaims.

These advantageous configurations are also in connection with the drawing and the description to see.

In the exemplary embodiment, a franking machine, a postage printing circuit of the postage printing device, the accounting device, the control circuit, the power supply and the security device egg; finally the circuit elements involved. By working with a computer The postage printing device is activated for the franking machine

The invention is now based on an exemplary embodiment described in more detail in connection with the drawing. It shows

F i g. 1 is a block diagram of an embodiment of a postage meter in which an electronic Franking machine circuit and, as a postage printing device, an electrically operated, official postage printer Arranged in a separate, secured housing and with a secured cable and secured Connection devices are connected, wherein, the porous printer in piggyback arrangement on the high-speed printer is arranged

Fig. 2 is another perspective view of a

Piggyback postage printer,

F i g. 3 is a perspective view of the printing mechanism of the piggyback postage printer;

4 is a plan view of the piggyback printer, partly in the broken cut,

Figure 5 is a simplified block diagram of the circuit the electronic postage meter,

Fig. 6A to 6D several detailed block circuits, which vessel F i g. 6E put together a franking machine cell form,

F i g. 7 is a diagram in which the clock, the Gray code counter and the selection signals are plotted as a function of time,

F i g. 8 is a timing diagram of the addressing signals;

F i g. 9 a table of the assignment of the addresses and the arithmetic unit functions,

Fig. 10 shows a circuit for the Gray code counter and for the memory address counter,

11 shows a mode sequential circuit, the last address decoder and the combination lock switch;

F i g. 12 a circuit of part of the control logic,

F i g. 13 a memory circuit,

Fi g. 14 shows a circuit of the memory address decoder and the memory input buffer,

15 shows a circuit of an arithmetic unit and the memory output buffer;

Fi g. 16 a circuit of a decoder for insufficient Postage, part of the circuit for interruptions and status displays and the arithmetic Unit,

17 shows a circuit of a postage fee storage device;

F i g. 18 a print buffer circuit,

19 shows a number dialing module control circuit for the changeable print modules and an error detection circuit of the binary coded decimal numbers,

F i g. 20 a circuit of the logic for the print wheels,

F i g. 21 a circuit for the interface with the Franking machine calculator,

22 shows a circuit of the postage meter machine status register,

23 shows a circuit of the supply device the memory and a voltage control circuit,

F i g. 24 a circuit of the device for supplying the control energy and the initiation circuit,

F i g. 25 shows a circuit of the display switching control, FIG. 26 a control circuit of the display logic and

F i g. 27 a logic circuit of the direct memory read control.

The in Fig. The preferred embodiment shown in FIG. 1 is designed to be segmented Includes planographic printing mechanism which is electrically operated by high-speed solenoids and which is electronic Contains digital techniques for quick postage calculation

In this embodiment are a postage printing device 312 and the magnetic coils that actuate it, hereinafter referred to as solenoids 338, in one first secured housing 318, while an electronic franking machine dialing 320 in arranged in a separate secure housing 418 and secured electronic lines 322 and Secured electronic lines 322 and secured connectors 324 are connected to the solenoids 338

"Secure electrical connection parts and lines" are those; which of unauthorized persons are not separated

who can, at least not without leaving sputches or forgeries, e.g. B. of seals, necessary too do. Connectors of this type are available for purchase. These connecting parts have housings.

which are assembled with pairs of threaded fasteners that are diametrically have opposite holes. When a wire goes through these diametrical holes of both fasteners passed through and the ends of the wire connected to each other by a lead seal and thus secured are, in which an official seal is imprinted, these can be threaded fasteners cannot be turned to lay the connecting part without breaking the seal. Secured electronic Lines are also available for purchase. They consist of simple, conventional lead wires, which are shielded by a sheath made of braided metal wire. The internal electrical lead wires are connected in the secured connection parts 324, which prevents anyone from taking the line 322 to separate from the secured connection parts 324 without taking it apart. The other end line 322 is similarly connected in secured housing 318.

The postage meter circuit 320 is effective through the housings 318 and 418 with respect to the electrical Isolates interference generated by solenoids 338. However, this is also a good one electrical connection between the franking machine circuit and the postage printing device 312 maintained. Calculated in this embodiment a computer 316 the data of the postage fees and supplies this data, as the arrow 332 it shows, to the electronic postage meter circuit 320. The electronic postage meter circuit 320 has due to the second connection, only control over the solenoids 338 of the postage printing device and does not have any postage charges imprinted without the electronically stored postage balance at the same time to change accordingly. Here, too, the postage printer 312 and the high-speed printer 310 print on the same Paper web 314 in the known time relationship. The high-speed printer 310 speaks directly to the Computer 316 receives incoming commands, as data line 328 indicates.

The embodiment of FIG. 1 has the advantageous feature that by using electronic Feedback information useful for digital processes from postage printing device 312 to the electronic Postage meter circuitry 320 and computer 316 is available as it is through the output lines 340, 342 is indicated. As a result, the computer can avoid any error states be notified in the postage printing device before it prints. The computer can then use the in the program take the steps provided to remedy the situation. Such error conditions are detailed below in connection with the special electronic franking machine circuit of FIGS. 5 and 6 to be discribed.

Since in the embodiment of FIG. 1 the postage printing device 312 and solenoids 338 are separated from postage meter electronic circuitry 320 are, the postage printer 312 and solenoids 338 can be piggybacked on the high-speed printer 310 be as shown in FIG. 1 schematically by placing the housing 318 directly above the high-speed printer This piggyback arrangement of FIG

Postage printing device as an additional mechanism on the high-speed printer has the advantage of being tighter temporal and spatial correlation of the two printing mechanisms. This closer temporal correlation eases the problem of printing the addresses and postage at different times. at the embodiment of FIG. 1 are the printing stations only by a relatively small number of Print lines separated from each other. Spatial correlation allows for a more compact and convenient Arrangement, since a postage printing device arranged directly on the high-speed printer does not require any additional Floor space claimed and does not create the problem of the easily damaged paper web across through the intermediate space between the two pressure devices.

As can be seen from FIGS. 2, 3 and 4, the postage printing device 312 comprises a plurality of individual printing type segments 500 for printing the franking imprint, several of which are variable numerical information 501, which represent the port fees. In the example shown, there are eight print type segments 500 are provided, of which four segments (the segments 500.1 to 500.4) are numerical information which can print postage up to the amount of $ 99.99. The remaining print type segments 500.5 to 500.8 are for non-changeable information only, including one official franking symbol 502 and the identification 506 of the city and country in which the sender is located lives. The print type segments 5C0 print through a window 508 which is at the bottom of the secured Housing 318 is formed. The window 508 is just large enough for the print type segments 500 to pass through it can protrude and print. It does not allow the introduction of any tools that are used for this purpose could be to change or falsify the mechanism in the housing 3 iS. The electric Signals for setting the variable numerical information on the printing type segments 500.1 to 500.4 and to control the solenoids 338 who ■ brought in via the secured line 322, white -._._ in time is guided into the secured housing 318.

The F i g. 3 and 4 show one operated by solenoids segmented printing mechanism, which is preferably controlled by a computer for fast Imprinting of postage is used. The paper web 314, which comprises separable labels 314.1, 314.2, and the ribbon 464 are sandwiched between the plate surfaces 462 and the printing type segments 500 passed through. Each segment initially leads one under the action of the corresponding solenoids 338 Pressure shock and is then withdrawn by the corresponding spring 522.

3 shows the difference between the print type segments for the unchangeable information 5003 to 500.8 and the print type segments for the variable information 500.1 to 500.4. The printing type segments 500J to 5008 are solid bodies, which only have a printing surface 523 for Have printing of the unchangeable information of the franking printer. The other print type segments 500.1 to 500.4 have hollow interior spaces 524 which are open to the windows 525. The window 525 are surrounded by type areas for a continuation of the fixed information. In addition, however Printing elements 526, which are designed as printing wheels, through the window 525. These print wheels included corresponding sets of numeric printing types. They are rotatably arranged so that the number to be printed can be chosen. The print wheels 526 are part of a number dialing module with changeable print modules, which are ent.ialun in the hollow interior spaces 524 of the printing type segments 500.1 to 500.8. These print modules contain magnetic coils (not shown) for rotating the print wheels and electrical ones Connections 530 for the input of the number selection commands and for the output of commands for the verification of the Angular positions of the print wheels. The variable print modules of the number dial module 528 are provided by manufactured and sold by the Practical Automation Company of Shelton, Connecticut.

The electrical connections 530 form a data feedback line, which can be used to send information back to the computer, which determines that the print wheels 526 have been rotated to the desired position for the Before printing, the computer can determine whether the postage selection commands have been carried out. This is kind of of information communicated to the electronic postage meter circuit 320 and to the computer 316 via feedback lines 340, 342 of FIG. 1 is returned.

The electronic postage meter circuit 320 of FIG. 1 comprises how one can see from FIG. 5 sees a postage printing circuit 700 for controlling the solenoid 338 of the postage printing device 312 and for returning Information regarding the status of the variable pressure wheels 526 (Fig. 3) to the computer 316. Also a billing device 702 is provided as the billing device, which the postage balance as a function of postage changes and keeps you informed. The electronic franking machine circuit also includes in the controller a control circuit 706 which is a hard-wired Program for "advancing the electronic franking machine along a required series of Contains operational steps. The control circuit 706 and the accounting device 702 (non-erasable memory and arithmetic unit) both work synchronously with one another as a function of a timing circuit 708. A display device 710 shows the InMIt of the changing portfolio balance at a given point in time at. A print confirmation circuit 711 indicates to the computer whether postage is printed has been. All of these circuits in FIG. 5 are fed from a power supply circuit 712 Circuits 700, 702, 706 and 711 communicate with the computer via a suitable interface 714.

As can be seen in detail from FIG. 6, the interface circuit 798 of the computer comprises conventional one Hardware (16-digit output word for each evaluation pulse), which is designed so that it Time and / or data code format of the computer to any other time and / or data code format translated which from the electronic postage meter circuit 320 (i.e., the transmission lines to and from the computer are adjusted). This hardware also contains a computer status register 800, which is used by the computer Receives commands and data of the postage amounts for use in the postage meter circuit, and a postage meter status register 802 which indicates status from the postage meter circuit and receives stored data and generates interrupts for use of the computer

The postage printing circuit 700 includes solenoids 238 or 338 which drive the fixed and variable print type segments 500.1 through 500.8. A solenoid 801 operates a mechanism which blocks the segments except when printing the postage. Switches 803 sense the state of the Lock mechanism and the print type segments 500.1 to 500.8 and provide information which are used by the print confirmation circuit 711. A magnetic foil circuit 805 controls the solenoids 801 and 805 338 in a predetermined order. The changeable print modules of the number selection module 528, of which one for each variable digit of the postage amount is provided, the print wheels 526 rotate and select the postage locations depending on the electrical Commands from the computer. A postage charge storage device 804 stores the calculated postage values both for use by the variable dialing modules 528 in setting the Print wheels 526 as well as for use in the reporting facility 702 when changing the port balance.

The postage accounting device 702 comprises a memory 806 as a non-volatile memory register, which is a rising register 808, a falling register 810 (credit register) and a piece counter 812 contains, which counts the number of postage impressions. In a preferred embodiment of the invention, memory 806 is an integrated one complementary metal oxide semiconductor (C / MOS) circuit, and requires an auxiliary battery 813 to power the Maintaining the contents of the memory in the event of a power failure. The power consumption of such memories is extremely low. The memory content is then retained even if the supply current were to fail for a very long time. The memory is addressed with a memory address decoder 814 whenever information is added to or extracted from the rising register, the falling register, or the item counter of the memory 806. An arithmetic unit 816 is used to perform postage accounting, i.e., postage accounting. H. the postage amount from the contents of the falling register 810 to be deducted and added to the contents of the rising register 808, if a printing operation takes place, and the postage fee to the contents of the falling Register 810 to be added when the postage meter is recharged. The arithmetic unit 816 contains buffer 818 into which the contents of the rising register and of the falling register (from the Memory 806) and the postage amount (of the postage charge storage device 804) are loaded prior to the arithmetic operations.

Furthermore, a decoder 820 is provided for insufficient postage, which checks the contents of the falling register and determines if the postage credit balance falls below a predetermined threshold. This can z. B. by comparing the proposed postage charge amount in the postage charge storage device 804 is done with the remaining postage balance in the falling register 810. In a preferred embodiment, however, the circuit is simplified by that the same criterion for insufficient postage is used that has long been used by the mechanical franking machines is used: That is, whenever the falling postage credit balance is the same the maximum amount of postage the postage meter can print becomes $ 99.99 in this example or falls below this amount, then the balance sheet is insufficient.

For recharging the franking machine is a combination lock switch 860 is provided. if the user of the postage meter pays a required amount, the postal authorities give out the combination of the lock with which the user can operate the combination lock switch 860 once, whereby the falling register 810 by one

ίο a fixed amount equal to the amount paid is charged. After that, the lock is automatically activated a new combination encrypted, so that you have to pay again so that you can find out the next combination from the postal authorities

The control circuit 706 contains a clock generator 822, which has a pulse oscillator 824 (digital Equipment Corp. Model No. 401), which generates a pulse train to drive a Gray code counter 826. The Gray code is used to take advantage of the to use a single bit transition characteristic which gives a clear output to drive the following Circuit supplies The output of the Gray code counter 826 is used to drive a memory address counter (5-bit counter) 828 uses its counting cycle equally is the total number of addresses in memory 806 In a particular embodiment of the invention, the memory 806 has a capacity of 32 addresses, each of which stores a single, binary coded decimal place 16 of these addresses are for the increasing de Register 808 necessary, 8 for the falling register 810 and 8 for the piece counter 812. The memory address counter 828 runs through the sequence of all 32 memory addresses when it is controlled by the Gray code counter 826.

In order to ensure that each counting sequence of memory addresses is counted by the memory address counter S2S the beginning of a Gray code count sequence of the counter 826 runs synchronously, an AND element 830 is provided, which normally takes the Gray count from the memory Memory address counter blocked If, however, the Gray count reaches the value 0, a zero count decoder circuit 832 sets a count start flip-flop 834, which then opens the AND gate 830, so that the Gray counter 826 via the line 831 the Speichercr address counter 828 can control. At the end of a full constant memory address sequence of the memory address counter 828, the last memory address is decoded by the Dckodierschaltung 836, which then the line 837 energized to reset the count start flip-flop 834 len.

The control circuit 706 further includes a mode follower circuit 838 which is derived from the Gray code counter 826 is controlled and continuously checks the three commands in the following order of priority:

1) printing the postage fee,

2) Addition of the credit to reload the falling portfolio balance, and

3) Reading the display.

If one of these three modes of operation is selected by the mode sequencer 838, it sends the appropriate command over a line 840 to the Sicucrlogik 842, which then the indicated activity in the Sequence of hard-wired program executes. The control circuit 706 further comprises an inlet circuit 844 which contains start-up and shut-off operation sections 846 and 848 which are used for the start-up.

and programs that are hardwired for the shutdown process.

The display circuit 710 contains the selection switches 612 to 620, with the aid of which the user can display the information of the rising register, the falling register or the piece counter can be called up from the memory 806 and displayed on the display device and with which the user can also check or delete the display device. The latter Circuitry includes a buffer 852 which receives the display data retrieved from memory 806, and a decoder 854 for translating the data into a form suitable for the numeric display 610.

The power supply circuit 712 includes a main power supply 856. This provides that of all Circuits of Fig. 5 required operating voltages. It is controlled by the on-off switch 600 A voltage monitoring circuit 858 is also provided, which determines when the power supply fails or when the supplied voltage is too high is low, as a result of which an error could occur in the calculation in the arithmetic unit 816. if a voltage outside the tolerance limit is determined, suitable signals are sent to the initiating circuit 844 and the franking machine circuit status register 802

A control lamp 604 on the control panel speaks to the Main power supply 856 on and indicates when the power supply is working A control lamp 606, which is responsive to the voltage monitoring circuit 858, indicates whether the postage meter circuit is ready for operation Finally, a control lamp 608 is provided on the control panel, which responds to the decoder 820 and indicates that the postage balance is not sufficient

The following describes the operation of the process shown in FIG. 6 shown Circuit described. When the calculator 316 calculates a postage amount based on a If the addressing label is to be printed on, it transmits the corresponding information to an interface circuit 798, which is provided as an input and output device between the computer and the postage meter machine circuit. This translates the postage data into a data code format used by the electronic postage meter circuit 320 and sends it to the data storage section 862 of the computer status register 800. From there the postage amount is transmitted via line 864 to postage storage device 804.

The calculator also saves in the command section 807 of the computer status register 800 a postage setting request. The register then sends over a line 866 a printer setting signal to the control logic 842. The control logic then issues a postage input command via a postage input command line 868, which causes the variable print modules of the counting selection module 528 to be set in numeric positions corresponding to the postage amount contained in the postage storage device 804 correspond. A data return line 870 returns a signal from the variable print modules of the count selector module 528 for information about the To transmit the status of the print module to an interruption and status display section 872 of the franking machine status register 802 so that the The computer knows when the print wheels 526 are properly set. If they are not set correctly, will this fact from the postage meter status register 802 and via the interface circuit 798 fed to the computer Das hai! result in the The computer cannot send a print command until the problem has been solved If, upon receipt of the variable print modules of the counting selection module 528 being set to the correct numerical values, it sends a print command which is sent via the interface circuit 798

ίο and the command section 807 of the computer status register 800 and from there via the line 874 to the first priority section of the mode sequencer 838 is transmitted.

The mode sequential circuit 838 goes into print

exceeded first priority and sends a print mode command over line 410 to control logic 842, which then sends the press command via a line 876. If a NAND element 878 is not blocked, the press command is sent via this gate switch. device and via lines 879 and 881 to the magnet sequencer 805. This then controls the solenoids 338, which release the pressure segments 500. It also controls the solenoids 238 or 338 one after the other (to describe the magnet sequential circuit 805 is referred to above U.S. patent application Ser. No. 195,729 pointed out). The signal of the line 879 is also transmitted over the line 880 to the arithmetic unit 816 and causes it to determine the postage amount from the contents of the fall- to be deducted from the register. To carry out this work step, the buffers 818 of the arithmetic unit receive the information relating to the postage fee amount via a line 882 from the postage fee storage device 804. They also receive the the content of the falling register 810 via a line 884. The memory addressing necessary for access to the falling register is carried out by the Memory address decoder 814 executed when it receives a gate from memory address counter 828 device 905 and via a line 886 the address information mation received. The control logic 842 opens the gate circuit 905 via the line 904 and controls via the Line 894 to the arithmetic unit 816. The arithmetic unit 816 then performs the calculation and then fills the reduced portfolio balance via a line 895 into the falling register 810 of the memory 806. The memory address decoder 814 leads again during the filling or loading of its addressing function, depending on addresses formation that he receives on line 886 while the control signals are fed in from the control logic 842 via lines 904 and 894.

Similarly, the postage amount is added to the contents of the increasing register 808. Of the Piece counter 812 is incremented each time the POSTAGE INPUT mode is triggered.

In summary, the printing operation can be described in such a way that the computer command for setting the variable printing wheels is directly device 866 reaches control logic 842 so that the setting function is independent of the mode sequential circuit 838 is executed. A response is then sent via the data return line 870 to the computer 316, to actuate the correct setting of the pressure wheel gen. A print command is then issued via line 874 sent out to mode sequencer 838. If no priority operating mode is required, the print mode is set. The control logic 842 sends

a command which simultaneously excites the solenoids 338 for the printing process and the subtraction of the postage fee in the arithmetic unit 816, the increment of the piece counter 812 and the addition of the postage value to the content of the increasing register 80S ¹ Ot

However, the? IC steps cannot be carried out, a decoder 820 does not pills to determine that a sufficient postage offset amount is present in the falling register 810 and then initially the NAND-GIied 878 opens If the postage offset amount is not sufficient, the decoder 820 spent that NAND gate 878. As a result, the magnetic coils for printing are not energized. The postage offset amount is not decreased. The content of the increasing register is not increased and the count is not increased of the piece counter is also not increased Interrupt and status display section 872 of the Postage meter status register 802 to indicate that the postage offset amount is not sufficient The programmer of the computer can then start a desired program on this display.

In a preferred embodiment of the postage printing device, the printing type segments are 500.1 up to 500.8 normally blocked by a mechanism which is controlled by solenoid 801, so that there is additional security in this way The blocking mechanism is only released when when the pony fee printing process is triggered will. Then it is again · blocked. The switches 803 serve to change the locked and German free state of the Detect locking mechanism, and also to determine when the respective printing type segments 500.1 through 500.8 after energizing the solenoids 338 are advanced to their pressure stop position. Further details of this blocking mechanism, solenoid 801 and switch 803 can be found in US patent application Ser. No. 195,729.

When the pressure mechanism is released from the solenoid 801, the switches 803 give on the line 940 from a signal by which a flip-flop 942 is set. The setting output of this flip-flop represents then all flip-flops 944.1 to 944.8 back that are each assigned to one of the printing type segments 500.1 to 500.8. After that, the flip-flops 944.1 bis remain 944.8 in this position to determine the movement of the printing type segments 500 in their stop position. While each print type segment 500 in its Stop position is moved forward, a corresponding line 946.1 to 946.8 is signaled by the assigned switch 803 to the assigned Set Flip Flop 944.1 to 944.8. All setting outputs of these flip-flops 944.1 to 944.8 lead to one NAND gate 948, which has 8 input lines. The output signal of this NAND element reaches a coincidence circuit 952/4 via a delay line 950. After printing, the magnetic coil 801 is de-energized and thus the blocking mechanism is blocked again, whereupon one of the switches 803 emits another signal via a line 952 which resets the flip-flop 942. The reset output this flip-flop then opens the coincidence circuit 9524.

After opening the coincidence circuit 952.4 can

the print confirmation circuit 711 decide whether al-Ie print type segments 500.1 to 5OL JS have been successfully actuated and have applied their pressure stop. When all the printing type segments have been brought into the stop position, the switches 803 must set all flip-flops 944.1 to 944.8. There is no output signal from the NAND gate 948. Accordingly, the print confirmation circuit 711 also does not output an output signal on the line 954, which could indicate the print segment status. On the other hand, if one or more print type segments 500.1 up to 500.8 have not advanced into their stop position, the corresponding flip-flops 944.1 to 944.8 are not set. Therefore, there is no output signal gnal at the NAND gate 948. The output signal is in of delay circuit 95G delays and passes through coincidence circuit 952/4 when it is on At the end of the printing process, which Output signal on line 954 leads through which the print confirmation circuit 711 informs the interruption and status display section 872 of the postage meter status register 802 therefrom, that the postage imprint as commanded by the computer was not carried out successfully. Of the The computer can then execute any suitable error program specified by the programmer.

The next operating mode of mode sequencer 838 that has a higher priority is addition of the credit to load the falling register 810. if the postage offset amount is not sufficient This means that the postage printing mechanism and the clearing house have to replenish the postage credit do not have to be carried to the post office Use of a self-encrypting combination lock switch 860 is provided. Such locks have already been developed for loading conventional franking machines outside the post office. A mechanical combination lock of this type which used for encryption of mutilated gears and is suitable for use with <iem combination lock switch 860 of this circuit is in U.S. Patent 3,034,329. Alternatively, however, a self-actuated from the keypad can also be used. Key combination lock can be used, as has been described in US Pat. No. 3,664,231. This device is matched to a hole pattern which is punched into a movable band and whose combination is entered in the keypad.

5ü If the combination is correct, the lock is opened so that the combination lock switch 860 can be operated once. Then the tape is turned into a continued in a new position, and consequently the switch cannot be operated until the

Post office has found out the next lock combination.

Each time the lock is opened, the combination lock switch 860 is closed, with a Line 900 sent a signal to the portion of mode sequencer 838 having the second priority will. This causes a signal to be added to the credit via line 840 to control logic 842 is transmitted. Such a credit addition signal is then sent via a line 902 from the control logic 842 is transferred to the arithmetic unit 816. Dic This signal causes a predetermined increase in the The postage offset amount is exactly the amount that is sent to the post office for the notification of the lock combination has paid and who is responsible for the content of the

sters is added. The falling register 810 of memory 806 is then accessible and is used by the memory address decoder 814 in response to one Address control signal, which is brought in from the control logic 842 via a line 904, with the new one Postage offset amount reloaded. The address control signal opens during the count sequence of the memory address counter 828 the gate circuit 905.

The mode of operation of mode sequencer 838 the third priority is reading the information on the numeric display 610. This mode of operation is set by one of the selection switches 612 to 618, which determine whether the content of the increasing Register, the content of the falling register or that of the piece counter of the memory 806 can be displayed should, or whether a test display should be carried out, which energizes all reading elements. Each of these switches generates a signal (which is transmitted through line 619 is shown) by which the mode sequencer 838 is placed in mode No. 1. The switch 620 terminates the Ausauebetrieb completely. If the control logic 842 receives a read command on line 840 from mode sequencer 838, it sends A signal via line 904, which opens gate circuit 905, during the memory address counter counts. The memory contents become sequential read out via a line 884. The signal sent by the control logic 842 over the line 906 controls the selected information in the numeric display 610.

An arrangement of light-emitting diodes with an integrated decoder 854 is preferred as the display device

The computer also has access to the memory content and can use this data for any desired purpose Purpose. To achieve this, the The computer enters the desired memory address into the data storage section 862 and sends a memory read command to the command section 807 of the computer status register 800, which in turn is a memory read command via a line 912 directly, bypassing the mode sequencer 838, to the control logic 842 sends. The control logic 842 in turn sends a signal via the line 892, which the data gate circuit 888 opens, so that the memory address created by the computer is sent via a line 889 to the memory address decoder 814 can reach. This will keep the contents of the increasing register, the faxing Register or the piece counter of the memory 806 is read out via a line 884 and stored in a data section 914 of the postage meter status register 802 entered. The computer can provide the information you want obtained from postage meter status register 802.

If the main power supply 856 is not within the specified range during postage calculation If supply voltages are within tolerance limits, there is a risk of arithmetic Error. To ensure that all arithmetic calculations only when the appropriate Supply voltages are carried out and in this way errors in the postage calculation To avoid this, the start-up operation section 846 of the initiation circuit 844 is not activated while it does not receive a signal from voltage monitoring circuit 858 over line 915 which indicates that all voltage levels are within tolerance limits. The initiation circuit 844 generates a start signal on line 916 which turns on memory address decoder 814 and also ensures that the count start flip-flop 834, which controls the gate circuit, is initially reset will.

If the power supply fails when the voltage is too low or if the franking machine fails the voltage monitoring circuit 858 sends a corresponding signal to the shutdown program section 848 the initiating circuit 844. The initiating circuit then sends a stop signal via a line 918 to a NAND gate 920. This NAND gate 920 holds the stop signal if the mode sequencer 838 signals via a line 922 that a arithmetic calculation has been carried out. This means that the postage meter machine circuit is in operating mode No. 1 or No. 2. Under these circumstances, the calculation can be completed. the Main power supply 856 is of sufficient capacity designed to even after an A. »case of the entire Power supply system to maintain the required voltage level so long that a straight the arithmetic calculation that is taking place can still be ended. After the Calculation open the mode sequencer 838 and the line 922 the NAND gate 920, so that the stop signal continue via a line 921 and switch off the memory address decoder 814 and thereby the Freeze the contents of the memory during the period of power failure or abnormal situation can.

An additional line 924 coming from the voltage monitoring circuit 858 comes, energizes the control lamp 606 for the readiness for work, if the Voltages of the logic circuits have reached the required levels. Another line 926 transmits the same indication of readiness to work to the interruption and status indication section 872 of the postage meter status register 802, thereby notifying the computer that the electronic franking machine circuit is ready for operation. When the voltage monitoring circuit 858 detects a low voltage state, the readiness control lamp 606 goes out and the Status display of readiness for work in the postage meter machine status register 802 is turned off, alerting both the operator and the computer to the problem.

The operation of this postage meter machine will now be further described with reference to FIGS. 7 shows the operating sequence of the postage meter machine including the signals of the pulse oscillator 824, the Gray code counter 826 and the mode sequencer, plotted against time. A conventional pulse oscillator 824 is used which operates at a frequency of 4 MHz, as shown in FIGS. 7, 7a. The franking machine circuit is controlled by the clock frequency, which is divided into eight time periods (Jg) for each machine cycle , by the 3-digit, binary Gray code counter 826 of FIG. 1008, 1009 the output signals A \ Ä ' or B, t? or C, C deliver. The output signals A, B and C (Td, Te or Tf) are repeated every eight periods and thus form a machine cycle (Tg). The flip-flops 1000, 1001 and 1002

change their state individually. This has the advantage that the output signal is unambiguous and that no timing problem (no race) occurs between the output signals. In other words: it can do not give any questionable output signals as an output signal is also a little out of phase with the other output characters can be generated. These "pure impulses" are used to control the Franking machine, the gates and the dialing process used.

The gray code counter is used to drive the memory address counter 828 as shown in FIG. The memory address counter is a 5-digit synchronous counter, which comprises 5 JK flip-flops 1010, 1011, 1012, 1013 and 1014 , which are wired as shown and output signals A, Ä or B, B or C, C or, D, D or £, £ deliver. The output signals A, B, C, D and E are shown in FIG. 8 plotted over the time axis. The output characters A, B, CD and £ are used to form 32 addresses, as shown in FIG. The synchronous counter counts in an even, binary sequence and generates these addresses, which could also be supplied by the computer that controls the postage meter machine circuit.

The memory address lines are driven during periods 2 through 7. The memory address counter changes its state during periods 8 through 1 inclusive, so that the address lines only controlled if no address is being changed. As one can see from FIG. 8 sees must have at least one Machine cycle must have expired before the signal for address control assumes a high value again. As a result, the mode sequence can take place which represents the operating mode with the highest priority and the operating input expected

The postage meter cycle is initiated by any of the three control units (1) ENTER POSTAGE. (2) CREDIT ADDITION and (3) CYCLE generated. These modes are sequentially selected by mode sequencer 838 of FIG. 11 checked. The mode sequencer 838 depends on the clock pulses to determine the mode sequence. The INPUT OF POSTAGE mode has the highest priority and clock pulse 2 is fed to its circuit via line 1040 CP.2. ADDITION OF CREDIT mode corresponds to pulse 4 via line 1041 CP4. The CYCLE mode has the lowest priority since this mode is generally only used for reading (access to the contents of the memory for display purposes). This switching of the cycle mode is fed during the pulse 6 via the line 1042 CP.6 (see FIG. 7, 7h).

The three flip-flops 1017 and 1015.1016 1018.1019 supply via lines and 1020 signals to the control logic 842. These cables are, for convenience, in Figure 6 as lines 840 drawn the flip-flops 1017 and 1015.1016 alternately exclusive. When one of these flip-flops changes to its logical "1" state, it blocks the other two flip-flops; by a complementary signal through the NAND circuits 1021, 1022 and 1023 returns the AND circuits 1023 1021.1022 cntprcchendcn feed the flip-flops 1015, 1016 and 1017. These AND circuits receive through a line 1024, the output signal of the NOR element 1025. The NOR element 1025 is connected to the lines 1018, 1019 and 1020 at the points 1026, 1027 and 1028 , as FIG. 11 shows

The flip-flops 1034, 1035 and 1036 store information entered from the outside, ζ. B. Postage entry, status display or credit entry, which you receive via lines 874,619 or 900. This of au-Ben supplied, stored information affects the operation of the flip-flops 1015, 1016 and 1017 and may be present during any of the flip-flop is not enabled 1015.1016 or 1017

The F i g. 7, 7b and 7c show the relation of the address control signal (Jc) to the dial signal (Jb). If the dialing signal changes to the logical "1" state (hatched section in FIG. 7b), the zero counter decoder 832 (FIG. 10) causes the address signal at the end of period 8 to change to the logical "1". ! 5 was passed over.

As one can see from FIG. 7, 7h, the three subsequent modes are activated during period 2, 4 and 6, respectively. Of the CYCLE mode is activated by initiation (if the

Display selection switch entered.

FIG. 12 shows the control logic circuits 1029, 1030, 1031, 1032 and 1033 of the control logic 842 (FIG. 13). These gate circuits generate output signals at given periods which depend on the states of the JK code flip-flops 1000, 1001 and 1002, ie from the states A ' or A' and B or Bt and C or C ' (see FIG . 7, la, 7e or 7f).

The bigik circuit 1029 generates the output pulse 2; logic circuit 1030 generates output pulse 4; the logic circuit 1031 generates the output pulse 6; the logic circuit 1032 generates the output pulse 8; and the logic circuit 1033 generates the output pulse 7. The output pulses of periods 1, 3 and 5 are not generated because they are not used.

The final address decoder circuit 836 is shown in FIG. 11, this circuit is fed from memory address counter 828 (see FIG. 10). When the last address pulse has reached this circuit, it clears the flip-flop 1015 via the line 1029 *. The flip-flops 1016 and 1017 are cleared via the line 1030 ' from the decoder circuit 836 which feeds the gate circuit 103Γ. The gate circuit 103Γ clears the FMp flops 1016 and 1017 via the lines 1032 ' or 1033'.

In Fig. 11 also shows the circuit of the combination lock switch 860 and the credit addition circuit behind the line 900. The circuit of the combination lock switch 860 is a known bounce-free circuit.

The F i g. 13 shows the memory 806 of FIG. 6B. The memory consists of a 16-bit COS / MOS memory chip, which is designed in such a way that it forms 32 words, each of which is 4 digits wide. The 32 locations are distributed over three registers on the increasing register 808, on the decreasing postage register 810 and on the piece counter 812. Each position (4-bit word) has a binary coded decimal number (see FIG. 9). The memory contains two identical cards, each of which has 4 chips 1037, 1038, 1039 and 1040 , respectively. When selecting an address, one bit is queried in each of the 4 chips 1037, 1038, 1039 and 1040. In this way, a decimal place which is binary coded with 4 bits can be stored. COS / MOS was chosen because of its low idle or idle power which enables battery operation for very long periods of time.

keep.

Other features of this memory circuit are the immunity to large noise, the simple -Interface circuit and the mentioned, non-critical power consumption.

The F i g. 9 shows that the first 16 digits (0-15) correspond to the falling register 808 that the next 8 digits (16-23) dom falling register 810 and that the last 8 digits (24—31) are assigned to the piece counter 812.

Fig. 14 shows the circuit of the memory address decoder 814 and the memory buffer circuit of memory 806. Data gates 888 and 905 in FIG Γ i g. 14 are for schematic reasons in FIG. 6B shown as a single AND circuit. The lines 885 and 887, which are those shown in Figure 6B Feeding AND circuits are corresponding in Fig. 14 shown connected to multiple data gates 888 and 905, respectively.

Network 1041, which includes data gates 888 and 905, has the output signals AA, AA; BB, W; CC, CÜ; DD, D ~ D and EE, EE. These output signals are fed to network 1042. The outputs of network 1042 are connected to chips 1037, 1038, 1039 and 1040 as shown in FIG. 13 is violated. The outputs of the network 1042 (Xi; Xl; Xi; X4, Vl; Ϋ2; Ϋ3 and V4) are connected to the corresponding chip locations.

The output gates 1043 and 1044 of network 1042, which provide outputs EE and ΈΈ, select either the first or second set of chips in memory. These output signals thus correspond to the column of the "E" bit in FIG. 9.

The network 1045 corresponds to the buffer circuit which is assigned to the memory 806. The output characters of the memory (M \ 2 ~ ^a ; M | 2- '; M \ 2 ~ ² and iV / i ^2-3 ) are, as shown in FIG. 13 is fed to the network 1045. The second set of chips (not shown) of the memory supplies output characters (M ₂ 2- °; M ₂ 2- '; M ₂ 2 ~ i and Μ ₂ 2->), which are also fed to the network 1045. The designations 2 ° and 2 ³ denote the least important and the most important bit. The output characters of the network 1045 are fed to the arithmetic unit 816.

Fig. 15 shows the circuit arrangement of the arithmetic Unit 816, the buffers 818, which the arithmetic unit feeds back to the memory 806 Part of the decoder 820 for indicating the lack of credit and the interruption and status display section 872 of the franking machine status register 8OZ

The arithmetic unit 816 of FIG. 15 is fed via the lines 1046, 1047, 1048 or 1049 of the network 1045 of FIG Lines 1051, 1052, 1053 and 1054 are supplied from the postage storage device 804 (Fig. 17). The postage storage device and memory outputs are fed to binary adder 1050 where respective inputs (A and B) are added. The outputs of the binary adder 1050 are fed to a decoder 1055 which converts the binary coded sums into the BCD code

The flip-hops 1056 and 1057 receive clock pulses CP6 and CPS, respectively, to control the correct forwarding of the transmission pulses.

The buffer 818 contains four flip-flops 1058, 1059, 1060 or 1061, which receive the BCD output from the decoder 1055, store the data and they to the memory 806 via the lines 895 (cf. FIG. 6b). Lines 895 are via lines 1062 connected to decoder 820 for insufficient credit. The interruption and status display section 872 is connected to line 895 and is fed via line 1063. The latter Section receives a signal that the

ίο excludes combination lock when the falling register is full. F i g. 16 shows the aforementioned low postage decoder 820 and the interruption and status display section 872.
16 also shows the arithmetic control circuit 1066 which provides the clear carry and preset carry signals for the arithmetic unit 816. The erase carry signal is carried over line 1064 and the preset carry signal is carried over line 1065, each to flip-flop 1057 (Fig. 15).

Fig. 17 shows the postage fee storage device 804. The outputs of the postage charge storage device of FIG Holding circuits of the postage fee storage device 804 are stored. These latches are four Groups of four holding devices each, which are shown by arrows 1067, 1068, 1069 and 1070. Any set of four holding facilities stores postage amounts from $ 0.01 to $ 10.00. Each of these groups saves into one of the multiplexers 1071, 1072, 1073 or 1074. These multiplexers each select a BCD location at the same time from the corresponding set of holding devices. These multiplexers lead to another Series of multiplexers 1075, 1076, 1077 and 1078.

These multiplexers 1075, 1076, 1077 and 1078 are used to calculate the postage amount, the nine's complement the amount of postage or zero. The nine's complement of the postage fee amount is used to perform the subtraction of the To effect postage fee amount from the falling register. Selecting the zero is an example of this necessary to effect the carry over to a higher order decimal place and the contents of the register during of a cycle to leave unchanged (see Fig. 9).

The output signals of these multiplexers 1075, 1076, 1077 and 1078 are via lines 1051,1052,1053 and 1054 are supplied to the arithmetic unit 816

The multiplexers 1075, 1076, 1077 and 1078 are

so controlled by input signals transmitted over lines 1079 and 1080 from multiplexer control logic circuit 1081 of FIG. 16 can be received. The multiplexers 1075, 1076, 1077 and 1078 select the correct postage amount, its nine's complement, or zero for each of the three registers (rising, falling, and item counter) during the ENTER POSTAGE, BALANCE ADD and CYCLE modes. as in Fig. The multiplexers 1071,1072,1073 and 1074 are controlled by the outputs A and B of the memory address counter 828 (FIG. 10) to have the digits for $ 0.01, for $ 0.10, for $ 1.00 and for $ 10.00 from the postage charge storage device 804, while at the same time the corresponding digits are queried from the increasing register 808 and the thawing register SiO (see FIG. 6B). The input signals supplied via lines 1082 and 1083 are from the outputs of the first two JK flip-flops 1010 and 1011 of the syn-

chronic memory address counter 828 derived.

The multiplexers 1075, 1076, 1077 and 1078 receive the added credits over the lines 1084, 1085, 1086 and 1087, respectively. In this case point 5 is over Transfer lines 1084, 1085, 1086 and 1087 and add them to the falling register at the point for $ 100, which was selected by multiplexer control logic circuit 1081 (see FIG. 16) to effect a credit increase of SOOO.

Fig. 18 shows the print buffer circuit, which the postage charge storage device 804 feeds. The print buffer circuit has four banks (only one is shown) of four flip-flops 1088, 1089, 1090 and 1091 of the D-type. Each bank of four D flip-flops 1088, 1089.1090 and 1091 are over the lines 1092.1093, 1094 and 1095 an input signal to the four holding devices of the postage fee storage device 804 from. The signals running over these lines are also fed to a comparator! 096 for checking BCD errors. This comparator also receives signals from the 4-bit counter of Figure 20 over lines 1097, 1098, 1099 and UOO. The D flip-flops 1088, 1089, 1090 and 1091 receive data from the data storage section 862 from the computer. Evaluation pulses for entering the data in the Print buffers are generated by gate circuits 1125, 1126, 1127 and 1128 and via lines (outputs) 1101,1102,1103 and 1104 (see Fig. 20) are routed to the print buffer (which consists of 1088,1089,1090 and 1091) and allow the entry of the digits for $ 0.01, S 0.10, $ 1.00 and $ 10.00 via control lines 1105. As you can see in Fig.21, the BCD data take the Set 12 to 15 of the digital word.

The output signals of the banks of D flip-flops 1088, 1089, 1090 and 1091 are fed to a 4-bit 10-line decoder 1106, the output signals of which feed a series of electrical contacts which correspond to the various positions of the mutable Print modules of the number selection module 528 of FIG. 3 correspond. The decoder sends a logical "0" signal to the contact that corresponds to the position to be selected. These electrical contacts will be scanned by a contact arm on each print module.

19 shows circuits 1109 and 1110. Circuit 1110 has input lines 1111, 1112, 1113 and 1114, which connect each contact arm (commutation brush) to the rotating elements of the variable pressure modules of the number dialing module 528. If a logical "1" signal is sensed by the contact arm indicating an incorrect position of the Indicates pressure wheel, the signal is transmitted via the appropriate input line (1111,1112,1113,1114) to the corresponding gate circuit 1115, whereby this is opened and a corresponding thyristor 1116 turns on each thyristor 1116 is one of the variable modules with a magnetic drive coil Rotation of the print wheel connected to the appropriate position. When the right position is reached, he feels Kontaktarm a logic "0" signal, which is fed back via the input lines 1111, 1112, 1113 and 1114 to the corresponding gate circuit 1115 to lock and turn off the thyristor 1116.

Circuit 1109 is 10% from each comparator These lines are fed via its output line 1166 of FIG. 18 (only one of four circuits is shown) via lines 1117, 1118, 1119 and 1120 feed a gate circuit 1121, which checks the binary coded decimals and sends an output signal to the Line 1107 there. The line 1107 leads to the gate circuit 1122, see FIG. 20. The gate circuit 1122 and the JK flip-floj> 1123 are part of the interruption

s and status indicator circuit 872.

The gate circuit 1124 of the circuit U10 is connected to each of the input lines 1111, 1112, 1113 and 1114 connected and is used to check that the print wheels of the variable print modules are in the set position. The output of the gate circuit 1124 is supplied to the via line 1108 Gate circuit 1125 of the interruption and status display section 872 is output, as shown in FIG. 20 shows. the Form output signals of the flip-flops 1144 and 1123 part of the feedback via the franking machine circuit status register (Fig. 22) to the Computer.

The F i g. 20 shows the logic circuit of the print wheels. The pressure to Isdende ⁿ uffer is from the B> ts 10 and 11 of the digital output (FIG. 21) selected AND circuits 1214 (cf. FIG. 21) decode these bits 10 and 11 specifying the digits for $ 0.01. $ 0.10. $ 1.00 and $ 10.00 and send the corresponding control signals to gate circuits 1125 to 1128 (cf.

Fig. 20). The sampling pulses to the gate circuits 1125 to 1128 generate an evaluation signal on one of the Lines 1101 to 1104, which go to the correct print buffer via control line 1105 (Fig. 18), whereby the data of the digital output of the data Memory section 862 (Fig. 21) in the print buffer (D- Flip-flop 1088-1091 in Fig. 18).

The logic circuit of the print wheels contains a pulse generator (arrow 1129), which square wave signals with a frequency of 60 Hz, which over a Control line 1131 controls a counter 1130. The counter 1130 provides 12 pulses to operate the print wheels. The print wheels require a maximum of 10 pulses, see above that several unnecessary pulses are generated. This abundance of impulses is planned so that all Print wheels can be safely adjusted. If a print wheel is not in the correct position after the 12th pulse this is felt and shown on the display device displayed as an error condition as described above.

The counter 1130 outputs pulses to the flip-flop 1134 via a decoder gate 1133. This flip-flop 1134 outputs a control signal to the gate circuit 1115 of FIG. 1 via line 1132. 19 to switch on the thyristors. The postage meter status register 802

so (Fig. 22) is the link between the electronic Franking machine circuit and the computer controlling it. It performs the following three functions:

1) transfer of data, 2) Display of the status and 3) Display of the error status.

Bits 12 through 15 (not shown in Figure 22) become Transmission of the data from the postage meter machine status register to the computer uses Der Un Interrupt and status display section 872 (first storage section of the postage meter status register 802)

& * Print wheels, set immobile (Bil 0) line 1143

Printhead, immobile (bit 1) line 1221 pressure capacitor charged (bit 8) line 1220

no credit (bit 9) line 1217
Registration reading ended (bit ok) line 1219
Franking machine ready (bit 11) line 1215

"Print head, not moving" and "Print wheels set" set the flip-flops 1140 or 1139, which cause interruptions via the gate circuit 1141. This frees the computer from the necessity for the duration of the slow mechanical Waiting for operation in a loop.

Typically, in operation of the postage meter circuit, four BCD digits are posted to the print buffers, the postage printer is set to a number, the computer checks the postage meter circuit to determine that sufficient postage is available, and then the print command is issued. The computer does not issue any further “setting” or “print commands as long as the franking machine .3LiIaItUUg iiiCii · - £ .cii iidttc to end the vörnciigcii Vci'fäiii'cfiS step. The franking machine circuit is logically blocked from any attempt to carry out a step that is not "precisely defined". Each such operation sets a flip-flop 1135, which sends a signal to bit 4 (flip-flop 1135) of the digital input via line 1136, which indicates a programming error. Examples of such errors are:
Output of a print command

a) before the pressure wheels are completely adjusted,

b) while the printhead is moving,

c) if there is a setting error,

d) if the BCD code is not in the print buffer,

e) if there is not enough postage in the franking machine circuit,

f) when the power supply of the postage printing device is not ready and

g) if the franking machine circuit is not ready.

Such errors also cause a subp5, which asks the computer, its status register read off and run through a corresponding routine program. Some error conditions can handled by appropriate programming; others require human intervention. Bit 5 is another error message: no BCD characters in print buffer. Bit 6 comes when the print wheels should change position because of the pressure stop.

A one-shot 1148 provides a clock signal to the sequencer of Fig. 11. This signal, which is one second is transmitted via line 874 to flip-flop 1035 (FIG. 11) to set the postage entry mode trigger.

A monoflop 1150 delivers a blind signal of 50 ms Duration to indicate the return of the printhead. However, the printhead can actually use it of a switch, so that the monoflop 1150 is not absolutely necessary

The F i g. 23 shows the circuit arrangement of the main power supply 856 and the voltage monitoring circuit 858. The voltage monitoring circuit 858 comprises two Zener diodes 1151 and 1152, respectively. The Zener diode 1151 is used to monitor the voltage level in front of the regulator of the logic circuit. The Zener diode 1152 is used to monitor the voltage level in front of the regulator 1161 of the memory. When the voltage level on lines 1153 or 1154 falls below a desired value, either transistor Q 1 or transistor Q 2 is turned on. When either of these transistors Q 1 or Q2 is turned on, QS goes "Mchtie'tend, which in turn turns Q 7 off. A low signal then appears on line 1155. This low signal is signaled via line 1155 of initiator circuit 844 of FIG If no operation is carried out in the postage meter machine circuit (e.g. addition of the credit) when this low signal is received, a command is sent via line 1156 (FIG. 24) to switch off the supply » This command is then transmitted over line 1156 to the power supply circuit of Fig. 23, where it turns on transistor Q 4. When transistor Q 4 becomes conductive, a current is drawn over line 1157, causing the transistor Q3 äbgeiiC'hdiici wn'u. It angeiiuinmeii wiiti that the transistors Q and Q are nonconductive 2 because they have caused the beginning of the state "power off". the transistor Q 9 turns the transistor Q Il and thereby removes its power supply from the memory.

If, on the other hand, a low signal is received on line 1155 in the postage meter circuit an operation is performed, the gate circuit 1158 (FIG. 24) remains disabled until this Operation is finished. This causes a shutdown

jo the power supply by the command on the line 1156 prevented until the end of the operation.

The zener diode 1159 (Fig. 23) regulates the voltage of memory. The is above a level of 12 volts Zener diode 1159 is conductive and it holds the output of transistor Q 11 at about 12 volts.

Transistors Q10 and Q5 are used in a current limiting circuit to protect the memory power supply. If too much current is drawn on line 1162, transistor Q10 becomes conductive, which then turns transistor Q 5 on. The current on line 1163 is reduced, thereby initiating the shutdown of transistor QlI, so that the current on line 1162 « is held at a safe value.

The transistor Q 6 provides a "power on" signal on the line 1160 which the initiator circuit 844 of the F i g. 24 is supplied.

24 shows the initiation circuit 844 mentioned. Elements 1164 and 1165 are monoflops. The Monoflop 1164 delivers the "power off" command via the Line 1156. The monoflop 1165 delivers the initiation signal, which is used to preset the logic elements when switching on, including the Flip-flops, which triggers the ZY-K.LUS mode when switched on

The F i g. 25 shows the circuit of the dial keys 612, 614,616,618 and 620 of the display device. Every key switch acts as a buffer register, which stores the information. The switching of each key includes a single pole switch 1167 that has two positions has a known bounce-free circuit 1168 and a JK flip-flop 1169. Only one button can be used at a time be turned over at the same time. The buttons are mechanically alternately exclusive.

The information goes to JK flip-flops 1169 transmitted when the franking machine is not working in one of the three modes. The output signals of these Circuits are therefore not allowed during operation.

dus CYCLE constant

The gate circuit 1171 generates a signal every time a switch is pressed. The signal will via line 619 to the CYCLE mode circuit of FIG. 11 transferred.

A switch clock signal is carried on line 1170, which the: Reading of the manually operated The switch in the JK flip-flops is synchronized with the clock-controlled franking machine operations Switch clock signal is generated by the switch clock stage 1172 of Fig.26. This signal is only generated when there is no run signal and when the Address counter is at zero

A display that has built-in holding devices and decoders is used as the display device of the postage meter machine

The multiplexer circuit 1173 of Fig. 26 acts as a Gate circuit for the data from the memory to the display device. It also deletes and checks them the display device. Multiplexer elements 1178, 1179, 1180 and 1181 receive from the output buffer 818 of the arithmetic unit (Fig. 15) via lines 1174, 11-5, 1176 or 1177 storage data.

In the display mode, one BCD digit of the memory data is sent to the display device via lines 1182 to 1185. The circuit 1186 of FIG. 26 generates clock signals for data entry into the appropriate display latch circuit. Of the "0" output of 1186 forms an input clock for data into the least important number display. Of the “9” output forms an input cycle for the most important number display.

Since the memory only stores numbers, there is no need for a circuit to select the decimal point in the display. Like the Fig. 26 shows, circuit 1188 is used for this purpose.

The indicator lights 604, 606 and 608 are also in F i g. 26 shown

F i g. 27 shows the logic circuit for the direct memory read control, which address data to the memory cher control logic of FIG. 14 transmits

Bits 7 to Π of the computer's digital output (see Fig. 21) are transferred to lines 1189, 1190, 1191, 1192 and 1193 of the buffers 1194, 1195, 1196, 1197 and

Given in 1198. When the command "read memory" is put on line 912, the flip-flop becomes

1199 set provided the system is in place not exactly in the middle of a mode. The buffers 1194, 1195, 1196, 1197 and 1198 transmit the address data on line 887 to data gates 888 of the so Network 1041 of FIG. 14th

At clock pulse 2, the flip-flop 1200 sends a "direct" signal to the line 892 of the network 1041, whereby these gates are opened and the address data to the buffers 1201, 1202, 1203 and 1204 5s of the network 1045 via the memory of FIG. The clock pulse 2 also clears the flip-flop 1199 via the line 1205 from the flip-flop 1200.

When the clock pulse 6, the gate circuit 1206 is opened. Buffers 1201, 1202, 1203 and 1204 are transferred their content on the holding devices 1207,1208,1209 and 1210 which feed the data section 914 (Fig. 21).

The flip-flop 1211 (FIG. 27) turns 6 on the clock pulse and indicates that the "reading process" has ended. The flip-flop 1211 is left in the logical "1" state after the franking machine circuit has been read sen. As a result, an interrupt signal is received from the interrupt and overseas display section 872 This notifies the computer that the reading process has been completed and the required information at the digital input of the Computer is available

When the clock pulse 8, the flip-flop 1200 is deleted thereby resetting the circuit for a new read operation.

In addition 29 sheets of drawings

Claims (16)

Patent claims: 1. Franking device, containing a franking machine with an input device for inputting the data corresponding to the postage fees to be printed, with a postage printing device for printing the postage fees, with a billing device for billing the printed postage fees, with a control circuit for controlling the postage printing device and the billing device and with a Security device for the physical protection of the accounting device and the postage printing device against unauthorized adjustment or falsification, characterized in that the input device has an electronic interface (714) , - With a first status memory for receiving control command signals and data signal gas from an external electronic digital control device, such as signals for setting printing elements (526) of the postage printing device and for reading out the contents of registers of the accounting device (702) and forwarding them to the control circuit (706) the franking machine, and - With a second status memory for receiving status signals and data signals from the postage meter machine, such as a message that contains the correct setting of the printing elements (5 ^ 6) and the contents of the accounting registers (702) and their Further extension to the external electronic digital control device. 2. Franking device according to claim 1, characterized in that the first status memory for the external electronic digital control device and the second status memory for the franking machine are connected to the external electronic digital control device via an interface circuit (798) of the electronic interface (714) . 3. Franking device according to claim 1 or 2, characterized in that the first status memory a first memory section for the external electronic digital control device for the control command signals and a second memory section for the data signals. 4. Franking device according to claim 1 or 2, characterized in that the second status memory for the postage meter machine, a first memory section for the status signals and a having a second storage section for the data signals. 5. Franking device according to one of the preceding claims, characterized in that the first status memory and the second status memory are registers (800 and 802) . 6. Franking device according to one of the preceding claims, characterized in that the external electronic digital control device is a computer (316) . 7. Franking device according to one of the preceding claims, characterized in that from the first memory section of the computer status register (800) a first line (866) for transmitting the control command signal for setting the printing elements (526), a second line (912) rar transmission of the Control command signal for reading out the contents of the registers of the accounting device (702) and a third line (874) for transmitting a control command signal for the postage fee printing to the control circuit (706) 8. Franking device according to claim 7, characterized in that the first line (866) and the second line (912) lead directly to a control logic (842) of the control circuit (706), while the third line (874) with one of the control logic ( 842) upstream mode follower circuit (838) of the control circuit (706) is connected 9. Franking device according to one of the preceding claims, characterized in that a line (864) leads from the second memory section of the computer status register (800) for the data signals to a postage charge storage device (804) of a postage printing circuit (700) of the postage printing device 10. Franking device according to claim 9, characterized in that the line (864) from the second memory section of the computer status register (800) for the data signals to a memory address decoder (814) of the accounting device (702) for addressing the register of the accounting device for reading out the the desired content of the register 11. Franking device according to one of claims 1 to 6, characterized in that from the first memory section of the franking machine status register (802) for the status signals a data return line (870) for a correct setting of the printing elements (526) containing signal to the postage printing device, a line ( 898) for a status signal containing insufficient postage credit to a test circuit (decoder 820), which checks the contents of the registers of the accounting device (702) for insufficient postage charges before printing, and a line (954) for a postage charge printing which includes the implementation of a postage charge Feed the print confirmation signal to a print confirmation circuit (711) . 12. Franking device according to claim 11, characterized in that from the first memory section of the franking machine status register (802) an additional line (926) for a status signal containing too low a supply voltage or a failure of the franking machine leads to a power supply circuit (712). 13. Franking device according to claim 11, characterized in that the data return line (870) leads to a number selection module (528) for setting the printing elements (526) of the postage printing circuit (700) of the postage printing device. 14. Franking device according to one of claims 1 to 6, characterized in that a line (884) for the transmission of the data signals to the registers of the accounting device (702) leads from the second memory section of the franking machine status register (802). 15. Franking device according to claim 10, characterized in that the second memory section of the computer status register (800) next to the memory section for data signals a separate memory section for address data signals having. 16. Franking device according to one of the preceding claims, characterized in that the first memory section of the franking machine status register (802) is subdivided into a register section for status signals, such as printing elements set (bit 0), printhead immovable (bit 1), register ablation of the accounting device ( 702) ended (bit 10), franking machine ready (bit 11), and in a register section for error signals, such as issuing a print command before setting the printing elements (526), during the movement of the print head, in the event of a setting error. non-existent data signals in the postage charge storage device (804) of the postage printing device, in the case of insufficient postage charge credit, in the case of insufficient or ready energy supply, in the case of a postage meter machine not ready. i /. Franking device according to claim 16, characterized in that when an error signal occurs, a flip-flop (1135) is activated which forwards an error status signal (bit 4) to the computer (316) via a line (1136) and initiates an interruption, after which the Computer (316) is requested to read the postage meter machine status register and to run through a corresponding program.