DE2350225A1 - Anordnung fuer ein rechnersystem zur variablen ausblendung von informationen - Google Patents
Anordnung fuer ein rechnersystem zur variablen ausblendung von informationenInfo
- Publication number
- DE2350225A1 DE2350225A1 DE19732350225 DE2350225A DE2350225A1 DE 2350225 A1 DE2350225 A1 DE 2350225A1 DE 19732350225 DE19732350225 DE 19732350225 DE 2350225 A DE2350225 A DE 2350225A DE 2350225 A1 DE2350225 A1 DE 2350225A1
- Authority
- DE
- Germany
- Prior art keywords
- memory
- buffer
- bytes
- buffer memory
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US00295303A US3800292A (en) | 1972-10-05 | 1972-10-05 | Variable masking for segmented memory |
Publications (2)
Publication Number | Publication Date |
---|---|
DE2350225A1 true DE2350225A1 (de) | 1974-04-18 |
DE2350225C2 DE2350225C2 (US07935154-20110503-C00018.png) | 1988-12-29 |
Family
ID=23137121
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19732350225 Granted DE2350225A1 (de) | 1972-10-05 | 1973-10-05 | Anordnung fuer ein rechnersystem zur variablen ausblendung von informationen |
Country Status (6)
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6986118B2 (en) | 2002-09-27 | 2006-01-10 | Infineon Technologies Ag | Method for controlling semiconductor chips and control apparatus |
Families Citing this family (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3979726A (en) * | 1974-04-10 | 1976-09-07 | Honeywell Information Systems, Inc. | Apparatus for selectively clearing a cache store in a processor having segmentation and paging |
US3964054A (en) * | 1975-06-23 | 1976-06-15 | International Business Machines Corporation | Hierarchy response priority adjustment mechanism |
US4084234A (en) * | 1977-02-17 | 1978-04-11 | Honeywell Information Systems Inc. | Cache write capacity |
US4195342A (en) * | 1977-12-22 | 1980-03-25 | Honeywell Information Systems Inc. | Multi-configurable cache store system |
GB2016752B (en) * | 1978-03-16 | 1982-03-10 | Ibm | Data processing apparatus |
DE2842288A1 (de) * | 1978-09-28 | 1980-04-17 | Siemens Ag | Datentransferschalter mit assoziativer adressauswahl in einem virtuellen speicher |
US4394733A (en) * | 1980-11-14 | 1983-07-19 | Sperry Corporation | Cache/disk subsystem |
US4460958A (en) * | 1981-01-26 | 1984-07-17 | Rca Corporation | Window-scanned memory |
US4493026A (en) * | 1982-05-26 | 1985-01-08 | International Business Machines Corporation | Set associative sector cache |
IT1153611B (it) * | 1982-11-04 | 1987-01-14 | Honeywell Inf Systems | Procedimento di mappatura della memoria in sistema di elaborazione dati |
US4803617A (en) * | 1986-02-10 | 1989-02-07 | Eastman Kodak Company | Multi-processor using shared buses |
JPH087715B2 (ja) * | 1990-11-15 | 1996-01-29 | インターナショナル・ビジネス・マシーンズ・コーポレイション | データ処理装置及びアクセス制御方法 |
US5454093A (en) * | 1991-02-25 | 1995-09-26 | International Business Machines Corporation | Buffer bypass for quick data access |
US6766431B1 (en) * | 2000-06-16 | 2004-07-20 | Freescale Semiconductor, Inc. | Data processing system and method for a sector cache |
US8130560B1 (en) | 2006-11-13 | 2012-03-06 | Google Inc. | Multi-rank partial width memory modules |
US8089795B2 (en) | 2006-02-09 | 2012-01-03 | Google Inc. | Memory module with memory stack and interface with enhanced capabilities |
US7386656B2 (en) | 2006-07-31 | 2008-06-10 | Metaram, Inc. | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit |
US8438328B2 (en) | 2008-02-21 | 2013-05-07 | Google Inc. | Emulation of abstracted DIMMs using abstracted DRAMs |
US8244971B2 (en) | 2006-07-31 | 2012-08-14 | Google Inc. | Memory circuit system and method |
US8397013B1 (en) | 2006-10-05 | 2013-03-12 | Google Inc. | Hybrid memory module |
US8055833B2 (en) | 2006-10-05 | 2011-11-08 | Google Inc. | System and method for increasing capacity, performance, and flexibility of flash storage |
US8359187B2 (en) | 2005-06-24 | 2013-01-22 | Google Inc. | Simulating a different number of memory circuit devices |
US8327104B2 (en) | 2006-07-31 | 2012-12-04 | Google Inc. | Adjusting the timing of signals associated with a memory system |
US8386722B1 (en) | 2008-06-23 | 2013-02-26 | Google Inc. | Stacked DIMM memory interface |
US10013371B2 (en) | 2005-06-24 | 2018-07-03 | Google Llc | Configurable memory circuit system and method |
US8077535B2 (en) | 2006-07-31 | 2011-12-13 | Google Inc. | Memory refresh apparatus and method |
US8081474B1 (en) | 2007-12-18 | 2011-12-20 | Google Inc. | Embossed heat spreader |
GB2441726B (en) * | 2005-06-24 | 2010-08-11 | Metaram Inc | An integrated memory core and memory interface circuit |
US8090897B2 (en) | 2006-07-31 | 2012-01-03 | Google Inc. | System and method for simulating an aspect of a memory circuit |
US9171585B2 (en) | 2005-06-24 | 2015-10-27 | Google Inc. | Configurable memory circuit system and method |
US7609567B2 (en) * | 2005-06-24 | 2009-10-27 | Metaram, Inc. | System and method for simulating an aspect of a memory circuit |
US9507739B2 (en) | 2005-06-24 | 2016-11-29 | Google Inc. | Configurable memory circuit system and method |
US20080082763A1 (en) * | 2006-10-02 | 2008-04-03 | Metaram, Inc. | Apparatus and method for power management of memory circuits by a system or component thereof |
US8111566B1 (en) | 2007-11-16 | 2012-02-07 | Google, Inc. | Optimal channel design for memory devices for providing a high-speed memory interface |
US8335894B1 (en) | 2008-07-25 | 2012-12-18 | Google Inc. | Configurable memory system with interface circuit |
US9542352B2 (en) | 2006-02-09 | 2017-01-10 | Google Inc. | System and method for reducing command scheduling constraints of memory circuits |
US20080028136A1 (en) * | 2006-07-31 | 2008-01-31 | Schakel Keith R | Method and apparatus for refresh management of memory modules |
US8041881B2 (en) * | 2006-07-31 | 2011-10-18 | Google Inc. | Memory device with emulated characteristics |
US8796830B1 (en) | 2006-09-01 | 2014-08-05 | Google Inc. | Stackable low-profile lead frame package |
US8060774B2 (en) | 2005-06-24 | 2011-11-15 | Google Inc. | Memory systems and memory modules |
JP5242397B2 (ja) | 2005-09-02 | 2013-07-24 | メタラム インコーポレイテッド | Dramをスタックする方法及び装置 |
US9632929B2 (en) | 2006-02-09 | 2017-04-25 | Google Inc. | Translating an address associated with a command communicated between a system and memory circuits |
US7724589B2 (en) | 2006-07-31 | 2010-05-25 | Google Inc. | System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits |
US8269792B2 (en) * | 2006-11-21 | 2012-09-18 | Qualcomm Incorporated | Efficient scissoring for graphics application |
US7921274B2 (en) * | 2007-04-19 | 2011-04-05 | Qualcomm Incorporated | Computer memory addressing mode employing memory segmenting and masking |
US8209479B2 (en) | 2007-07-18 | 2012-06-26 | Google Inc. | Memory circuit system and method |
US8080874B1 (en) | 2007-09-14 | 2011-12-20 | Google Inc. | Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween |
WO2010144624A1 (en) | 2009-06-09 | 2010-12-16 | Google Inc. | Programming of dimm termination resistance values |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3626374A (en) * | 1970-02-10 | 1971-12-07 | Bell Telephone Labor Inc | High-speed data-directed information processing system characterized by a plural-module byte-organized memory unit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3292151A (en) * | 1962-06-04 | 1966-12-13 | Ibm | Memory expansion |
US3380034A (en) * | 1963-07-17 | 1968-04-23 | Vyzk Ustav Matemat Stroju | Addressing system for computer memories |
US3340512A (en) * | 1964-07-20 | 1967-09-05 | Burroughs Corp | Storage-pattern indicating and decoding system |
US3634882A (en) * | 1964-12-14 | 1972-01-11 | Bell Telephone Labor Inc | Machine-processing of symbolic data constituents |
US3569938A (en) * | 1967-12-20 | 1971-03-09 | Ibm | Storage manager |
US3543245A (en) * | 1968-02-29 | 1970-11-24 | Ferranti Ltd | Computer systems |
US3686640A (en) * | 1970-06-25 | 1972-08-22 | Cogar Corp | Variable organization memory system |
-
1972
- 1972-10-05 US US00295303A patent/US3800292A/en not_active Expired - Lifetime
-
1973
- 1973-07-13 CA CA176,385A patent/CA1002204A/en not_active Expired
- 1973-08-09 GB GB3774173A patent/GB1433393A/en not_active Expired
- 1973-08-09 JP JP8889873A patent/JPS5710498B2/ja not_active Expired
- 1973-10-04 FR FR7335438A patent/FR2202611A5/fr not_active Expired
- 1973-10-05 DE DE19732350225 patent/DE2350225A1/de active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3626374A (en) * | 1970-02-10 | 1971-12-07 | Bell Telephone Labor Inc | High-speed data-directed information processing system characterized by a plural-module byte-organized memory unit |
Non-Patent Citations (2)
Title |
---|
Computer Group News, März 1969, S. 9-13 * |
Elektron. Rechenanlagen, 1970, H. 2, S. 95-103 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6986118B2 (en) | 2002-09-27 | 2006-01-10 | Infineon Technologies Ag | Method for controlling semiconductor chips and control apparatus |
Also Published As
Publication number | Publication date |
---|---|
FR2202611A5 (US07935154-20110503-C00018.png) | 1974-05-03 |
CA1002204A (en) | 1976-12-21 |
JPS4974447A (US07935154-20110503-C00018.png) | 1974-07-18 |
DE2350225C2 (US07935154-20110503-C00018.png) | 1988-12-29 |
GB1433393A (en) | 1976-04-28 |
JPS5710498B2 (US07935154-20110503-C00018.png) | 1982-02-26 |
US3800292A (en) | 1974-03-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OD | Request for examination | ||
8127 | New person/name/address of the applicant |
Owner name: HONEYWELL BULL INC., MINNEAPOLIS, MINN., US |
|
D2 | Grant after examination | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |