DE2336868C3 - Gate circuit for switching through an analog signal - Google Patents

Description

The present invention relates to a gate circuit for switching through an analog signal, in which as Switching elements field effect transistors are present, which are applied by a to the control electrode Control voltage can be switched on and off.

In gate circuits with field effect transistors, the use of a rectangular one arises Control voltage through the switch-on and switch-off edge, a positive and a negative voltage peak. This Switching peaks that are generated independently of the input signal are disruptive and therefore undesirable.

The purpose of the present invention is to provide a gate circuit which does not have the above disadvantages having.

The gate circuit according to the invention is characterized in that two channels, each with one Source-drain path each of a field effect transistor are present, the analog signal being the first Channel is fed directly and the second channel via a polarity reverser that furthermore in each channel to the Analog signal a DC voltage is added, which is at least equal to the largest of the through the Control voltage generated positive or negative switching peaks, and that a subtraction element is present at the output, to which the two channels are led.

The new gate circuit has the advantage that there are no switching peaks at the output. the Bias voltage to suppress the switching peaks can be positive or negative.

With reference to the drawing, an embodiment of the gate circuit according to the invention is shown below explained in more detail.

F i g. 1 shows a gate circuit for through-connection an analog signal in which field-effect transistors are used as switching elements. Fig.2 shows Diagrams of the voltages occurring in the gate circuit.

868

The gate circuit shown in Fig. 1 consists of the channels A and B and a subsequent subtraction element 4. In each channel, the source-drain path of a field effect transistor 1, 2, z. B. of the type 2N4857A. The first channel A is fed the analog input signal UE directly and the second channel B is fed via a polarity reverser 3. A bias voltage + U is added to the analog voltage ffixt via resistors 11, 12. For DC isolation of the circuit from the input, an input capacitor 10 is provided on the same. At the output of the gate circuit there is a subtraction element 4 to which the sink connections of the two field effect transistors 1, 2 are routed.

A resistor 5 or 6 is attached between the source connections and the control electrodes. The two control electrodes are each connected via a diode 7, 8 to a Schaher 9, via which the control signal - US is fed.

Using the diagrams in FIG. 2 becomes the Function of the sound arrangement explained in more detail.

It is assumed that an analog voltage of the form shown in FIG. 2a is present and that the switch 9 is opened at time 1 1 or 1 1 'and is closed at time 1 2 or 1 2'. A control signal US then results in the form according to FIG. 2 B. In the time before point ί 1 or t i ' (Schaller 9 conductive) there is a voltage - US on the control electrodes of the two field effect transistors 1 and 2, so that they block. In the time span 1 1 to 12 or f 1 'to i2' (switch 9 not conductive) the control electrodes are at the potential of the source electrodes via a resistor 5 or 6, so that the field effect transistor 1 or 2 conducts. If no bias voltage + L / is applied to the source electrode, positive and negative switching peaks according to FIGS. 2eO, 2g0 are present at the sink connection or at the output of the circuit. These arise from the charging or discharging of the stray capacitances at the field effect transistors 1 and 2. To suppress these switching peaks, a positive bias voltage + U is applied to the source connections. This has a size corresponding to the largest - in the present case the negative - switching peak. The analog signals UEmA of the bias voltage + U added thereto can be seen in FIGS. 2c and 2d. The signals at the sink connections of the field effect transistors are shown in FIGS. The polarity of the analog signal in channel B was reversed by the polarity reverser 3.

The subtraction element 4 forms a difference signal UA from the two analog signals switched through via the field effect transistors 1 and 2. The bias voltages cancel each other out, while the analog signals of the two channels add up. An output signal UA is produced in accordance with FIG. 2g.

If the negative switching peaks are greater than the positive, the bias voltage can be as large as the positive switching peaks are matched. The remaining tip can then be removed by means of two Diodes 13, 14, which are in series with the field effect transistors, are blocked.

1 sheet of drawings

Claims (1)

Claim: 23 Gate circuit for switching through an analog signal, in which field effect transistors are present as switching elements, which can be switched on and off by a control voltage applied to the control electrode, characterized in that two channels (A. B) each have a source-sink Path each of a field effect transistor (1, 2) are present, the analog signal (UE ) being fed to the first channel (A) directly and to the second channel (B) via a polarity reverser (3), that furthermore in each channel (A , B) a direct voltage (+ U or - U) is added to the analog signal (UE) , which is at least as large as the largest of the positive or negative switching peaks generated by the control voltage (-US) , and that a subtraction element ( 4) is available to which the two channels (A and are fed.