DE2032939A1 - Semiconductor soldering shim - cross shaped for efficient protective/reducing gas contact - Google Patents

Semiconductor soldering shim - cross shaped for efficient protective/reducing gas contact

Info

Publication number
DE2032939A1
DE2032939A1 DE19702032939 DE2032939A DE2032939A1 DE 2032939 A1 DE2032939 A1 DE 2032939A1 DE 19702032939 DE19702032939 DE 19702032939 DE 2032939 A DE2032939 A DE 2032939A DE 2032939 A1 DE2032939 A1 DE 2032939A1
Authority
DE
Germany
Prior art keywords
soldering
carrier
semiconductor
semiconductor body
solder foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19702032939
Other languages
German (de)
Other versions
DE2032939B2 (en
Inventor
Hans Dipl Phys 7410 Reutlingen Schulze Bernd 7141 Benningen Linstedt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Priority to DE19702032939 priority Critical patent/DE2032939B2/en
Priority to JP10441470A priority patent/JPS5032197B1/ja
Publication of DE2032939A1 publication Critical patent/DE2032939A1/en
Publication of DE2032939B2 publication Critical patent/DE2032939B2/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0233—Sheets, foils
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Die Bonding (AREA)

Abstract

A semiconductor slice is soldered on to a substrate employing a soldering shim, the area of which is smaller than the area of the semiconductor, which is to be attached to the substrate. The pref. shape is either that of a star or a diagonal cross. This configuration permits the protective and reducing gas to make contact with most of the soldering areas thus resulting in a cleaner joint, which as the result of capillary action extends over the whole semiconductor area.

Description

Verfahren zum Auflöten eines Halbleiterkörpers auf einen Träger Die Erfindung betrifft ein Verfahren zum Auflöten eines Halbleiterkörpers auf einen Träger mittels einer zwischen den Träger und den Halbleiterkörper gelegten Lotfolie. Method for soldering a semiconductor body onto a carrier Die The invention relates to a method for soldering a semiconductor body onto a Carrier by means of a solder foil placed between the carrier and the semiconductor body.

Beim Auflöten eines Halbleiterkörpers auf einen Träger ist es bekannt, das Lot als Lotfolie zwischen den Trägerund den Halbleiterkörper zu legen. Dieses Vorgehen ist fertigungstechnisch besonders einfach, fuhrt aber bei Verschmutzung der Folie oder des Trägers häufig zu Lunkern in der zwischen Halbleiterkörper und Träger entstehenden Lotschicht. Diese Lotschicht soll aber möglichst frei von Lunkern sein. Dies läßt sich in bekannter Weise durch hohe Sauberkeit der Lotfolie und der zu verlötenden Oberflächen, durch die Verwendung von reduzierendem Schutzgas im Lötofen und durch ein beim Löten entsprechend gewähltes Temperatur-Zeit-Programm erreichen.When soldering a semiconductor body onto a carrier, it is known to place the solder as a solder foil between the carrier and the semiconductor body. This The procedure is particularly simple in terms of production technology, but leads to contamination the film or the carrier often to voids in the between the semiconductor body and Brazing layer created by the carrier. This solder layer but should as possible be free of voids. This can be achieved in a known manner by the high level of cleanliness Solder foil and the surfaces to be soldered, through the use of reducing Protective gas in the soldering furnace and through a temperature-time program selected accordingly during soldering reach.

Alle diese Voraussetzungen lassen sich aber in einer Mengenfertigung nicht immer leicht und gleichzeitig erfüllen. Dies gilt besonders dann, wenn der Halbleiterkörper großflächig ist. Eine besondere Schwierigkeit liegt darin, daß die reduzierende Schutzgasatmosphäre im Lötofen nur schwer an allen Teilen der Lotfolie angreifen kann und dort entstehendes Gas nur schwer entweichen kann. Insbesondere dann, wenn am Rand des Halbleiterkörpers die Verlötung wegen des dort sofort erfolgenden Angriffes der reduzierenden Schutzgasatmosphäre sehr schnell erfolgt, wird das Innere der Lotschicht eingeschlossen und kann weder reduziert noch entgast werden, so daß sich Lunker bilden können.However, all of these prerequisites can be achieved in a mass production not always easy and fulfilling at the same time. This is especially true when the Semiconductor body is large. A particular difficulty is that the reducing protective gas atmosphere in the soldering furnace is difficult on all parts of the soldering foil can attack and the gas produced there is difficult to escape. In particular when the soldering takes place immediately on the edge of the semiconductor body because of the there Attack of the reducing protective gas atmosphere takes place very quickly, the interior enclosed in the solder layer and can neither be reduced nor degassed, so that cavities can form.

Die Erfindung beruht auf der Erkenntnis, daß man das Lot von der Kristallmitte nach außen aufgrund der Kapillarkraft fließen lassen muß. Tatsächlich konnte nämlich beobachtet werden, daß eine nur unter einer Stelle des Kristalles liegende Lotfolie sich beim Aufschmelzen ganz unter den Kristall zieht.The invention is based on the knowledge that the solder from the center of the crystal must be allowed to flow outwards due to the capillary force. In fact, it could can be observed that a solder foil lying only under one point of the crystal pulls itself completely under the crystal when it melts.

Bei einem Verfahren der eingangs genannten Art wird deshalb erfindungsgemäß die Verwendung einer Lotfolie vorgeschlagen, deren Fläche kleiner als die mit dem Träger zu verlötende Fläche des Halbleiterkörpers ist.In a method of the type mentioned at the outset, therefore, according to the invention proposed the use of a solder foil whose area is smaller than that with the Carrier is to be soldered surface of the semiconductor body.

Eine nur unter einer Stelle des Kristalles liegende Lotfolie kann aber in manchen Fällen bei der Montage und beim Verlöten des Kristalles Schwierigkeiten bereiten. Deshalb wird in weiterer Ausgestaltung der Erfindung eine Lotfolie zum Auflöten eines Halbleiterkörpers auf einen Träger vorgeschlagen, welche gegen ihren Rand auslaufende Aussparungen aufweist.A solder foil lying only under one point of the crystal can but in some cases difficulties in assembling and soldering the crystal prepare. Therefore, in a further embodiment of the invention, a solder foil for Solder on proposed a semiconductor body on a carrier, which has recesses tapering towards its edge.

In der Zeichnung ist als bevorzugtes Ausführungsbeispiel einefür rechteckige Haibleiterkristalle geeignete Lotfolie 1 zusammen mit einem solchen Halbleiterkristall 2 und einem Uräger 3 dargestellt. Die Lotfolie 1 bildet ein-die gegenüberliegenden Ecken des Kristalles 2 verbindendes diagonales Kreuz. Das Kreuz wird aus einer Lotfolie geeigneter Dicke, weiche sich aus der gewünschten Lotschichtdicke des fertig verlöteten Halble iterbauelements leicht errechnen läßt, herausgestanzt. Bei einem Halbleiterkristall mit 6 mm Länge und 6 mm Breite sollen die beiden Balken la und lb, welche das Kreuz bilden, etwa 1 mm breit sein. Der Kristall liegt dann fest und eben, hat aber die Lötbedingungen eines nur 1 mm breiten Kristalles.In the drawing, the preferred embodiment is one for rectangular Semiconductor crystals suitable solder foil 1 together with such a semiconductor crystal 2 and a Uräger 3 shown. The solder foil 1 forms the opposite one Crystal 2 corners connecting diagonal cross. The cross is made from a sheet of solder suitable thickness, soft from the desired solder layer thickness of the finished soldered Semiconductor component can be easily calculated, punched out. With a semiconductor crystal the two bars la and lb that make up the cross should be 6 mm long and 6 mm wide form, be about 1 mm wide. The crystal is then firm and level, but has it Soldering conditions for a crystal only 1 mm wide.

Vergleichende Versuche durch chemisches Auslösen der fertig verlöteten Halbleiterbauelemente zeigten, daß mit den erfindungsgemäßen Lotkreuzen auch dann völlig lunkerfreie Verlötungen erzielt werden konnten, wenn die Lotkreuze absichtlich durch mehrtätiges Lagern in Wasser viel stärker oxidiert waren als es in einer Fertigung äe der Fall oder zulässig ist. Ohne die Kreuzform ließen sich nur annähernd so gute Verlötungen mit frischgeätzten Folien unter sorgSältigxkontrollierten Bedingungen erzielen.Comparative tests by chemical release of the soldered ones Semiconductor components showed that even then with the solder crosses according to the invention completely void-free soldering could be achieved if the solder crosses on purpose were oxidized to a much greater extent by storage in water for several days than in a production facility äe is the case or permissible. Without the cruciform shape, things could only come close to this good Soldering with freshly etched foils under carefully controlled conditions achieve.

Anstelle der Balkenkreuze können auch andere, regelmäßig oder unregelmäßig geformte Sterne verwendet werden.Instead of the bar crosses, other regular or irregular crosses can also be used Shaped stars can be used.

Claims (5)

Ansprüche Expectations Verfahren zum Auflöten eines Halbleiterkörpers auf einen Träger mittels einer zwischen den Träger und den Halbleiterkörper gelegten Lotfolie, gekennzeichnet durch die Verwendung einer Lotfolie, deren Fläche kleiner als die mit dem Träger zu verlötende Fläche des Halbleiterkörpers ist.Method for soldering a semiconductor body onto a carrier by means of a solder foil placed between the carrier and the semiconductor body, characterized by using a solder foil, the area of which is smaller than that with the carrier is to be soldered surface of the semiconductor body. 2. Lotfolie zum Auflöten eines Halbleiterkörpers auf einen Träger, dadurch gekennzeichnet, daß sie gegen ihren Rand auslaufende Aussparungen aufweist. 2. Solder foil for soldering a semiconductor body onto a carrier, characterized in that it has recesses tapering towards its edge. 3. Lotfolie nach Anspruch 2, dadurch gekennzeichnet, daß sie sternförmig ausgebildet ist. 3. solder foil according to claim 2, characterized in that it is star-shaped is trained. 4. Lotfolie nach Anspruch 3 für einen Halblei.terkörper, dessen mit dem Träger zu verlötende Fläche rechteckig ist, dadurch gekennzeichnet, daß die Lotfolie ein in die gegenüberliegenden Ecken dieser Fläche weisendes, diagonales Kreuz bildet. 4. Solder foil according to claim 3 for a semicon.terbody, whose with the surface to be soldered to the carrier is rectangular, characterized in that the Solder foil a diagonal pointing into the opposite corners of this surface Cross forms. 5. Verwendung einer Lotfolie nach mindestens einem der Ansprüche 2 bis 4 zum Auflöten eines Halbleiterkörpers auf einen Träger. 5. Use of a solder foil according to at least one of the claims 2 to 4 for soldering a semiconductor body onto a carrier.
DE19702032939 1970-07-03 1970-07-03 Method for soldering a semiconductor body onto a carrier Ceased DE2032939B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19702032939 DE2032939B2 (en) 1970-07-03 1970-07-03 Method for soldering a semiconductor body onto a carrier
JP10441470A JPS5032197B1 (en) 1970-07-03 1970-11-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702032939 DE2032939B2 (en) 1970-07-03 1970-07-03 Method for soldering a semiconductor body onto a carrier

Publications (2)

Publication Number Publication Date
DE2032939A1 true DE2032939A1 (en) 1972-01-13
DE2032939B2 DE2032939B2 (en) 1975-05-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE19702032939 Ceased DE2032939B2 (en) 1970-07-03 1970-07-03 Method for soldering a semiconductor body onto a carrier

Country Status (2)

Country Link
JP (1) JPS5032197B1 (en)
DE (1) DE2032939B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4117969A (en) * 1975-10-22 1978-10-03 Japan Storage Battery Company Limited Method for interconnecting adjacent electric storage batteries
DE3442537A1 (en) * 1984-11-22 1986-05-22 BBC Aktiengesellschaft Brown, Boveri & Cie., Baden, Aargau METHOD FOR BUBBLE-FREE CONNECTING A LARGE SEMICONDUCTOR COMPONENT TO A SUBSTRATE COMPONENT BY SOLDERING
US4709849A (en) * 1985-11-27 1987-12-01 Fry Metals, Inc. Solder preform and methods employing the same
EP0264122A2 (en) * 1986-10-17 1988-04-20 Hitachi, Ltd. Method of producing a composite structure for a semiconductor device
US4851966A (en) * 1986-11-10 1989-07-25 Motorola, Inc. Method and apparatus of printed circuit board assembly with optimal placement of components
EP0593986A1 (en) * 1992-10-23 1994-04-27 TEMIC TELEFUNKEN microelectronic GmbH Process of soldering a semiconductor body to a supportelement
GB2372005A (en) * 2001-02-03 2002-08-14 Marconi Caswell Ltd A method of soldering and a preform therefor
DE102005003812A1 (en) * 2005-01-27 2006-10-05 Abb Technology Ag Method for producing a contact piece, and contact piece for a vacuum interrupter itself
US8678271B2 (en) 2007-06-26 2014-03-25 Globalfoundries Inc. Method for preventing void formation in a solder joint

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3226554A1 (en) * 1982-07-16 1984-01-19 Robert Bosch Gmbh, 7000 Stuttgart Process for soldering a solderable chip to a support
DE4220875A1 (en) * 1992-06-25 1994-01-13 Eupec Gmbh & Co Kg Connecting semiconductor body to contact plates - placing spaced strips of solder foil between contact plate and semiconductor body, and heating parts to melt solder
JP3136390B2 (en) * 1994-12-16 2001-02-19 株式会社日立製作所 Solder joining method and power semiconductor device

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4117969A (en) * 1975-10-22 1978-10-03 Japan Storage Battery Company Limited Method for interconnecting adjacent electric storage batteries
DE3442537A1 (en) * 1984-11-22 1986-05-22 BBC Aktiengesellschaft Brown, Boveri & Cie., Baden, Aargau METHOD FOR BUBBLE-FREE CONNECTING A LARGE SEMICONDUCTOR COMPONENT TO A SUBSTRATE COMPONENT BY SOLDERING
US4709849A (en) * 1985-11-27 1987-12-01 Fry Metals, Inc. Solder preform and methods employing the same
EP0264122A2 (en) * 1986-10-17 1988-04-20 Hitachi, Ltd. Method of producing a composite structure for a semiconductor device
EP0264122A3 (en) * 1986-10-17 1989-06-07 Hitachi, Ltd. Method of producing a composite structure for a semiconductor device
US4851966A (en) * 1986-11-10 1989-07-25 Motorola, Inc. Method and apparatus of printed circuit board assembly with optimal placement of components
EP0593986A1 (en) * 1992-10-23 1994-04-27 TEMIC TELEFUNKEN microelectronic GmbH Process of soldering a semiconductor body to a supportelement
GB2372005A (en) * 2001-02-03 2002-08-14 Marconi Caswell Ltd A method of soldering and a preform therefor
WO2002062520A1 (en) * 2001-02-03 2002-08-15 Bookham Technology Plc A method of soldering and a preform therefor
DE102005003812A1 (en) * 2005-01-27 2006-10-05 Abb Technology Ag Method for producing a contact piece, and contact piece for a vacuum interrupter itself
US8302303B2 (en) 2005-01-27 2012-11-06 Abb Technology Ag Process for producing a contact piece
US8869393B2 (en) 2005-01-27 2014-10-28 Abb Technology Ag Contact piece for a vacuum interrupter chamber
US8678271B2 (en) 2007-06-26 2014-03-25 Globalfoundries Inc. Method for preventing void formation in a solder joint
DE112008001684B4 (en) 2007-06-26 2022-02-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method of preventing void formation in a solder joint

Also Published As

Publication number Publication date
DE2032939B2 (en) 1975-05-07
JPS5032197B1 (en) 1975-10-18

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