DE3226554A1 - Process for soldering a solderable chip to a support - Google Patents
Process for soldering a solderable chip to a supportInfo
- Publication number
- DE3226554A1 DE3226554A1 DE19823226554 DE3226554A DE3226554A1 DE 3226554 A1 DE3226554 A1 DE 3226554A1 DE 19823226554 DE19823226554 DE 19823226554 DE 3226554 A DE3226554 A DE 3226554A DE 3226554 A1 DE3226554 A1 DE 3226554A1
- Authority
- DE
- Germany
- Prior art keywords
- solder
- plate
- carrier
- foils
- soldering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01076—Osmium [Os]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Abstract
Description
Verfahren zur Verlötung eines lötfähigenMethod for soldering a solderable
Plättchens mit einem Träger Stand der Technik Die Erfindung geht aus von einem Verfahren nach der Gattung des Hauptanspruchs.Plate with a carrier prior art The invention is based of a method according to the preamble of the main claim.
Aus der DE-OS 29 39 666 ist bereits ein Verfahren dieser Art bekannt, bei dem das lötfähige Plättchen rechteckförmig ausgebildet ist und das auf den Träger aufgebrachte Lot eine einzige zusammenhängende Lotfolie bildet. Dabei wird gemäß einer ersten Ausführungsform eine rahmenförmige Lotfolie verwendet und so zwischen den Träger und das Plättchen gelegt, daß die Ecken des Plättchens auf der rahmenförmigen Lotfolie aufliegen. Beim Aufschmelzen wird dabei das Lot von den Auflagepunkten durch Kapillarkraft zur Plättchenmitte gezogen, wo es zur Bildung eines Zentrallunkers kommen kann. Gemäß einer zweiten Ausführungsform des Vorschlages nach der DE-OS 29 39 666 wird eine beliebig gestaltete Lot folie mit einem großflächigen Reservoirbereich und zwei Ärmchen verwendet, wobei sich der großflächige Reservoirbereich außerhalb des Plättchens befindet und die beiden Ärmchen unter zwei einander benachbarte Ecken des Plättchens greifen, so daß das Plättchen vor dem Lötvorgang schräg auf den Ärmchen der Lot folie aufliegt. In diesem Fall muß die Kapillarkraft, mit der das Lot unter das Plättchen gezogen wird, hinreichend groß sein, um das schräg liegende Plättchen an der flach auf dem Träger aufliegenden Seite anzuheben, damit auch hier eine ausreichende Versorgung mit dem Lot erfolgen kann.From DE-OS 29 39 666 a method of this type is already known, in which the solderable plate is rectangular and that on the carrier Applied solder forms a single cohesive solder foil. In doing so, according to a first embodiment uses a frame-shaped solder foil and so between the carrier and the plate placed that the corners of the plate on the frame-shaped Lay the solder foil on. When it melts, the solder is removed from the support points Drawn by capillary force to the center of the platelet, where a central cavity forms can come. According to a second embodiment of the proposal according to DE-OS 29 39 666 is an arbitrarily designed solder foil with a large reservoir area and two arms used, being each other the large reservoir area outside the tile and the two arms under two adjacent ones Grab corners of the plate so that the plate is at an angle before the soldering process the arms of the solder foil rests on it. In this case, the capillary force with which the plumb line is drawn under the plate, be large enough to cover the inclined To lift the plate on the side lying flat on the carrier, so here too a sufficient supply of the solder can take place.
Vorteile der Erfindung Das erfindungsgemäße Verfahren mit den kennzeichnenden Merkmalen des Hauptanspruchs hat gegenüber der ersten oben beschriebenen Ausführungsform des bekannten Verfahrens den Vorteil, daM durch Überhollötung bedingte Zentrallunker nicht auftreten können. Durch das zweiseitige Lotangebot begegnen sich die beiden aufeinander zufließenden Lotfronten offensichtlich in der Plättchenmitte, und erst danach setzt eine laterale Ausbreitung senkrecht zur ursprünglichen Bewegungsrichtung ein. Auf diese Weise wird auch eine Schräglage des Plättchens nach der Verlötung, wie sie bei der zweiten Ausführungsform des bekannten Verfahrens vorkommen kann, vermieden.Advantages of the invention The method according to the invention with the characterizing Features of the main claim has compared to the first embodiment described above the advantage of the known process that central cavities caused by over-soldering cannot occur. The two-sided lot offer the two meet solder fronts converging towards each other obviously in the middle of the plate, and only thereafter, a lateral expansion continues perpendicular to the original direction of movement a. In this way, an inclined position of the plate after soldering, as it can occur in the second embodiment of the known method, avoided.
Zeichnung Anhand der Zeichnung wird die Erfindung näher erläutert.Drawing The invention is explained in more detail with the aid of the drawing.
Die einzige Figur zeigt die Auflage eines quadratischen Halbleiterplättchens auf zwei Lotfolien.The only figure shows the support of a square semiconductor wafer on two solder foils.
Beschreibung des Ausführungsbeispiels Das Halbleiterplättchen 1 wird auf die beiden Lotfolien 2 gelegt, die zuvor auf einen in der Zeichnung nicht dargestellten Träger aufgelegt worden sind. Der Träger kann dabei aus einer metallischen Unterlage oder aus einer isolierenden Keramikunterlage bestehen, auf die eine lötfähig Metallisierungsschicht an der Oberfläche aufgebracht worden ist. Die beiden Lotfolien 2 haben eine runde Form und sind mindestens annähernd gleich groß, d. h. sie haben etwa den gleichen Durchmesser und die dieselbe Dicke.Description of the Embodiment The semiconductor die 1 is placed on the two solder foils 2, previously on a not shown in the drawing Carriers have been placed. The carrier can consist of a metallic base or consist of an insulating ceramic base on which a solderable metallization layer has been applied to the surface. The two solder foils 2 are round Shape and are at least approximately the same size, i. H. they have about the same Diameter and the same thickness.
Im Prinzip ist jede andere Form ebenfalls möglich. Die beiden Lotfolien 2 sind an zwei einander gegenüberliegenden Plättchenecken so angeordnet, daß nur ein Teil dieser Lotfläche unter dem Plättchen 1 liegt. Die Fügung von Halbleiterplättchen 1 und Lot folien 2 kann zweckmäßigerweise mit Hilfe einer Montageschablone 3 erfolgen, welche mit den entsprechenden Aussparungen versehen wurde.In principle, any other shape is also possible. The two solder foils 2 are arranged on two opposite plate corners so that only part of this soldering surface lies under the plate 1. The joining of semiconductor wafers 1 and solder foils 2 can expediently be done with the help of a mounting template 3, which was provided with the corresponding recesses.
Bei der Lötofenfahrt wird das aufschmelzende Lot durch Kapillarkraft unter die Plättchenfläche gezogen.When the soldering furnace is used, the solder is melted by capillary force pulled under the platelet face.
Der besondere Vorteil dieser Lötanordnung besteht darin, daß das Plättchen 1 beim Aufschmelzen des Lotes immer eben liegt. Durch Überhollötung bedingte Zentrallunker werden bei dieser Anordnung nicht beobachtet. Die beiden aufeinander zufließenden Lotfronten begegnen sich offensichtlich in der Plättchenmitte, und erst danach setzt eine laterale Ausbreitung der Lotfront senkrecht zur ursprünglichen Bewegungsrichtung ein.The particular advantage of this soldering arrangement is that the plate 1 is always flat when the solder is melted. Central cavities caused by over-soldering are not observed with this arrangement. The two converging Solder fronts obviously meet in the middle of the plate and only then sets a lateral expansion of the solder front perpendicular to the original direction of movement a.
Verunreinigungen in den Stanzkanten der Lotfolien 2 können sich insbesondere dann nicht lunkerbildend auswirken, wenn ein nur kleines Flächenstück der Lotfolie 2 unter dem Plättchen 1 liegt. In diesem Fall ist also die Randlänge des unter das Plättchen 1 ragenden Teiles der Lotfolie 2 gering, und somit sinken die unter das Plättchen 1 gebrachten Verunreinigungen. Zum anderen führt eine kleine Randlänge, durch die das Lot unter das Plättchen gelangen kann, zu einem hohen Lotfluß. Dieser hohe Lotfluß sorgt dafür, daß eventuell vorhandene Verunreinigungen auf diesem Randstück der Lotfolie 2 keinen Lunker bilden können. Diese Verunreinigungen werden offenbar fortgespült, verteilen sich auf der gesamten Plättchenoberfläche und stören die Benetzung nicht.Impurities in the punched edges of the solder foils 2 can in particular then do not have a void-forming effect if only a small area of the solder foil 2 is under tile 1. So in this case is the edge length of under the plate 1 protruding part of the solder foil 2 low, and thus decrease impurities brought under the plate 1. On the other hand, a small one leads Edge length through which the solder can get under the plate, leads to a high solder flow. This high solder flow ensures that any impurities that may be present on this Edge piece of the solder foil 2 can not form any voids. These impurities will be evidently washed away, spread over the entire surface of the platelets and interfere the wetting does not.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19823226554 DE3226554A1 (en) | 1982-07-16 | 1982-07-16 | Process for soldering a solderable chip to a support |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19823226554 DE3226554A1 (en) | 1982-07-16 | 1982-07-16 | Process for soldering a solderable chip to a support |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3226554A1 true DE3226554A1 (en) | 1984-01-19 |
Family
ID=6168534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19823226554 Ceased DE3226554A1 (en) | 1982-07-16 | 1982-07-16 | Process for soldering a solderable chip to a support |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3226554A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4709849A (en) * | 1985-11-27 | 1987-12-01 | Fry Metals, Inc. | Solder preform and methods employing the same |
DE4220875A1 (en) * | 1992-06-25 | 1994-01-13 | Eupec Gmbh & Co Kg | Connecting semiconductor body to contact plates - placing spaced strips of solder foil between contact plate and semiconductor body, and heating parts to melt solder |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2032939B2 (en) * | 1970-07-03 | 1975-05-07 | Robert Bosch Gmbh, 7000 Stuttgart | Method for soldering a semiconductor body onto a carrier |
DE2939666A1 (en) * | 1979-09-29 | 1981-04-09 | Robert Bosch Gmbh, 7000 Stuttgart | Soldering wafers or chips onto carriers - esp. where metallised semiconductor chip is bonded to heat sink via solder foil |
-
1982
- 1982-07-16 DE DE19823226554 patent/DE3226554A1/en not_active Ceased
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2032939B2 (en) * | 1970-07-03 | 1975-05-07 | Robert Bosch Gmbh, 7000 Stuttgart | Method for soldering a semiconductor body onto a carrier |
DE2939666A1 (en) * | 1979-09-29 | 1981-04-09 | Robert Bosch Gmbh, 7000 Stuttgart | Soldering wafers or chips onto carriers - esp. where metallised semiconductor chip is bonded to heat sink via solder foil |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4709849A (en) * | 1985-11-27 | 1987-12-01 | Fry Metals, Inc. | Solder preform and methods employing the same |
DE4220875A1 (en) * | 1992-06-25 | 1994-01-13 | Eupec Gmbh & Co Kg | Connecting semiconductor body to contact plates - placing spaced strips of solder foil between contact plate and semiconductor body, and heating parts to melt solder |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8120 | Willingness to grant licences paragraph 23 | ||
8110 | Request for examination paragraph 44 | ||
8131 | Rejection |