DE19916177B4 - Method for contacting the semiconductor chip and semiconductor chip with wire-shaped connecting pieces - Google Patents
Method for contacting the semiconductor chip and semiconductor chip with wire-shaped connecting pieces Download PDFInfo
- Publication number
- DE19916177B4 DE19916177B4 DE1999116177 DE19916177A DE19916177B4 DE 19916177 B4 DE19916177 B4 DE 19916177B4 DE 1999116177 DE1999116177 DE 1999116177 DE 19916177 A DE19916177 A DE 19916177A DE 19916177 B4 DE19916177 B4 DE 19916177B4
- Authority
- DE
- Germany
- Prior art keywords
- chip
- semiconductor chip
- wire
- contacting
- over
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000000034 method Methods 0.000 title claims abstract description 18
- 238000009413 insulation Methods 0.000 claims description 8
- 238000004382 potting Methods 0.000 claims description 2
- 238000002604 ultrasonography Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 1
- 229910000510 noble metal Inorganic materials 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 238000005266 casting Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000011253 protective coating Substances 0.000 description 1
- 108090000623 proteins and genes Proteins 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
- H01L21/4896—Mechanical treatment, e.g. cutting, bending
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
Verfahren zum Kontaktieren nahezu waagerecht zur Oberfläche (5) eines Halbleiterchips (4) verlaufender drahtförmiger Anschlußstücke (1) mit Kontaktflächen (7) des Halbleiterchips (4), wobei die Anschlußstücke (1) vor dem Kontaktieren in einem Isolier-Deformationsbereich (2) durch mechanisches Verformen so deformiert werden, dass sich nach dem Kontaktieren des Kontaktstückes (3) auf der Kontaktfläche (7) zwischen dem Isolierdeformationsbereich (2) des drahtförmigen Anschlußstückes (1) und der Oberfläche (5) des Halbleiterchips (4) ein beabstandeter Bereich von der Kontaktierzone (8) bis über die Chipkante (6) des Halbleiterchips (4) erstreckt, dadurch gekennzeichnet, dass das drahtförmige Anschlußstück (1) zum Kontaktieren über die Oberfläche (5) des gesamten Chip (4) gespannt wird und über jeder überspannten Chipkante (6) einen Isolier-Deformationsbereich (2) aufweist.method for contacting almost horizontally to the surface (5) of a semiconductor chip (4) extending wire-shaped Connecting pieces (1) with contact surfaces (7) of the semiconductor chip (4), wherein the connecting pieces (1) before contacting in an insulating deformation region (2) by mechanical deformation be deformed so that after contacting the contact piece (3) on the contact surface (7) between the Isolierdeformationsbereich (2) of the wire-shaped connecting piece (1) and the surface (5) of the semiconductor chip (4) a spaced area from the contacting zone (8) to about the chip edge (6) of the semiconductor chip (4) extends, characterized that the wire-shaped Connecting piece (1) for Contact via the surface (5) of the entire chip (4) is stretched and over each spanned chip edge (6) one Insulating deformation region (2).
Description
Die Erfindung betrifft ein Halbleiterchip mit drahtförmigen Anschlußstücken, die nahezu waagerecht zur Oberfläche eines Halbleiterchips verlaufen und mit Kontaktflächen des Halbleiterchips elektrisch leitend verbunden sind und ein Verfahren zum Kontaktieren derartiger Chips.The The invention relates to a semiconductor chip with wire-shaped connecting pieces, the almost horizontal to the surface of a semiconductor chip and with contact surfaces of the Semiconductor chips are electrically connected and a method for contacting such chips.
Die Erfindung findet vorzugsweise Anwendung bei der Herstellung extrem dünner kontaktloser Transponder wie Chipkarten, Etiketten, Transportgutkennzeichen oder -kennzeichner und dergleichen.The Invention preferably finds application in the production extremely thinner contactless transponders such as chip cards, labels, transport license plates or identifiers and the like.
Sie ist (ebenfalls) geeignet zur Herstellung von Anschlußpins für den Chip zur weiteren einfachen Kontaktierung mit weiteren Schaltungsteilen, z.B. einer Antenne und zur direkten Kontaktierung von Antennen, beispielsweise zur Kontaktierung von Drahtantennen an dem Chip, wobei die Antenne die Form einer Spule oder eines Dipols aufweisen kann.she is (also) suitable for making terminal pins for the chip for further easy contacting with other circuit parts, e.g. an antenna and for direct contacting of antennas, for example for contacting wire antennas on the chip, wherein the antenna may have the form of a coil or a dipole.
Im Stand der Technik ist es nach der sogenannten beam-lead-Technik bekannt, bereits auf einem Halbleiterwafer flache Anschlußstücke zu erzeugen, die über die Fläche des künftigen Halbleiterchips hinausragen.in the The state of the art is according to the so-called beam-lead technique known to produce flat connectors already on a semiconductor wafer, the above the area of the future Protrude semiconductor chips.
Nachteilig sind hierbei ein hoher Halbleiterflächenverbrauch, da die jeweilige über die Chipkante stehende Anschlußlänge einen entsprechenden Abstand von Chip zu Chip auf dem Wafer erfordert, hohe Herstellungskosten und eine sehr begrenzte Anschlußlänge.adversely Here are a high semiconductor area consumption, since the respective on the Chip edge standing connection length one corresponding chip-to-chip distance on the wafer requires high Production costs and a very limited connection length.
Ferner
ist es nach
In
Als nachteilig erweisen sich hierbei die Kosten zur Herstellung eines strukturierten Metallbandes, die Einschränkungen in der Länge der Anschlußstücken sowie das erforderliche Wegbiegen des Metallbandes von der Halbleiteroberfläche zur Vermeidung von Kurzschlüssen zwischen Chipkante und Metallband.When detrimental to this prove the cost of producing a textured metal band, the limitations in the length of the Fittings as well the necessary bending away of the metal strip from the semiconductor surface to avoid of short circuits between chip edge and metal strip.
Nach
Aus
Ferner
ist aus
Der Erfindung liegt die Aufgabe zugrunde, einen Halbleiterchip und ein Verfahren der eingangs genannten Art anzugeben, bei dem die Anschlußstücke eine hohe mechanische Festigkeit aufweisen und nahezu ebenengleich von der Halbleiteroberfläche wegführen.Of the Invention is based on the object, a semiconductor chip and a Specify method of the type mentioned, in which the connecting pieces a have high mechanical strength and almost even of the semiconductor surface lead away.
Die Aufgabe wird erfindungsgemäß mit den kennzeichnenden Merkmalen der Patentansprüche 1 und 8 gelöst.The Object is according to the invention with the characterizing Features of the claims 1 and 8 solved.
Vorteilhafte Weiterbildungen sind in den Unteransprüchen angegeben.advantageous Further developments are specified in the subclaims.
Die Erfindung zeichnet sich durch eine Reihe von Vorteilen aus.The Invention is characterized by a number of advantages.
Bei dem erfindungsgemäßen Verfahren werden drahtförmige Anschlußstücken im Bereich vor der künftigen Kontaktstelle flach gepreßt und danach die Kontaktierung auf der Chipkontaktstelle, den sogenannten Pads, ausgeführt. Damit wird es möglich, einen extrem flach vom Chip wegführenden drahtförmigen Anschluß hoher Festigkeit zu erzeugen, der im Bereich der Chipkante aufgrund seines durch die Deformation erzeugten Abstandes von elektrisch leitenden Elementen einen Kurzschluß mit der Chipkante verhindert.at the method according to the invention become wiry Fittings in the Area before the future Contact point pressed flat and then the contact on the chip pad, the so-called Pads, executed. This will make it possible to get one extremely flat away from the chip wire-like Connection high To produce strength in the area of the chip edge due to its caused by the deformation distance of electrically conductive Elements with a short circuit the chip edge prevented.
Es ergibt sich eine sehr einfache und kostengünstige Herstellung der Verbindung. Vorteilhaft ist dabei, dass die Kontaktierung mittels Thermokompression erfolgen kann, wobei eine Ultraschall-Unterstützung möglich ist. Es lassen sich einfache und sichere, in der Halbleitertechnik bekannte Verfahren anwenden. Als Kontaktdraht kann vorteilhaft Kupfer verwendet werden. Das ist besonders vorteilhaft, da Kupfer sich gut deformieren läßt und gleichzeitig einen sehr guten elektrischen Leitwert bei genügend hoher Festigkeit aufweist.This results in a very simple and inexpensive production of the connection. It is advantageous that the contacting can be done by means of thermocompression, wherein an ultrasound support is possible. Simple and safe methods known in semiconductor technology can be used. As a contact wire can be used advantageously copper. This is particularly advantageous since Copper can be well deformed and at the same time has a very good electrical conductance at sufficiently high strength.
Es ist auch möglich Kontaktdrähte aus Kupfer, deren Oberfläche z.B. mit Gold oder Silber veredelt sind, zu verwenden.It is possible, too contact wires made of copper, whose surface e.g. are finished with gold or silver.
Die erfindungsgemäße Anordnung gewährleistet sichere Thermokompressionsbedingungen und günstige Weiterverarbeitungsmöglichkeiten.The inventive arrangement guaranteed safe thermocompression conditions and favorable processing options.
Zur Verbesserung der Thermokompressionsbedingungen ist es vorteilhaft, die Chipkontaktstelle mit einer chemisch abgeschiedenen Palladiumschicht oder anderen chemisch abgeschiedenen Schichten wie Kupfer/Gold usw. zu versehen.to Improving the thermocompression conditions it is advantageous the chip pad with a chemically deposited palladium layer or other chemically deposited layers such as copper / gold, etc. to provide.
Eine weitere Verbesserung der Thermokompressionsbondbedingungen kann dadurch erreicht werden, dass die Chipkontaktfläche zusätzlich zum Palladium mit einer dünnen Gold- oder Silberschicht (0,1...20 μm) versehen wird.A further improvement of the thermocompression bonding conditions can be achieved in that the chip contact surface in addition to the palladium with a thin Gold or silver layer (0.1 ... 20 microns) is provided.
Die Erfindung wird im Folgenden anhand eines Ausführungsbeispiels näher erläutert.The Invention will be explained in more detail below with reference to an embodiment.
In den zugehörigen Zeichnungen zeigen:In the associated Drawings show:
Im
erläuterten
Beispiel soll als Anschlußstück
Das
Kontaktstück
In
Durch
nachträgliches
Vergießen
des Chips
Der
in
Die
im Distanzdeformationsbereich
Eine
Anordnung, bei der dieser Anschlussdraht
- 11
- drahtförmiges Anschlußstückwire-shaped connector
- 22
- Isolier-DeformationsbereichInsulating deformation area
- 33
- Kontaktstückcontact piece
- 44
- HalbleiterchipSemiconductor chip
- 55
- Oberfläche des HalbleiterchipSurface of the Semiconductor chip
- 66
- Chipkantechip edge
- 77
- Chipkontaktfläche Chip contact surface
- 88th
- Kontaktierzonecontacting zone
- 99
- KontaktstückdeformationContact piece deformation
- 1010
- Achse des Anschlußdrahtesaxis of the connecting wire
- 1111
- Unterseite der Deformationsbereichebottom the deformation areas
- 1212
- DistanzdeformationsbereichDistance deformation area
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1999116177 DE19916177B4 (en) | 1999-04-10 | 1999-04-10 | Method for contacting the semiconductor chip and semiconductor chip with wire-shaped connecting pieces |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE1999116177 DE19916177B4 (en) | 1999-04-10 | 1999-04-10 | Method for contacting the semiconductor chip and semiconductor chip with wire-shaped connecting pieces |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19916177A1 DE19916177A1 (en) | 2000-10-26 |
DE19916177B4 true DE19916177B4 (en) | 2006-01-26 |
Family
ID=7904107
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE1999116177 Expired - Fee Related DE19916177B4 (en) | 1999-04-10 | 1999-04-10 | Method for contacting the semiconductor chip and semiconductor chip with wire-shaped connecting pieces |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE19916177B4 (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4000842A (en) * | 1975-06-02 | 1977-01-04 | National Semiconductor Corporation | Copper-to-gold thermal compression gang bonding of interconnect leads to semiconductive devices |
DE2658532A1 (en) * | 1976-12-23 | 1978-06-29 | Siemens Ag | INTERMEDIATE SUPPORT FOR HOLDING AND CONTACTING A SEMICONDUCTOR BODY |
EP0265927A2 (en) * | 1986-10-31 | 1988-05-04 | Hitachi, Ltd. | Wire stacked bonding method |
US4842662A (en) * | 1988-06-01 | 1989-06-27 | Hewlett-Packard Company | Process for bonding integrated circuit components |
US5046657A (en) * | 1988-02-09 | 1991-09-10 | National Semiconductor Corporation | Tape automated bonding of bumped tape on bumped die |
EP0849794A1 (en) * | 1996-12-20 | 1998-06-24 | Texas Instruments Incorporated | Fine pitch lead frame |
-
1999
- 1999-04-10 DE DE1999116177 patent/DE19916177B4/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4000842A (en) * | 1975-06-02 | 1977-01-04 | National Semiconductor Corporation | Copper-to-gold thermal compression gang bonding of interconnect leads to semiconductive devices |
DE2658532A1 (en) * | 1976-12-23 | 1978-06-29 | Siemens Ag | INTERMEDIATE SUPPORT FOR HOLDING AND CONTACTING A SEMICONDUCTOR BODY |
EP0265927A2 (en) * | 1986-10-31 | 1988-05-04 | Hitachi, Ltd. | Wire stacked bonding method |
US5046657A (en) * | 1988-02-09 | 1991-09-10 | National Semiconductor Corporation | Tape automated bonding of bumped tape on bumped die |
US4842662A (en) * | 1988-06-01 | 1989-06-27 | Hewlett-Packard Company | Process for bonding integrated circuit components |
EP0849794A1 (en) * | 1996-12-20 | 1998-06-24 | Texas Instruments Incorporated | Fine pitch lead frame |
Also Published As
Publication number | Publication date |
---|---|
DE19916177A1 (en) | 2000-10-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8127 | New person/name/address of the applicant |
Owner name: SOKYMAT GMBH, 99099 ERFURT, DE |
|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |