DE19758589B4 - Production of solar cells - Google Patents

Abstract

Production of solar cells comprises: (a) forming a 1st electrically conducting region on a 1st surface of a semiconductor substrate (1), in which through-holes (3) are provided and on which is formed an emitter layer (2); (b) arranging the semiconductor substrate on a transport substrate, where a 2nd surface of the semiconductor substrate lies opposite the 1st surface of the transport substrate, and over a resin material; (c) connecting the semiconductor substrate and the transport substrate using the resin material; and (d) forming a 2nd electrically conducting region on the 1st electrically conducting region. Also claimed is the solar cell produced.

Description

The present invention relates to Solar cells according to the preamble of claim 1 and a method for the production of solar cells according to the preamble of the claim 12th

The 9A to 9D as well as the 10A to 10D show the sequence of steps in the manufacture of VEST cells, which are representative of wrapped solar cells according to the prior art, and were described by M. Deguchi et al "A Novel Fabrication Technique for Low cost Thin Film Polycrystalline Silicon Solar Cells", Technical Digest , 7th International Photovoltaic Science and Engineering Conference, page 243 (1993). As is known, the wrapped solar cells have such a structure that no electrode appears on a light receiving surface of each solar cell and emitter and base electrodes are arranged on the rear surface of the respective solar cell, opposite to the light receiving surface.

The 9A to 9D are top views of the VEST cells viewed from the rear surface, whereas the 10A to 10D Represent cross-sectional views along the lines 10A-10A . 10B-10B . 10C-10C as well as 10D-10D in the 9A to 9D , Like from the 9A and 10A emerges, becomes a thin silicon substrate 1 with a thickness of not more than 100 µm, in which first and second main surfaces are provided opposite to each other, on the first main surface with a plurality of wiring through holes arranged at regular intervals 3 formed, followed by the formation of an emitter layer 2 a conductivity type which is opposite to the conductivity type of the silicon substrate 1 is using a thermal diffusion process. In the example shown, the silicon 1 a conductivity of the p-type, and accordingly the emitter layer 2 a conductivity of the n type.

Thereupon, as in the 9B and 10B shown the silicon substrate 1 on which the wiring through holes 3 and the emitter layer 2 are provided on a transparent glass plate 4 attached using a transparent binding material, for example a transparent silicone resin 5 , wherein the second major surface of the substrate to the glass plate 4 is directed. The glass plate 4 finally forms a protective coating for solar cells. The amount of transparent silicone resin 5 used to attach the silicon substrate 1 on the glass plate 4 is used must be carefully controlled to avoid the possibility that the binding material may undesirably emerge from one or more of the wiring vias 3 expires. For this purpose, the amount of transparent silicone resin 5 chosen to be the total volume of the wiring through holes 3 equivalent.

Thereupon, as from the 9C and 10C emerges an electrode 6 of the p-type and an electrode 7 of the n-type on the silicon substrate 1 or the emitter layer 2 arranged, followed by soldering electrode strips 8th to the electrode 6 and 7 of the p-type or n-type, as in the 9D and 10D shown.

The metal paste which can be used for the electrodes is limited to those materials which can be sintered at a sufficiently low temperature at which there is a possible change in the properties of the transparent resin 5 is avoided.

A solar cell from WO 89/05521 A1 known, which is made up of individual elementary solar cells, the are interconnected in parallel. Every elementary solar cell exists from a PN transition, the contact of the lower layer by means of a through hole to the surface the upper layer is. The elementary solar cells are matrix-shaped applied to a glass substrate and over that on the top layer contacts are connected in parallel. In this way, the Failure of an elementary solar cell does not equal the failure of the entire solar cell, so the reliability of the so formed Solar cell increased can be.

Out US 5 100 480 A a solar cell is known which has a through hole in the insulating carrier substrate both for the n-layer and for the p-layer. In order to be able to connect various elementary solar cells on a wafer simply and reliably, a conductive connection is applied between the holes on the back of the carrier substrate, which connects the electrodes protruding from the holes to one another.

Out JP 7-226528 A A method for producing a solar cell is known in which both contacts are on the side of the solar cell facing away from the light. The through holes in the semiconductor substrate are made in that the semiconductor substrate is applied to a temperature-resistant carrier. After the holes have been made in the semiconductor substrate, the temperature-resistant carrier is separated from the semiconductor substrate and subjected to a diffusion process, so that an emitter layer forms around the semiconductor substrate. In a further step, the middle layer on the side of the semiconductor substrate surrounded by the emitter layer and away from the light is then etched off again in order to expose the semiconductor substrate for the base electrode. The electrodes are then applied to the side of the semiconductor substrate which faces away from the light, the base electrode being applied to the semiconductor substrate and the emitter electrode being applied to the emitter layer. Due to the laid electrode fingers The through holes are closed at the same time by the emitter electrode. In a last step, a transparent binder resin can then be applied to the light-facing side of the semiconductor substrate in order to connect the semiconductor substrate to a glass substrate.

From the JP 4-223378 A a solar cell is known, which differs from the solar cell described above JP 7-226528 A essentially differs in that the through holes are delta-shaped and after application of the electrodes are completely filled with the electrode material.

A problem of the beginning The procedure is that the Metal paste to form the electrodes after solidification of the transparent binder resin is applied. So that the binder resin not its translucent Loses property, may however, the electrodes do not have a temperature of 300 ° C be sintered. However, this requires sintered materials with a relatively high resistivity compared to high temperature sintered materials.

In addition, there is a according to the above JP 7-226 528 A Process described in that the through holes on the side facing away from the light are each closed by the emitter electrodes. This does indeed mean that when the transparent binding resin is applied on the side facing the light, the binding resin cannot pass through the through holes on the side facing away from the light. On the other hand, when the transparent binder resin is applied, the emitter electrode applied can be loosened again, which impairs the reliability of the production process.

The object of the invention is therefore starting from a process of the type specified at the outset with a higher one Efficiency and a higher reliability to produce.

This object is achieved by the features of claim 1 and claim 2 solved. The solution according to the invention is characterized in that the electrode, which is formed on the regions of the semiconductor substrate coated with the emitter layer, surrounds each through hole.

The advantages achieved with the invention consist in particular in that the emitter electrode is reliable the light-facing side of the semiconductor substrate are applied can that the electrodes are applied using a high temperature sintering process can be and that for the electrodes high temperature sintered materials with a substantial lower specific resistance can be used. Herewith can both the efficiency and the reliability of the solar cell can be increased.

In practicing the present invention can after the formation of the first electrically conductive area on the first surface of the semiconductor substrate, and before the arrangement of the semiconductor substrate on the transparent substrate, a fluorine-containing coating the first surface of the semiconductor substrate are formed. In this case the fluorine-containing coating thus produced is removed after the semiconductor substrate and the transparent substrate with each other were connected, and electrically before the formation of the second conductive Area on the first electrically conductive area.

The fluorine-containing coating can be a fluorine homopolymer.

The arrangement of the semiconductor substrate, which is typically either crystalline silicon or polycrystalline Silicon exists on the transparent substrate, which is typically a reinforced glass plate for solar cells is carried out by that this transparent resin, for example typically a silicone resin, only on such areas of either the semiconductor substrate or the transparent substrate is applied with corresponding Areas of the other part, that is, the semiconductor substrate or the transparent substrate to be connected so that the semiconductor substrate can be placed on the transparent substrate so that the transparent Resin is provided in between.

The connection of the semiconductor substrate and the transparent substrate should be done carefully for the possibility to prevent that transparent resin emerges from the through holes, and over the first electrically conductive Area spreads.

The present invention provides according to one other target solar cells are still available have a transparent substrate, one over a transparent resin semiconductor substrate connected to the transparent substrate, in what through holes are provided, and on which an emitter layer is provided is a first electrically conductive region sintered at high temperature, which is formed on the semiconductor substrate, and a second electrically conductive Area that is provided on the first electrically conductive area. The first electrically conductive Area is designed so that it surrounds each through hole provided in the semiconductor substrate is.

The invention is illustrated below illustrated exemplary embodiments explained in more detail what other advantages arise; same parts are here designated by the same reference numerals. It shows.

1A to 1D schematic bottom views showing the sequence of steps of manufacturing solar cells according to an example to which the present invention can be applied;

2A to 2D schematic cross-sectional views along the line 2A-2A, 2B-2B, 2C-2C and 2D-2D in the 1A to 1D ;

3A to 3D schematic views from below with a representation of the sequence of steps of the production of solar cells according to a first preferred embodiment of the present invention;

4A to 4D schematic cross-sectional views along the line 4A-4A, 4B-4B, 4C-4C and 4D-4D in the 3A to 3D ;

5A to 5D schematic views from below with an illustration of the sequence of steps of the production of solar cells according to a second preferred embodiment of the present invention;

6A to 6D schematic cross-sectional views along the line 6A-6A, 6B-6B, 6C-6C and 6D-6D in the 5A to 5D ;

7A to 7D schematic views from below with an illustration of the sequence of steps of the production of solar cells according to a third preferred embodiment of the present invention;

8A to 8C schematic cross-sectional views along the line 8A-8A, 8B-8B and 8C-8C in the 7A . 7B and 7C ;

9A to 9D schematic views from below. with a representation of the sequence of steps of the production of solar cells according to the prior art; and

10A to 10D schematic cross-sectional views along the line 10A-10A, 10B-10B, 10C-10C and 10D-10D in the 9A to 9D ,

APPLICATION EXAMPLE OF THE INVENTION: 1A to 2D

In the 1A and 2A is an essentially rectangular, thin-walled silicon substrate 1 shown, which consists of either crystalline silicon or polycrystalline silicon and has a first and a second main surface, which are arranged opposite to each other. With this silicon substrate 1 are a plurality of wiring through holes arranged at regular intervals 3 provided such that they run completely over the entire thickness of the substrate, and furthermore there is an emitter layer in the substrate 2 provided on its first main surface. In the example shown, the thickness of the silicon substrate 1 not larger than 100 μm, and the conductivity is of the p type. The emitter layer 2 has a conductivity that is of the opposite type to that of the silicon substrate 1 , ie a conductivity of the n-type, and is formed by placing phosphorus under the action of heat in the first main surface of the silicon substrate 1 diffuses in. However, it should be noted that the respective conductivity of the silicon substrate 1 or the emitter layer 2 opposite as can be in the case described above.

Then, as in the 1B and 2 B shown a base electrode (p-type electrode) 6 and an emitter electrode (type n electrode) 7 on the silicon substrate 1 formed to be the first major surface of the silicon substrate 1 or the emitter layer 2 overlap. The formation of the base and emitter electrodes 6 and 7 can be performed by a screen printing method to form a predetermined or required pattern. For example, an Al or AgAl paste and an Ag paste to form the base electrode 6 or the emitter electrode 7 can be used, and after application to the silicon substrate 1 are sintered in dry air at a temperature of 700 ° C for a few minutes to thereby remove the base and emitter electrodes 6 respectively. 7 finish. It has been found here that the electrodes have a suitable ohmic resistance and a relatively low specific resistance.

Examples of the AlAg paste for the p-type electrode include the following:
Ag frit (1 - 10 μm ∅): 70 - 78% by weight
Al frit (4 - 8 μm ∅): less than or equal to 2% by weight
Glass frit (1 - 5 μm ∅): 1 - 10% by weight
Cellulose resin: 1 - 5% by weight
Carbinol resin: 1 - 5% by weight

Examples of the Ag paste for the n-type electrode include the following:
Ag frit (1 - 10 μm ∅): 70 - 80% by weight
Glass frit (1 - 5 μm ∅): 1 - 10% by weight
Cellulose resin: 1 - 5% by weight
Carbinol resin: 1 - 5% by weight

Like from the 1C and 2C emerges, the silicon substrate 1 with the electrodes formed on it 6 and 7 with a transparent cover glass plate 4 connected with the second major surface of the substrate in contact with the transparent cover glass plate 4 is held. To the silicon substrate 1 on the transparent cover glass plate 4 to attach, is a transparent resin 5 such as silicone resin on the transparent cover glass plate 4 attached before the silicon substrate 1 in contact with the transparent cover glass plate 4 brought. After the attachment, the arrangement is vented and then sintered for a few minutes at a temperature of, for example, 150 ° C. in order to create the transpa pension resin 5 cure.

Finally, as in the 1D and 2D shown electrode strips 8th to the base or emitter electrode 6 respectively. 7 soldered to complete the fastening of the VEST cells to the cover glass plate.

Table 1 below gives one Comparison of electrical properties, which are different Materials for the electrodes made of Ag paste show that at different sintering temperatures can be sintered.

TABLE 1

From Table 1 above it becomes clear that the Use of the paste material sintered at high temperature is effective in terms of a substantial reduction in the specific To achieve resistance of the electrodes.

In the example described above, the electrodes can be formed 6 and 7 on the silicon substrate 1 during the in the 1B and 2 B Process step shown to use a paste material sintered at high temperature for this purpose, and therefore both the contact resistance and the specific resistance of the electrodes can be significantly reduced, which leads to a reduction in the series resistance of the resulting solar cells.

When such paste electrodes are used, each of the electrodes has a thickness in the range of 10 to 20 µm after sintering, and therefore the allowable amount of transparent resin 5 that during the in the 1C and 2C Process step shown for fastening the semiconductor substrate 1 on the transparent cover glass plate 4 used can be increased to such a value that the applied transparent resin after leakage from the wiring through holes 3 now spreads across the metal paste electrodes.

In contrast to the prior art, in which extremely precise control of the thickness of the applied paste is required, the amount of transparent resin applied can 5 in carrying out the method according to the present invention be chosen so that the transparent resin 5 which comes out of the wiring through holes 3 essentially does not result in the areas of the silicon substrate 1 reached in which the electrode strips 8th can be formed later, and therefore the application thickness of the transparent resin 5 can be increased in an advantageous manner. More specifically, the present invention makes it possible to increase the application thickness of the transparent resin to a value 1.5 times that used in the prior art method. If the light receiving surface of the silicon substrate 1 is flat, or when the light receiving surface of the silicon substrate 1 is provided with a light trapping surface structure, so there is an optimal thickness of the transparent resin 5 within the range of 1 to 2 μm or within the range of 3 to 5 μm. The application of the transparent resin 5 can be carried out by a centrifugal or roller coater, and in this way the resin thickness can be controlled well enough.

FIRST EMBODIMENT 3A to 4D

In the 3A and 4A becomes the silicon substrate 1 either crystalline silicon or polycrystalline silicon, which has regularly spaced wiring through holes 3 and the emitter layer 2 has, as well as in the embodiment described above. Thereupon, as in the 1B and 2 B shown the base electrode 6 on the first major surface of the silicon substrate 1 educated. However, in the second embodiment of the present invention, the emitter layer 2 with a pattern such that they cover the wiring through holes 3 surrounds. In the illustrated embodiment, the silicon substrate 1 a thickness of not more than 100 μm, and a conductivity of the p-type. The emitter layer 2 has the opposite conductivity compared to that of the silicon substrate 1 , ie conductivity of the n-type, and is produced in that a thermal diffusion of phosphorus into the first main surface of the silicon substrate 1 he follows. However, the respective conductivity types of the silicon substrate 1 and the emitter layer 2 also opposite to the conductivity types described above can be selected.

As in the 3B and 4B is shown, then becomes the base electrode 6 on the first major surface of the silicon substrate 1 is formed, and becomes the emitter electrode accordingly 7 on the emitter layer 2 formed in such a pattern that the wiring through holes 3 be surrounded by her.

After the electrodes are formed 6 and 7 becomes the silicon substrate 1 with the transparent cover glass plate 4 connected so that its second main surface is in contact with the transparent cover glass plate 4 is held as in the 3C and 4C is shown, followed by soldering the electrode strips 7 and 8th according to 3D and 4D ,

In the method according to the first embodiment of the present invention, the emitter electrode 7 patterned such that they cover the wiring through holes 3 surrounds, as in the 3B and 4B is shown, and therefore a lot of transparent resin 5 are applied, which is the sum of the respective volumes of the sections of the emitter electrode 7 corresponds to that with the wiring through holes 3 are aligned. Therefore, compared to the first embodiment of the present invention, the allowable range for the amount of transparent resin 5 which during the 3C and 4C Process step shown is used, the semiconductor substrate 1 on the transparent cover glass plate 4 to attach, to be further increased. A series of tests has shown that despite the fact that the transparent resin 5 was applied with a thickness 1.5 times the thickness used in the first embodiment of the present invention, no transparent resin thus applied spread into those areas where the electrode strips would later be 8th were trained.

In the first embodiment of the present invention as shown in FIGS 3D and 4D is shown, this essentially spread from all wiring vias 3 emerging, transparent resin 5 not over the emitter electrode and then over those areas in which the electrode strips later 8th getting produced.

SECOND EMBODIMENT: 5A to 6D

In the 5A and 6A becomes the silicon substrate 1 either of crystalline silicon or polycrystalline silicon, in which the base electrode 6 and the emitter electrode 7 both on the silicon substrate 1 are formed, as well as manufactured as described above in connection with the first embodiment of the present invention 3B and 4B has been described.

After the formation of the base and emitter electrode 6 and 7 on the silicon substrate 1 will, as in the 5B and 6B is shown, a fluorine-containing coating material, for example made of a fluorine homopolymer, using, for example, a spray gun on the first main surface of the silicon substrate 1 applied where the electrodes 6 and 8th be formed so that a fluorine-containing coating 9 is formed over the entire surface of the substrate. After the application, the fluorine-containing coating is left 9 dry by leaving it to stand for a while. The fluorine coating 9 can be on the side surface of each of the wiring through holes 3 be applied as in 6B shown, but should not be toward the second major surface of the silicon substrate 1 go through, which should ultimately serve as a light receiving surface.

Then according to 5C and 6C the silicon substrate 1 with the fluorine-containing coating 9 with the transparent cover glass plate 4 connected so that its second main surface of the transparent cover glass plate 4 opposite. The assembly is deaerated and then sintered to the transparent resin 5 harden, resulting in the removal of the fluorine-containing coating 9 followed. Although the fluorine-containing coating 9 can be removed using a solvent, for example a fluorine-inactive liquid, the fluorine-containing coating 9 can also be removed by thermal decomposition, which takes place when the temperature is raised to 200 ° C, after using a temperature (150 ° C, which is maintained for a few minutes), which is used to cure the transparent resin 5 is used.

Finally, as in the 5D and 6D shown the electrode strips 8th formed in a similar manner as in the application example or the first embodiment, whereby the fastening of the VEST cells to the cover glass plate is completed.

In the second embodiment of the present invention, the fluorine-containing coating 9 during the in the 5B and 6B shown process step formed. A series of tests has shown that despite the fact that the transparent resin 5 from the wiring through holes 3 out the leaking, transparent synthetic resin 5 due to the fluorine-containing coating 9 is repelled so that it goes into the wiring through holes 3 returned and not over the surface of the fluorine-containing coating 9 spreads. Because the fluorine-containing coating 9 has the property of the transparent resin 5 repel, the silicon substrate 1 with the electrodes provided on it floating on the transparent resin 5 kept, and therefore, although the amount of transparent resin 5 may fluctuate or the transparent resin 5 is applied unevenly and / or the cover glass plate 4 is bent, the arrangement can be securely attached to the cover glass plate so that there are no air bubbles and the transparent resin 5 does not go.

THIRD EMBODIMENT: 7A to 8C

In the third embodiment of the present invention, a reinforced glass plate 10 for exclusive use with solar cells instead of the cover glass plate 4 used, which is used in each of the above-described embodiments. According to 7 are on the reinforced glass plate 10 , which is essentially rectangular, attached ten solar cells.

According to 7A and 8A becomes the silicon substrate 1 with the electrodes produced in a manner similar to the second embodiment of the present invention with the fluorine-containing coating 9 provided on its first main surface so that the electrodes 6 and 7 be covered.

Then, as in 7B shown the transparent resin 5 on a surface of the reinforced glass plate 10 applied. In this case, it is necessary to fill in surface irregularities on the order of several tens of µm, which are on such a surface of the reinforced glass plate 10 are, namely through the applied transparent resin 5 , and then the transparent resin 5 apply evenly to the above upper surface. The connection of the solar cells can be achieved satisfactorily if the transparent resin 5 is present in sufficient quantity over the entire surface of the reinforced glass plate. However, since the thickness in which the transparent resin 5 is applied, is on the order of a few 10 microns, and the amount of transparent resin used 5 In the third embodiment of the present invention, the transparent resin is kept to a minimum 5 only on such surface areas of the reinforced glass plate 10 applied in which the solar cells are connected. Furthermore, the application of the transparent resin 5 on a relatively large surface using a roll coater.

Then, as in the 7B and 8B is shown, the silicon substrate 1 with the reinforced glass plate 10 through the transparent resin 5 connected, followed by a vent and a sintering process to the transparent resin 5 cure. Then the fluorine-containing coating 9 away. Finally, how from the 7C and 8C emerges the electrode strips 8th soldered in a similar manner to one of the above-described embodiments, thereby completing the attachment of the VEST cells to the reinforced glass plate.

A step of applying silicone resin to a large area glass substrate can be performed by a coating device such as a roller coater. 7D shows an embodiment in which ten solar cells on the substrate 10 through the silicone resin 5 are attached. After coating, the substrate is attached in the manner described above.

The cover glass plate 4 used in each of the first to third embodiments of the present invention has a relatively high surface flatness and, moreover, has practically no warpage, and even if the surface is irregular, it is on the order of not more than 10 microns. The method according to the application example or the first embodiment of the present invention is particularly effective when such a cover glass plate is used, and is advantageously used in modules with a relatively small surface area, the use of which is limited, for example, to solar vehicles, satellites or solar battery measuring instruments , but cannot be made with the reinforced glass plate of a type used in a module with a relatively large surface area, in the order of a few 10 square centimeters up to 1 square meter, i.e. for use outdoors, as will be explained in more detail below.

One of the opposite surfaces the reinforced Glass plate for exclusive use for solar batteries currently available on the market, exhibits surface irregularities in the order of magnitude some 10 μm on so that the incident light can be reflected. However, the solar battery with the electrodes already formed, generally with those the oppositely arranged surfaces of the reinforced glass plate are connected at which the surface irregularities emerge, and in this regard, the method according to the application example or the first embodiment of the present invention cannot be performed satisfactorily.

Furthermore, it is possible to avoid the need to connect the cells to that surface of the reinforced glass plate where the surface irregularities appear when after the manufacture of modules with a relatively small surface area using the method according to the application Example or the first embodiment of the present invention, the cells are connected to the reinforced glass plate. However, this leads to an increase in manufacturing costs and is therefore generally undesirable. In contrast, according to the third embodiment of the present invention, it enables the fluorine-containing coating to be applied 9 who have favourited Reinforced Glass Panel 10 instead of the cover glass plate 4 to be used in the first to third embodiments of the present invention.

The present invention as it completely above has numerous advantages. There while the semiconductor substrate with the manufacture of the VEST solar cells the cover glass plate is connected after the electrodes are on are formed in the semiconductor substrate, there is not only one relatively large freedom for the choice of the material of the electrodes, but also the permissible Area for the amount of transparent resin that is required for connection of the semiconductor substrate with the cover glass plate for use is applied in the solar cells, thereby a relatively high To achieve yield in production.

Because the fluorine-containing coating only on the surface of the semiconductor substrate is formed where the electrodes can be trained about it beyond the permissible Area for the amount of transparent resin used to bond the semiconductor substrate applied with the cover glass plate for use in the solar cells is increased even further become what makes it possible the reinforced Use glass plate that is only intended for use in solar cells is.

Claims (16)

Solar cell a) with a semiconductor substrate having a light-facing side and a light-facing side ( 1 ), which is provided with through holes, b) with an emitter layer ( 2 ) of a conductivity type that corresponds to the conductivity type of the semiconductor substrate ( 1 ) is opposite, with at least parts of both sides of the semiconductor substrate ( 1 ) with the emitter layer ( 2 ) are coated, which are connected to one another by a through-hole leading through the through holes, and at least parts of the light-facing side of the semiconductor substrate are not connected to the emitter layer ( 2 ) are coated, c) with electrodes ( 6 . 7 ), which at least on parts of the light-facing side of the semiconductor substrate ( 1 ) are applied both on the emitter layer and on the uncoated areas of the semiconductor substrate, and d) with a transparent substrate ( 4 ) using a transparent binder resin with the light-facing side of the semiconductor substrate ( 1 ), characterized in that the electrode which is connected to the emitter layer ( 2 ) coated areas of the semiconductor substrate is formed, surrounds each through hole. Process for the production of solar cells with the following steps: a) providing a semiconductor substrate having a light-facing and a light-facing side ( 1 ) with through holes ( 3 ) is provided, b) formation of an emitter layer ( 2 ) of a conductivity type which is opposite to the conductivity type of the semiconductor substrate ( 1 ) is such that at least parts of both sides of the semiconductor substrate ( 1 ) with the emitter layer ( 2 ) are coated, which are connected to one another by a through-hole leading through the through holes, and that at least parts of the light-facing side of the semiconductor substrate are not connected to the emitter layer ( 2 ) are coated, c) then applying electrodes ( 6 . 7 ) on at least parts of the side facing away from the light both onto the emitter layer and onto the uncoated areas of the semiconductor substrate, d) then connecting the light-facing side of the semiconductor substrate ( 1 ) with a transparent substrate ( 4 ) using a transparent binder resin ( 5 ), characterized in that the electrode on the with the emitter layer ( 2 ) coated areas of the semiconductor substrate is formed such that it surrounds each through hole. A method according to claim 2, characterized in that the through holes at regular intervals are arranged. Method according to one of claims 2 or 3, characterized in that that the semiconductor substrate has a thickness of less than 100 μm. Method according to one of claims 2-4, characterized in that the emitter layer using a thermal diffusion process is formed. A method according to claim 5, characterized in that to form the emitter layer phosphorus under the influence of heat is diffused into the semiconductor substrate. Method according to one of claims 2-6, characterized in that that the n-type emitter layer and the semiconductor substrate is p-type. A method according to claim 7, characterized in that for the n-type electrode is Ag paste and for the p-type electrode an AlAg paste is used, the pastes after application a few minutes on the side of the semiconductor substrate facing away from the light long at a temperature of 700 ° C be sintered in dry air. A method according to claim 8, characterized in that on the electrodes (by high-temperature sintering on the light-facing side of the semiconductor substrate) 6 . 7 ) Electrode strips ( 8th ) are soldered on. Method according to one of claims 2-9, characterized by the Step of forming a fluorine-containing coating on the light-facing side of the semiconductor substrate after training at least one electrode and before the arrangement of the semiconductor substrate on the transparent substrate, and through the step of removing the fluorine-containing coating after the semiconductor substrate and the transparent substrate has been bonded together. A method according to claim 10, characterized in that the fluorine-containing coating is a fluorine homopolymer. Method according to one of claims 2-11, characterized in that that the arrangement of the semiconductor substrate on the transparent Substrate so performed that the transparent resin only on areas of either the semiconductor substrate or the transparent substrate is applied, which with corresponding Areas of the other part, i.e. the transparent substrate or of the semiconductor substrate to be connected. Method according to one of claims 2-12, characterized in that the connection of the semiconductor substrate and the transparent So performed substrate will that carefully the possibility the transparent resin is prevented from escaping from the through holes, so it's about the first electrically conductive Area spreads. Method according to one of claims 2-13, characterized in that the transparent resin is a silicone resin. Method according to one of claims 2-14, characterized in that the semiconductor substrate consists of a material from the group which includes crystalline and polycrystalline silicon. Method according to one of claims 2-15, characterized in that that the transparent substrate is a reinforced glass plate.