DE19743365A1 - Method for producing a multi-level wiring carrier (substrate), in particular for multichip modules - Google Patents

Abstract

The conductor track system is applied simultaneously to several individual substrates in several coating and microstructuring steps. Said substrates form a single piece and are separated only after structuring has occurred. In order to produce ready-made thin substrates, the individual substrates are processed at least during structuring in the form of a strip.

Description

The invention relates to a method for producing a Multi-level wiring substrate (substrate) especially for Multichip modules, in which the conductor track system in several Coating and microstructuring steps simultaneously which is applied to several individual substrates connected in one piece and only after structuring be isolated.

With the increasingly smaller and faster Integrated circuits are facing increasing challenges Construction and connection technology. So far, there are still many individual chips packed in individual packages and processed further. However, there are several technical reasons further development of these housing processes is desirable appear. So the connections of the different chip components of a system (processors, Storage, . . .) via pin / pin wiring outside the single single-chip package in a higher one Architectural level of the system structure can be realized. The often very high number of pins per chip (up to a few Hundred) stands in the way of further integration. Also force the reduction in energy consumption and increase in Clock rate (signal propagation times) for shorter cable routes and thus for the closer placement of the different chips. As a consequence of these demands have been for some time Multichip modules known and available on the market.

Through these modules, an intermediate carrier substrate with high Wiring density as an additional level in the hierarchy of the system structure introduced. They are typical Using multiple bare chips and a high one  Area coverage of the multichip substrate. A similar Known new development concerns the chip size package (CSP), in which a single bare chip on a Intermediate substrate is applied, which is hardly larger than that Chip area is, and then the space-saving Contact to the next architecture level directly under the Chip area is used.

These new integration techniques require a carrier substrate on which both the chips are mounted and, for multichip modules, are electrically connected to each other by extremely short wiring. Due to the high wiring density that can be achieved in thin-film technology (previously on ceramic substrates) (typical conductor track widths 5-50 µm), two to four metallization levels are normally sufficient. The main technological steps in the production of a thin-film multi-level wiring carrier are:

• - Application of metallizations by sputtering technology or by vapor deposition,
• - the subsequent photolithography,
• - and wet chemical or dry etching processes for Structure creation.

The insulation layers of the multi-level wiring board are typically made of photostructurable Polymers produced that are compared to the Temperature loads during the subsequent Housing process (for example Plastic extrusion processes) are insensitive.

The previous techniques, in particular thin-film technology, for producing multichip substrates use the principle of manufacturing individual substrates in wafers (panels or panels), which is also known from semiconductor production. A number of identical, not yet divided individual substrates are processed simultaneously. In thin film technology, typical rectangular wafers with a size of (4-8 inches) ² are subjected to the manufacturing processes individually (for example in spin coating processes or in photolithography) or in groups (for example in sputter metallization or in the case of galvanic amplification).

It is now crucial that wafer thicknesses of 400 microns and more are required to ensure safe handling (machine or manually), for example the transport of a wafer from a Manufacturing station to the next to realize. For one of course you want rational production at the same time as many individual substrates as possible, that is, a large one Wafers, process, which in turn, however, the necessary Wafer thickness is growing. This is problematic in that on the other hand, there is a requirement from the user side, the standardized also for multichip modules To be able to use semiconductor packages. A typical flat one Case shape, like the Quad Flat Pack (QFP) case has a Standard thickness of the plastic body of 1.4 mm, which in the future rather should be reduced. With those with the known Previous substrates produced by the process would come along such flat housing shapes to the thickness of the lead frame, the chips and the plastic material as mentioned above 0.4 mm (subcarrier substrate thickness) in height so that the standard dimension of 1.4 mm or less does not hold let. In principle, the remedy could be from the Silicon technology uses known thinning processes be, however, for use in the manufacture of Multichip modules seem too expensive.

The present invention is therefore based on the object to further develop the method of the type mentioned at the beginning, that building very thin ones, especially on lead frames based multichip modules. In particular a thin-film-based substrate is to be produced, which in its technological processability and in  its outer geometry no restrictions on the previous housing techniques required.

According to the invention, this object is achieved in a method of type mentioned solved in that the Individual substrates in shape at least during structuring of a tape substrate can be processed.

Developments of the invention are the subject of Subclaims. The invention and its developments are explained in more detail below.

The invention is based on the idea of the previous one Manufacturing of circuits to go on single wafers In favor of an - essentially - continuous Production of substrates in the form of tapes. Band production allowed the use of extremely thin substrates without additional handling problems. It secures an enormous Productivity gain through continuous production at Metallization and microstructuring.

Ceramic tapes, organic, come as substrate material Materials like epoxy films and, above all, thin ones Metal bands in question. The latter are particularly good because they have a very good thermal conductivity, which leads to Removing the power loss of the chips is advantageous and also have very good electrical conductivities, what their use as a global ground and shielding level enables.

The thin tape substrates are preferred according to the invention manufactured with a thickness of less than 100 µm. The structure which takes different layers of the interconnect system a total of about 20 µm.  

With a strip substrate made of metal, there are basically two options for further processing with regard to a lead frame:
On the one hand, it is possible to place the structured metal substrates on an additional, common lead frame. On the other hand, the metallic strip substrate itself can also be further processed into the lead frame below. It is advisable to choose copper or iron as the base materials for the wiring carrier, which are used in typical lead frame alloys. With such a "leadframe substrate" as a wiring carrier, on the one hand the material advantages (moldability, compatibility with the silicon chip) of the leadframe have been used as a substrate carrier and, on the other hand, this has advantageously been combined with a very thin wiring carrier. The previous technology process for the housing processes will be retained in full. Instead of a conventional leadframe, a leadframe substrate is used; instead of a chip on a conventional leadframe, a large number of chips are placed on the leadframe substrate. Ultra-thin modules are therefore possible.

The previous technological process can be transferred analogously to the strip production according to the invention:
The deposition of the metal / line levels takes place by metallization of strips z. B. by means of sputtering, optionally with subsequent galvanic amplification. The deposition of insulation levels is achieved by applying insulation material to the strip substrate, for example by roller coating, spray coating or by extrusion coating. The photolithography of the conductor and insulation levels can be carried out by coating tape substrates, for example by roller coating, spray coating or extrusion coating, then exposing and developing tape substrates. The previous wet etching processes of the line / insulation levels can also be carried out as bath etching processes of strips. Individual experiences with deposition and structuring processes in connection with band production are already known from the production of lead frames with fine structures (approx. 65 µm).

According to the invention, not only do qualitatively improved, namely extremely thin multichip modules, but it will too quantitatively a significantly reduced effort in the Substrate production achieved. By replacing the Machining single disks can be done very easily and with a lot Cost savings on very large wafer sizes with accordingly, a larger number can be processed at the same time Substrate carrier for a multichip module can be transferred. In addition, the handling systems are extremely simplified because the production now essentially through the transport of the Tape substrates from roll to roll by one or more Manufacturing stations are carried out.

The conductor track and contact system on the top of the Substrates can be made using thin film technology, thick film technology or a combination of the two.

Claims (3)

1. A method for producing a multi-level wiring substrate (substrate), in particular for multichip modules, in which the conductor track system is applied in several coating and microstructuring steps simultaneously to several individual substrates, which are connected in one piece and are only separated after the structuring, characterized in that that the individual substrates are processed at least during the structuring in the form of a tape substrate. 2. The method according to claim 1, characterized, that a tape substrate made of metal is used. 3. The method according to claim 2, characterized, that from the structured single substrate itself afterwards the leadframe of the multichip module is produced.