DE19522054C1 - Development of germanium quantum wires on silicon@ substrates - Google Patents

Development of germanium quantum wires on silicon@ substrates

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Publication number
DE19522054C1
DE19522054C1 DE19522054A DE19522054A DE19522054C1 DE 19522054 C1 DE19522054 C1 DE 19522054C1 DE 19522054 A DE19522054 A DE 19522054A DE 19522054 A DE19522054 A DE 19522054A DE 19522054 C1 DE19522054 C1 DE 19522054C1
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quantum wires
substrates
buffer layer
quantum
vapour deposition
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DE19522054A
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Hans-Joachim Muessig
Jaroslaw Dabrowski
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INST HALBLEITERPHYSIK GmbH
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INST HALBLEITERPHYSIK GmbH
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/08—Germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02603—Nanowires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Power Engineering (AREA)
  • Nanotechnology (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Composite Materials (AREA)
  • Mathematical Physics (AREA)
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  • Recrystallisation Techniques (AREA)

Abstract

To produce Ge quantum wires on Si substrates for semiconductor components, through a spontaneous organised epitactic growth of Ge nanostructures, an atomically clean Si surface is prepared in ultra-high vacuum, at a pressure of about 10-10 mbar. This is followed by an in-situ deposition of a Si buffer layer. Anisotropic Ge islands are formed on the buffer layer, by vapour deposition, with a substrate temp. of 400-500 deg C. The remaining Si surfaces, free of Ge, are nitrated by NH3 adsorption at 600 deg C. Further Ge vapour deposition gives a selective epitactic growth of the Ge islands until the Ge quantum wires are formed. The Ge quantum wire structures are covered by a further vapour deposition of a Si layer.

Description

Die Erfindung betrifft ein Verfahren zur Herstellung von Ge- Quantendrähten auf Si-Substraten für Halbleiterbauelemente durch selbstorganisiertes epitaktisches Wachstum von Ge-Nanostrukturen.The invention relates to a method for producing Quantum wires on Si substrates for semiconductor devices self-organized epitaxial growth of Ge nanostructures.

Auf dem Weg zur Höchstintegration werden immer kleinere Halbleiterstrukturen angestrebt, so daß die Herstellung und die Untersuchung dimensionsreduzierter Halbleiterstrukturen zwei wesentliche Bestandteile der modernen Festkörperphysik geworden sind.On the way to maximum integration are getting smaller and smaller Semiconductor structures sought, so that the manufacture and the Investigation of dimensionally reduced semiconductor structures two have become essential components of modern solid state physics are.

Weit verbreitet zur Herstellung quasizweidimensionaler Hetero­ strukturen im Nanometermaßstab sind gegenwärtig lithographische Techniken. Allerdings sind die damit erreichten minimalen lateralen Abmessungen viel größer als die vertikalen, was zu relativ kleinen Abständen zwischen den Subbandenergien führt. Diese schmalen Subbandzwischenräume werden durch die Energieniveauverbreiterung infolge von Schwankungen der Drahtbreite und von Defekten, die während des Strukturierungs­ prozesses entstehen, zusätzlich noch verschleiert. Um insbesondere die Defektdichte zu verringern, werden verschiedene Methoden der Direktherstellung von Quantendrahtstrukturen, die auf dem epitaktischen Wachstum basieren, benutzt. Dazu gehören das Wachstum gekippter Übergitter auf Vicinalflächen, das Wachstum gittereingesetzter Heterostrukturen und das spannungsinduzierte Confinement. Mit diesen Strukturen können laterale Abmessungen erreicht werden, die mit den vertikalen vergleichbar sind. Sie erlauben im Prinzip große Subbandabstände, wie sie für optische und elektrische Bauelementeentwicklungen erforderlich sind. Die am häufigsten eingesetzte Methode betrifft das Wachstum gekippter Übergitter durch Aufdampfen von Bruchteilen von Monoschichten sich abwechselnder Zusammensetzung auf gestufte Oberflächen, die durch eine geringe Fehlorientierung spezieller Oberflächen erzeugt werden. Ihre erfolgreiche Anwendung ist bisher wegen der schlechten Kontrolle der lokalen Fehlorientierung, der Sprungbildung und wegen der Stabilität der Wachstumsrate sehr begrenzt. Die erzeugten Drähte leiden deshalb unter Uneinheitlichkeit in Form, Größe und Richtung und bis heute wurde kein klares Anzeichen eines eindimensionalen Confinementeffektes beobachtet.Widely used to produce quasi-two-dimensional hetero structures on the nanometer scale are currently lithographic Techniques. However, the minimum achieved with this is lateral dimensions much larger than the vertical ones, too leads to relatively small distances between the subband energies. These narrow subband gaps are created by the Energy level broadening due to fluctuations in Wire width and of defects during structuring process arise, additionally obscured. To in particular Different methods of reducing the defect density Direct production of quantum wire structures based on the based on epitaxial growth. That includes that Growth of tilted superlattices on vicinal surfaces, the growth grid-inserted heterostructures and the stress-induced Confinement. With these structures, lateral dimensions can be achieved, which are comparable to the vertical. she in principle allow large subband spacings, as they are for optical and electrical device developments are required. The most  The most frequently used method concerns the growth of tilted Superlattice by evaporating fractions of monolayers themselves alternating composition on stepped surfaces by creates a slight misorientation of special surfaces will. Your successful application so far is because of poor control of local misorientation, the Cracking and because of the stability of the growth rate very much limited. The wires produced therefore suffer Inconsistency in shape, size and direction and until today no clear indication of a one-dimensional confinement effect observed.

Aus Surf. Sci., Bd. 265, 1992, S. 156-167 und aus Ultramicroscopy, Bd. 42-44, 1992, S. 832-837 und S. 902-909 ist bekannt, daß sowohl auf der Si(001)- als auch auf der Si(113)-Oberfläche ein durch die Struktur der Substratoberflächen bestimmtes anisotropes Wachstum von Ge in der Anfangsphase stattfindet.From surf. Sci., Vol. 265, 1992, pp. 156-167 and from Ultramicroscopy, 42-44, 1992, pp. 832-837 and pp. 902-909 it is known that both on the Si (001) and on the Si (113) surface anisotropic determined by the structure of the substrate surfaces Growth of Ge takes place in the initial phase.

In J. Vac. Sci. Technol. B, Bd. 12, 1994, S. 2699-2704 konnte mittels Röntgenstrahl-Photoelektronenspektroskopie nachgewiesen werden, daß durch NH₃-Adsorption auf Si(001) anfangs eine schnelle Nitrierung stattfindet, die bei hohen Expositionen in einen Sättigungszustand übergeht, weil das reagierende Si nur langsam durch die gebildete Nitridschicht diffundieren kann. Im Gegensatz dazu ist die Ge(001)-Oberfläche gegenüber einer thermischen Nitrierung durch NH₃ vollständig inaktiv. Das trifft auch auf Ge/Si-Heterostrukturen zu, auf denen nur Si nitriert werden konnte.In J. Vac. Sci. Technol. B, vol. 12, 1994, pp. 2699-2704 detected by means of X-ray photoelectron spectroscopy be that by NH₃ adsorption on Si (001) initially a quick Nitration takes place at high exposures in one Saturation state passes because the reacting Si is slow can diffuse through the nitride layer formed. In contrast the Ge (001) surface is opposite to a thermal one Nitriding completely inactive by NH₃. That also applies Ge / Si heterostructures on which only Si are nitrided could.

Der Erfindung liegt die Aufgabe zugrunde, Ge-Quantendraht­ strukturen durch Aufdampfen von Ge auf geeignete Si-Oberflächen direkt zu erzeugen.The invention has for its object Ge quantum wire structures by evaporating Ge onto suitable Si surfaces to generate directly.

Diese Aufgabe wird durch die kennzeichnenden Merkmale des Patent­ anspruchs 1 gelöst. Eine vorteilhafte Weiterbildung ist im Anspruch 2 angegeben.This object is achieved through the characteristic features of the patent claim 1 solved. An advantageous further development is in claim 2 specified.

Die strukturelle Architektur geeigneter Si-Oberflächen (z. B. Si(001) und Si(113)) und die Passivierungsmöglichkeit der Si-Atome durch thermisches Nitrieren lassen die direkte Synthese von Quantendrahtstrukturen durch Aufdampfen von Ge zu. Diese Strukturen besitzen elektrische Transporteigenschaften, die zwischen jenen unendlich ausgedehnter dreidimensionaler Festkörper und jenen von Molekularclustern liegen.The structural architecture of suitable Si surfaces (e.g. Si (001) and Si (113)) and the possibility of passivation of the Si atoms  by thermal nitriding allow the direct synthesis of Quantum wire structures by vapor deposition of Ge zu. These Structures have electrical transport properties that between those infinitely extended three-dimensional solids and those of molecular clusters.

Die Erfindung soll nachstehend an Hand eines Ausführungsbei­ spieles näher erläutert werden:The invention is described below with the aid of an embodiment game are explained in more detail:

Da sowohl auf der Si(001)- als auch auf der Si(113)-Oberfläche ein durch die Struktur der Substratoberflächen bestimmtes anisotropes epitaktisches Wachstum von Ge in der Anfangsphase beobachtet wird, das z. B. auf Si(001) zu 2×n-Strukturen mit n 8 führt, wird bei der Erfindung ausgenutzt, diese langgestreckten Ge-Inseln durch selektive Ge-Abscheidung zu Quantendrähten zu verstärken. Dazu wird die strenge thermische Nitrierungsselektivität zwischen Si und Ge ausgenutzt. So wurde bekannterweise mittels Röntgenstrahl-Photoelektronenspektroskopie (XPS) nachgewiesen, daß durch NH₃-Adsorption bei 600°C auf Si (001) anfangs eine schnelle Nitrierung der Si-Atome stattfindet. Sie geht bei hohen Expositionen in einen sättigungszustand über, weil die reagierenden Si-Atome nur langsam durch die gebildete Nitridschicht diffundieren können.Since both on the Si (001) and on the Si (113) surface one determined by the structure of the substrate surfaces anisotropic epitaxial growth of Ge in the initial phase is observed that z. B. on Si (001) to 2 × n structures with n 8th leads, is used in the invention, these elongated Ge islands by selective Ge deposition to quantum wires reinforce. This is the strict thermal Nitration selectivity between Si and Ge exploited. So it was as is known by means of X-ray photoelectron spectroscopy (XPS) demonstrated that by NH₃ adsorption at 600 ° C on Si (001) initially a rapid nitriding of the Si atoms takes place. she changes to a saturated state at high exposures because the reacting Si atoms only slowly through the formed Diffuse nitride layer.

Im Gegensatz dazu ist die Ge(001)-Oberfläche gegenüber einer thermischen Nitrierung durch NH₃ vollständig inert. Das trifft auch auf Ge/Si-Heterostrukturen zu, auf denen nur Si nitriert werden konnte.In contrast, the Ge (001) surface is opposite one thermal nitration by NH₃ completely inert. That is true also towards Ge / Si heterostructures on which only Si nitrides could be.

Daraus ergibt sich, die Si-Atome einer Ge/Si-Heterostruktur durch thermische Nitrierung zu passivieren, um während der nachfolgenden Ge-Bedampfung ein selektives epitaktisches Wachstum von anisotropen Ge-Inseln bis zur Ausbildung von Ge-Quantendrähten zu erreichen.It follows that the Si atoms of a Ge / Si heterostructure to passivate thermal nitriding during the subsequent Ge-evaporation is a selective epitaxial growth of anisotropic Ge islands up to the formation of Ge quantum wires to reach.

Claims (2)

1. Verfahren zur Herstellung von Ge-Quantendrähten auf Si- Substraten für Halbleiterbauelemente durch selbstorganisiertes epitaktisches Wachstum von Ge-Nanostrukturen, dadurch gekennzeichnet, daß eine atomar saubere Si-Oberfläche im Ultra-Hochvakuum präpariert wird,
daß danach in-situ eine Si-Pufferschicht abgeschieden wird,
daß auf die Pufferschicht bei einer Substrattemperatur zwischen 400 und 500°C Ge zur Ausbildung von anisotropen Ge- Insel aufgedampft wird,
daß die verbleibende Ge-freie Si-Oberfläche bei Temperaturen bis 600°C durch NH₃-Adsorption nitriert wird,
daß danach durch erneute Ge-Bedampfung ein selektives epitak­ tisches Wachstum der Ge-Inseln bis zur Ausbildung von Ge- Quantendrähten erzeugt wird und
daß danach die Ge-Quantendrahtstrukturen durch Aufdampfen einer Si-Deckschicht abgedeckt werden.1. Process for the production of Ge quantum wires on Si substrates for semiconductor components by self-organized epitaxial growth of Ge nanostructures, characterized in that an atomically clean Si surface is prepared in an ultra-high vacuum,
that a Si buffer layer is then deposited in situ,
that Ge is evaporated onto the buffer layer at a substrate temperature between 400 and 500 ° C to form anisotropic Ge island,
that the remaining Ge-free Si surface is nitrided at temperatures up to 600 ° C by NH₃ adsorption,
that a selective epitaxial growth of the Ge islands until the formation of quantum wires is then generated by renewed Ge vapor deposition and
that the Ge quantum wire structures are then covered by vapor deposition of a Si cover layer. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß bei einem Druck von etwa 10-10 mbar präpariert wird.2. The method according to claim 1, characterized in that is prepared at a pressure of about 10 -10 mbar.
DE19522054A 1995-06-17 1995-06-17 Development of germanium quantum wires on silicon@ substrates Expired - Fee Related DE19522054C1 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002090625A1 (en) * 2001-05-08 2002-11-14 Btg International Limited A method to produce germanium layers
WO2008080828A1 (en) * 2007-01-05 2008-07-10 International Business Machines Corporation Self-constrained anisotropic germanium nanostructure from electroplating
US7785982B2 (en) 2007-01-05 2010-08-31 International Business Machines Corporation Structures containing electrodeposited germanium and methods for their fabrication
US9496263B1 (en) 2015-10-23 2016-11-15 International Business Machines Corporation Stacked strained and strain-relaxed hexagonal nanowires

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
NL-Z: Surf.Sci., Bd. 265, 1992, S. 156-167 *
NL-Z: Ultramicroscopy, Bd. 42-44, 1992, S.832-837 *
NL-Z: Ultramicroscopy, Bd. 42-44, 1992, S.902-909 *
US-Z: J.Vac.Sci.Technol. B, Bd. 12, 1994, S. 2699-2704 *

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002090625A1 (en) * 2001-05-08 2002-11-14 Btg International Limited A method to produce germanium layers
WO2008080828A1 (en) * 2007-01-05 2008-07-10 International Business Machines Corporation Self-constrained anisotropic germanium nanostructure from electroplating
US7659200B2 (en) 2007-01-05 2010-02-09 International Business Machines Corporation Self-constrained anisotropic germanium nanostructure from electroplating
US7785982B2 (en) 2007-01-05 2010-08-31 International Business Machines Corporation Structures containing electrodeposited germanium and methods for their fabrication
US8115191B2 (en) 2007-01-05 2012-02-14 International Business Machines Corporation Self-constrained anisotropic germanium nanostructure from electroplating
US8823143B2 (en) 2007-01-05 2014-09-02 International Business Machines Corporation Electrodeposition method for forming Ge on semiconductor substrates
US9496263B1 (en) 2015-10-23 2016-11-15 International Business Machines Corporation Stacked strained and strain-relaxed hexagonal nanowires
US9761661B2 (en) 2015-10-23 2017-09-12 International Business Machines Corporation Stacked strained and strain-relaxed hexagonal nanowires
US9859367B2 (en) 2015-10-23 2018-01-02 International Business Machines Corporation Stacked strained and strain-relaxed hexagonal nanowires

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