DE1774283C3 - Arrangement between input and output devices of data processing systems for encryption and decryption as well as for the transmission of information - Google Patents

Description

The invention relates to an arrangement between input and output devices for data processing Systems for encryption and decryption as well as for the transmission of information on demand using register, diode-equipped matrix or Allocation circuits.

A circuit for generating characters in binary code, for example, has become known from a diode-equipped selection circuit and a counting chain (German Auslegeschrift 617).

A considerable saving in terms of diodes should be achieved with this circuit. This becomes through it achieves that the character to be sent determining contacts via the type of crossbar distributors built-up selection circuit with one electrode one selected by the

I 774 283

3 4

!, calibrate a total number of transistors except by buttons, depending on the the

the second electrodes of which are supplied by the counting input and output devices.

transmit one after the other with impulses unencrypted information can be switched and

Jen, and her third electrodes, each with the next unencrypted information

\ output of the arrangement. 5 retrieves.

An arrangement has also become known for this, especially through the output contacts

Conversion of a plurality of input information from the functional elements, an acknowledged information

irtit with the help of a matrix of individual elements (Swiss transport between input and output devices in

Roman patent 349 106). Start-stop operation possible through the opposite

The special feature of this arrangement is that io known devices with very simple Schaltuugs-

that at the crossing points of the matrix saturation arrangements an optimal working speed

converter with a performance-enhancing effect and variability can be achieved. To avoid a disruptive

can be seen and every saturation converter is guaranteed at least free and insensitive data transport.

eiti output circle is assigned to which a blocking means is assigned, the encrypted information is the

in such an arrangement that the output »5 control inputs of bistable stages of a register

circle can only be influenced in one current direction. offered, of which they, in accordance with an internal

Circuits for the internal clock of the control unit have also become known.

simplification of the transmission of information, the implementation and complement

(French patent I 279 924), for saving the information at the outputs of the

tion of diodes in »matrices« (feeder, digital 20 stable levels of the register are available.

Rechenanlagen, 2nd edition, Springer-Verlag 1965. Due to these measures, the

P 60 to 64) and allocator and diode circuits, control unit practically only in the ^p otentiale connects

which are optimally structured (Steinburh, pocket book lines between the input and output devices

der Nachrichtenverarbeitung, 2nd edition, switched rates for jumpers. These can therefore be as passive as

Verlag 1967, pp. 402 to 404). 25 can be kept possible.

In contrast, the present invention lies in a further embodiment of the invention, the bi-

the object of the invention is to create an arrangement between stable levels of the register flip-flops in which

Data processing input and output devices between each control input and the associated one

a decoupling diode was provided for encryption and decryption as well as for the implementation output

averaging of information in the on-demand mode can be seen under 30. The control inputs of the register plip-flops

Use of bistable stages known per se - are also available via a collecting line for information

based on the register, diode-equipped matrix or function transfer pulses sent to the control unit.

To create allocator circuits through which one included.

compartments and secure acknowledged information transport As a result, as well as the fact that the reset

is possible in start-stop operation. This arrangement 35 gears of the register flip-flops except for a collective

should not, as before, be glued on from individual units for reset pulses via an additional

builds and on a single coding or on a bus for [information retrieval pulses to the

limited number of codings. Prin control unit are connected, it is achieved that

ZipieM should contain all practically occurring code - all information offered at the control inputs

are initially transferred to the flip-flop stages at an optimal working speed of 4 °

and after making only a few changes, before the implementation and

can be worked. Complementary values of this information appear.

It has been found that this task turns out to be particularly advantageous if the line and can be solved in a fan manner by connecting the implement column address lines for the driver matrix from the bistable stages of the register under 45 identical combined encryption and decryption interconnection of AND circuits for retrieval matrices are connected, which are from the control unit Switch impulses with the output terminals for encrypted either to encryption or decryption Information are connected and let the implement-.

and complement outputs of the bistable stages with With the invention, all desired spinning line pairs can still be used two identical, combined codings without changing the diodentcr Encryption and decryption matrices in connection with matrices built-up combined formation and emergence, their row lines through row and coding matrices quickly and easily Column address lines and assigners, the row pins or the like in the assigner through and column lines of a driver matrix for radio are routed. This applies to both the Ent- as tion elements for the output of unencrypted information also for the encryption. The assigners are ermationcn control that each row and column are structured in such a way that each piece of information address line pair via an assigner to one individually for each code symbol of a used Key contact can be assigned to an input keyboard for unlocked codes, rare information and / or via an allocator. Further details of the invention result to an output contact each of a functional element 60 from the following description of a design for the output of unencrypted information in the example and from the drawing. It shows: Switching connection is that the control inputs of the F i g. 1 an overview circuit diagram, bistable stages of the register via the Fig. 2 is a schematic circuit diagram of the total implementation outputs connected column line arrangement,

The combined encryption and decryption 65 Fig. 2a is a detailed circuit diagram for a function matrix with code contacts of the input device element,

device for encrypted information are connected, Fig. 3 the control unit in detail,

and that a control device is provided which, F i g. 4 shows a detailed circuit diagram of a connection

flip-flops and

F i g. 5 a code table.

Encrypted information can be entered into the arrangement according to the invention and in the same Encrypted or decrypted can be issued again.

Optionally, information offered unencrypted as singular statements can also be encrypted output for further processing. The arrangement is designed so that arbitrarily encrypted Information with up to a maximum of 8 code elements can be processed. Without am To change the essence of the invention something, any other expedient interpretation can be made.

According to FIG. 1, there is an input device 4 for the encrypted information with the input: /. ve / ·. One (information encrypts input) is connected to two identical, combined encryption or decryption matrices 1OZ, 10 SP (Z. lines; SP: columns). Both matrices are connected to a register 8, to which each encrypted information is initially offered.

The encrypted information can be passed on unchanged from the register to an output device 5 for encrypted information with the output: f. Ver. Aus (information encrypted output).

The identical, combined Vcr or decrypters 10Z and 10 SP are diode matrices which in the illustrated embodiment are constructed so that tracks 1 to 4 in matrix 10 SP and tracks 5 to 8 in matrix 10 SP are encoded in eight figures with all possible combinations are complementary. This means that for 8 tracks of the input device 4, preferably a punched tape reader, there are 16 row and column lines each with all possible combinations in the two matrices 10, 10 and 10 SP . With the line routing present in the exemplary embodiment, all codes containing up to a maximum of 8 code elements can therefore be processed without changing the diode matrices 10Z and 10 SP. In accordance with the principles disclosed below, the arrangement can also be expanded to codes with more code elements without difficulty.

The row lines of the matrix 10 Z are connected to the row lines via row address lines 360 and a row allocator 62 Z and the row lines of the matrix 10 SP are connected to the column lines of a driver matrix 12 via column address lines 370 and a column allocator 62SP, with the functional elements of an output device 1 for decrypted information with the exit: /. ent. Off (information decrypted output).

All functional elements of the output device 1 each have an acknowledgment or output contact 50. All output buttons 50 are via a further allocator 52 and lines 53 are connected to the associated row and column address line pairs 360,370.

The variability and the actual code definition of the arrangement is made possible by the named assigners 52 and 62 received.

In the exemplary embodiment explained, the functional elements that can be controlled with the driver matrix 12 can also be controlled by keys on an input keyboard. This input device 3 for unencrypted information with the dedication: /. unvcr. A (unencrypted information input) is schematically indicated in FIG. 1 in connection with the driver matrix 12. The keys of the input device 3 operate switches through which the corresponding address line pairs 360/370 are excited. In this way, according to the invention, singular information about keys is not in a typewriter, but at the same time also in the for encryption

ίο combined preliminary and decoding malrices 1OZ, Ii) SP entered. When the keys are mechanically connected to the function modules, the acknowledgment contacts 50 generate the signals for the combined encryption and decryption matrices 10Z or 10 SP. The switching measures required for this can easily be carried out by any person skilled in the art without any inventive step.

The directions of the arrows in FIG. 1 indicate. that the entered into the input device 3 un-

ao encrypted information can be delivered to the combined encryption and decryption matrices 10Z, 10.S7 'as well as to the output device 1 via the allocators 62 Z, 62SP.

A validity checker 11 is also connected to the row or column address lines 360/370 between the combined encryption and encryption matrices 10Z and 10 SP and the Trcibei matrix 12 Errors occur.

The arrangement then has a control unit 9 with four buttons 95, 96, 105, 106, which via a signal line 25 with a pulse: information encrypted input end - IEE - to the input device 4 for encrypted information and via a signal line 100 for a pulse: information end Driver matrix - IE Tr. Ma - · is connected to the output device 1 for key information.

A further signal line 109 between the control unit 9 and the input device 4 is used to transmit thick start and stop signals. The Trcibcrmalrix 12 is via a further line67 for the installation of an operating voltage of OV: 0 V Tr. Ma.

connected to the control unit 9. If the working voltage is switched off by OV, the entire driver matrix switched off.

The validity checker 11 is also connected to the control device 9 via signal lines 48, 49 for test pulses. The output device 5 for encrypted information is connected to the control device 9 via two signal lines 102, 103: end of information punch - IE Lo - and: completion message punch - FM Lo.

The control device 9 can then transmit the command: Call punch - A Lo - to the output device 5 via a further signal line 72.

The register 8 receives the commands from the control unit 9 via two signal lines 78, 79: accept information - IU - and: retrieve information - la -. Two signal lines 32/39 then lead from the control unit 9 to the combined encryption and decryption matrices 10Z and 10 SP, by means of which a voltage: 22 V Ent, for example for decoding, and a voltage: OV Ver, for example for encrypting the information, can be applied .

The buttons indicated in the control unit 9 are

7 8

given the following commands: Key 95: Not position of the line with the addition of the book-writing - NS -; Key 96: Write again letter K are designated.

- WS -; Key 105: start reader; Key 106: Stop The upper ends of all column lines in FIG. 2

Reader. 30, 31 are connected via resistors 33 to a collecting

It goes without saying that all of the specified voltages are 5 line 32 connected to the control unit 9. The un-

bzv / potentials can only be used as an example. lower ends of all column lines 30, 31 are paired

Anyone skilled in the art will, without thereby being aware of the invention, about decoupling diodes 76, to 76 ₈ and 77 ₁

If necessary, up to 77 ₈ at the implement and complement outputs

can use other voltages. 77 / and 73 K of register flip-flops 73 _t to 73 ₈

In the following description of an output of register 8. Each implement column line 3I ₁

example, it is assumed that the input to 3I ₈ is also connected to the control input 73 5 of the assigned

device 4 for the encrypted informa- tion register flip-flops 73 to 73 ₈ connected

functions a strip reader, the output device 1 for sen.

the decrypted information a normal According to the invention the column lines 3I ₁ typewriter Eingabevorrichtung3 for 15 to 3I ₈ both as signal lines for the Reunverschlüsselten information, the keyboard of this gister8 to be offered bits and the encrypted infor typewriter and the output device 5 for mation as as Implementations of the encrypted information on a punched tape at the outputs of the register flip-flops 73 as a punch. Decoder switched matrices 1OZ and 10 SP

Instead of a typewriter, ao signals to be offered could just as well be used,

a printing unit, a booking machine or Ahn- The reset inputs 73 R of all register flip-

can be used. Flops 73 to 73 ₈ are both due to a collective

As input device 3, for example, line 74 for reset pulses mb as well as a remote input, as output device 5 a Ma signal line 79 for information retrieval pulses IA from gnetschreiber or any memory and as »5 to control unit 9. The control inputs 73 5 receive input device 4, the output station of a data processing machine or the output station receiving impulses IÜ from the control device 9.
a memory or the like. Can be selected. The implementation outputs 73 / all register flip-According to Fig. 2, in which an embodiment of the flops 73, to 73 _R are also shown in detail via Signalleitun invention, has 30 _{genes 75, to 75 8} with one input each Input device 4 8 code contacts 20, up to 2O ₈ earner AND circuits 7I ₁ to 7I ₈ in the Ausauf, which according to the input device 5 to be entered in connection, their respective second formations on known, related inputs via the bus 72 call pulses received with the present invention, however, not inter- ALo from the control unit 9. The Ausessenden way will be closed. 35 gears of the AND circuits 71 to 71 _S lead

The code contacts 2O ₁ to 2O ₈ are connected via output _{terminals 70 to 7O 8} to which the

Sanrmelleitung23 from the control unit9 with a signal the embodiment a known per se, im

voltage, for example 12 V, and are connected via individual strip punches, not shown.

Signal lines 2A ₁ to 24 ″ is connected to the common, which is connected via the lines 102 for the Si implement spa'iten lines 3I ₁ to 3I _{8 of} two identical signals: IELo and 103 for the signals: FM Lo with the

table, combined with each other control and Ent- control unit 9 is in operative connection,

Keying matrices 1OZ and 10 SP connected. The row lines 36 to 36, ₆ and 37 to 37 ₁₆

One each of the implement column lines 31 to 3I _{3 of} the two encryption and decryption matrices 10Z

forms with an associated complement column line or 10 SP end in resistors 38, which have a

tion 3O ₁ to 3O ₈ a pair of column conductors. 45 Collective line 39 (22 V) connected to control unit 9

The signal lines 2A ₁ to 24 ₈ are also connected to.

each to an input of an OR circuit 22, which the in F i g. 2 right ends of the row lines

Via signal line 25 for the pulse: IEE with 3O ₁ to 36 ₁₆ and 37 _t to 37 _l6 go to line address

the control unit 9 is in connection. ÜbeT the WEI senleitungen 36O 36O ₁ to ₁₆ and column address Leitere signal line 109, which in Fig. 2 only indicated 50 obligations 37o 37o ₁ to about _16, to which the inputs of the

is, and simply ends in the input device 4, validators 11 are connected. Here sine

are known to the strip reader in the so-called "even" row address lines, the sine

In connection with the present invention, however, those that are selected when the pertains to it

Not of interest, start and stop commands encrypted information transmitted by an even number of Sivon the control unit 9. 55 signals, via connecting lines 40O ₁ bi:

The combined encryption or decryption 40O ₈ to a first OR circuit 40, and the so-called

Matrices 1OZ, 10 SP are identical "odd" row address lines, which are sol

Diode matrices with the diodes 35th, which are selected when the associated ver

The column lines 3I ₁ to 3I _{4 of} the matrix 1OZ encoded information an odd number of signals are sent to the Ka- 60 via the signal lines 2A ₁ to 24 ₄ , are via connecting lines 41O ₁ bi

channels 1 to 4 and the column lines 3I ₅ to 3I _{8 of} the 41O _{8 are connected} to a second OR circuit 41

Matrix 10 SP via the signal lines 24 ₅ to 24 ₈ to sen. The "odd" column address lines are sini

the channels S to 8 of the encrypted information via connecting lines 42O ₁ to 42O ₈ to eim

connected. third OR circuit 42 and the "even" Spal

At this point it should be pointed out that 65 ten address lines via connecting lines 430

that, for the sake of simplicity, the separation points of the Si to 43O ₈ to a fourth OR circuit 43 is attached

signal lines from FIG. 2 to the control unit. The outputs of the OR circuits 41

F i g. 3 in both figures identical to the respective and 42 are at the inputs of a first AND

1.

Circuit 44 and the outputs of the OR circuits 41 and 43 at the inputs of another AND circuit 45 on. The AND circuits 44 and 45 are combined by an OR circuit 46, their output pulses by means of a further AND circuit 47 with a clock pulse, more precisely with the complement value of a clock pulse. The output of the AND circuit 47 delivers a parity pulse to terminal 48 and an imparity pulse to output terminal 49.

From the foregoing, it can be seen that those connected to the "even" row address lines OR circuit 40 is combined with OR circuit 42 for "odd" column address lines. The OR circuits 41 and 43 are also combined accordingly. This circuit is a Peculiarity of the exemplary embodiment described, in which according to FIG. 5 always an even number of signals on tracks 1 to 4 combined with an odd number of signals on tracks 5 to 8 and vice versa is. A person skilled in the art, including any, will be able to without changing the gist of the invention to make other appropriate combinations.

The illustrated validity checker 11 is only an evaluation circuit. The switching elements otherwise required for the usual validity check are, according to the invention, the diodes 35 of the two combined encryption and decryption matrices 10 Z and 10 SP. An advantage of the invention lies in the fact that the combined encryption or decryption matrices 10 Z and 10 SP are not only used for encryption or decryption, but are also components of a validity checker.

The row address lines 36O ₁ to _{36O 16} are known per se and are only shown schematically _{row drivers 63 t} to 63 _lfi and the column address lines 37O ₁ to 37O _{16 are connected} to the same column drivers 64j to 64 _1β , which are connected to row lines 6O ₁ to 60 _1β or column lines 6I ₁ to 6I _{16 of} a driver matrix generally designated 12 are in circuit connection. In front of the row or column drivers 63, 64, row and column allocators 62 Z and 62 SP are provided.

The row or column lines 60, 61 become functional elements 65 of the output device 1 for unencrypted singular information. Fig. 2a shows that each functional element 65 connected to the respective row or column lines 60, 61 via diodes 66 is.

In FIG. 2, only one functional element is shown, although 16x16 = 256 functional elements can be controlled with the illustrated driver matrix 12. All row and column drivers 63, 64 are connected to a working voltage of OV: OVTr via a bus 67. Ma of the control device 9 connected. If this working voltage is switched off, the entire driver matrix 12 is also switched off, so that no functional elements 65 can be controlled by it, even if address line pairs 360/370 that belong together should also be selected.

Each functional element 65 has an acknowledgment or Output contact 50, of which in FIG. 2, however, only 16 have been shown. All output contacts 50 are, like the code contacts 2O ₁ to 2O _{8, connected} to the bus line 23, which receives a signal voltage of 12 V from the control unit if necessary.

Each acknowledgment or output contact 50 of a functional element 65 is via two decoupling diodes 51, an allocator 52 and two connecting lines 53 to that row or column address line pair 360, 370 connected, by which the functional element 65 had been excited. The mode of action the acknowledgment or output contacts 50 will be explained later.

ao The operative connection between the functional elements 65 and the keys of the input keyboard can be different. For example, those from of the driver matrix 12 electrically controlled functional elements 65 at the same time mechanically with one each Key are connected, so that when the driver matrix is switched off, all functional elements 65 can be operated from a normal typewriter keyboard, with the respective output contacts 50 electrical signals on the associated line

ao or column address line pairs 360, 370, which are then applied to the encryption and decryption matrices 10Z and 10 SP , respectively. The singularly entered information into the keyboard 3 is then written with the typewriter and at the same time encrypted and output via the output device 5, for example to a strip punch.

The keys of the input device 3 can also be connected to the output contacts 50 in a suitable manner being. The input of the unencrypted information via the keyboard then takes place on the in the same way as previously described. The functional elements 65, however, are in this case no longer mechanically, but rather electrically controlled via the contacts 50. Of course, precautionary measures must be taken be made that the acknowledgment or output contacts 50 also switch properly, when the driver matrix 12 is electrically decrypted, previously entered encrypted into the input station 4 Information is controlled.

In Fig. 2 shows a further possibility of how information can be entered into the arrangement in unencrypted form via a keyboard. Key contacts 500 are connected to the bus line 23 and are connected to corresponding address line pairs 360, 370 via two diodes 510, a further allocator 520 and lines 530, similar to the acknowledgment contacts 50. There is no mechanical connection between the keys and the functional elements in this exemplary embodiment.

Within the punch 5 control pulses are known per se, but not of interest in relation to the present invention: Information end punch - IELo and finished message Lo

rather - FM Lo is generated and transmitted to control unit 9 via lines 102 103. In the simplest case, switching contacts can be used to generate the control pulses, which are actuated by the punch itself with each hole cycle and are internally assigned to a specific hole creation. With the control pulse: IELo sets the punch! of the offered information back because it is no longer needed. With the pulse FMLo new information is called up, if this is available, or the punch persists ii its starting position and waits for new information.
Typewriter on both sides are also be

r "

knew the control pulses, but also not of interest with regard to the invention: End of information driver matrix - IE Tr. Ma and typewriter ready message - FMSM generated. With IE Tr. Ma , the typewriter itself resets the information provided when it is no longer needed. This announces through FM SM that it is ready to process or retrieve new information.

The allocators 52 and 62 Z, 62 SP shown in FIG. 2 are indicated only schematically as a box, are designed in the manner of simple, per se known crossbar distributors, the lines of which can be arranged on both sides of insulating boards as printed or etched circuits. The required connections are then made using plug-in pins that can be repositioned at any time. The allocators can also be used in conjunction with plug-in cards or dog. Stopper boards are supplied, by means of which the pins can be set quickly according to a predetermined pattern.

According to the invention, the actual coding is practically predetermined by the allocators 52 and 62. Each piece of information that is fundamentally decoupled can be used by means of a pin each row or each column of the driver matrix 12 can be assigned. The J 6 row and column lines 60, 61 of the driver matrix 12 have fixed addresses in accordance with the bit code components (FIG. 5). However, depending on the code used, each piece of information can be assigned to a desired Part code can be assigned.

In the practice of the invention, allocators and decouplers form the encryption and a structural unit during decryption.

F i g. 3 shows a detailed plan of the control device 9 with switches, which are shown, for example, as flip-flops are, which in detail in connection with FIG. 4 will be explained. The power supply this switch as well as the power supply of all other switching elements of the invention takes place on known, manner not further explained here. The control unit 9 has 4 command buttons:

95, NS - do not write,

96, WS - Write again,

105, start punch and

106, stop hole punch

and, apart from terminal 74 K, for reset pulses, four input terminals for signals:

25 K, IEE - information input end,
100 K, IE Tr. Ma - End of information driver matrix,

102 K, IE Lo - information end hole punch and

103 K, FM Lo - Completion message punch open.

The following output terminals are available for sending signals:

78 K, UR - Information transfer register,

19 K, AR - information retrieval register,

32 K, 0 V - Encoder,

39 K, 22 V - decoder,

23Jt, 12 V - supply voltage for switches and contacts,

67 K, OV Tr. Ma - operating voltage driver matrix,

72 K, AL - retrieval hole punch and
109 K, AL - start-stop reader.

To exercise the control functions, eleven bistable switches are provided, all of them together with . the bistable switches in the register, can be supplied with reset pulses via a line 74. All bistable switches in the arrangement are normally flip-flops, the principle of which is shown in FIG is.

The input terminal 25 K for the signal IEE is connected directly to the control inputs of a first switching flip-flop 80 and a second switching flip-flop 86, the latter, however, by a signal

ίο is only being prepared by terminal 25 K for a switching process.

The control output of the first switching flip-flop 80 is applied directly to the output terminal 79 K and supplies the information retrieval pulses for the register flip-flops 73 to 73 ", whereas the reset output switches a clock generator 83, one output of which sends clock pulses to a bus 84 and outputs to the output terminal 78 K which information transfer pulses for the register flip-flops

»O 73, to 73g delivers. The other output of the clock generator 83 is connected to the reset input of the second switching flip-flop 86, which the Complement values of the clock pulses on a line 87 supplies.

5 The reset input of the first switching flip-flop 80 is acted upon via a signal line 81 with the signals: IE Lo * and a further signal line 88 with the signals: IE Tr. Ma *. The asterisk behind the signals means that they were created from the actual signals IE Lo or IE Tr. Ma by "deriving", ie by interposing another switching flip-flop.

The control voltages 0 V or 22 V for the combined encryption and decryption matrices 1OZ and 10 SP are generated by a voltage switch flip-flop 90, whose control output is connected to output terminal 32 K via a diode 91 and its reset output via a further diode 91 the output terminal 39 K is connected. The control input of the voltage switching flip-flop 90 is connected to the bus line 87 for the KonipUTnentwerte of the clock pulses and to a signal line 107 for the signal: Le Start * , whereas its reset input is connected to the signal line 88 for the signal: IE

♦ 5 drops Ma * is applied.

A signal voltage holder 92 lays over ^e: ne diode 91, a signal voltage of 12 V to the output terminal 54 to K. The control input of the switch 92 is signaled via the bus 87 from the complementary values of the clock pulses and the reset input via the signal lines 81 and 88 from the signals: IELo * or IETr. Ma * switched.

The switch 93 applies the working voltage: 0 Tr. Ma for the driver matrix 12 to the output terminal 97 K via a diode 91. The steep input receives the complementary values of the clock pulses via the bus 87 and via a signal line 9! the signal: WS *. The reset input is to a signal line 97 for the signal: NS * and to the Si |

Signal line 88 for the signal: IETr.Ma * connected.

The signal lines 97 and 98 are connected to the outputs of the switch 94 , whose control input fails directly from the key 95 with the B <: NS - NOT WRITE, and its return control input from the key 96 with the command: W - AGAIN WRITE is adjustable.

A switching flip-flop 99 supplies the signal: IET

Ma, *, It receives the signal directly from input terminal 100 K at its control input: IE Tr, Ma. - INFORMATION END TREtBERMATRIX, and clock pulses from bus 84 at its reset input

A third switching flip-flop 101 receives at its control input the signals WS * from the signal line 98, clock pulses from the bus 84 and signals IELo from the input terminal 102 K, the reset input is at the input terminal 103 K \ a for the signal: FMLo and connected to the signal line 88 for the signal: IE Tr. Ma. * . The control output delivers the impulses: ALo - REQUEST HOLE to the output terminal 72 K and the reset output the impulses: IE Lo * to the signal line 81.

A start-stop flip-flop 104 that can be set by the start button 105 and reset by the stop button 106 generates the signals: Le Start * for the signal line 107, which together with the signal line 81 at the control input of a fourth switching flip -Flops ao 108 is connected, the reset input of which is applied to the bus 84 for the clock pulses. The reset output generates the commands: start, stop reader, which is transmitted via the output terminal 109 K to the input device 4 for the encrypted information.

The reset inputs of the flip-flops 80, 86, 90 to 94, 99, 101, 104 and 108 are supplied with reset pulses via the bus 74, and the control inputs of the flip-flops 86 and 101 via the bus 84 with clock pulses, which are also supplied to the reset inputs of the flip-flops 99 and 108 are connected.

F i g. 4 shows a preferred a detailed circuit diagram,? Known flip-flops to n with its base drive PNP transistors, which is used in principle, both in the register 8 and the control unit. 9 The coupling resistors RKi and RK ₂ supply the transistors with bias voltage, whereas the coupling capacitors CK ₁ and CK ₂ serve to short-circuit the coupling resistors during the switching processes and thereby achieve the highest possible efficiency. The emitter resistance ER and the base resistances RB are connected to ⁴ 12 V. The emitter resistance can also be bridged by a capacitor, so that the transistors T ₁ and T ₂ achieve a high gain during the switching processes. The inputs are connected to circuit points A and B , with decoupling diodes D being provided. The control inputs are connected to the diodes D via input resistors RE and the other inputs via capacitors.

(n Fig. 5, finally, is a code table of a for example the coding used is shown. The filled in dots represent the implementation values that dots that are not filled in represent the complementary values 4 channels 5 to 8 to the column lines and the right 4 channels 1 to 4 to the row lines of the driver matrix 12 are assigned.

Through the allocators 52, 520; 62 SP and 62 Z can be assigned any information to the codes shown in FIG.

F i g. 3 also shows that the outputs of the GUIty tester via lines 48, 49 and decoupling diodes to the connecting lines between the switches of the buttons 105, 106 and the

Start-stop flip-flop 104 are connected.

- f

Mode of action

Before commissioning, a generally known Stelliropulse on line 74 brings all the flips-flops of the arrangement into their starting position, in which the signal voltage switch 92 sends a signal voltage of + 12 V to the code contacts 2O ₁ via the output terminal 23 K and the line 23 to 20 _{8 of} the input device 4 for encrypted information, which applies output or acknowledgment contacts _{50 1} to 50 _{le of} the functional elements 65 and the key switches 500

The desired operating state of the arrangement can then first be set using the keys 95 and 96, respectively prepare.

The switch actuated by the button 95 applies control potential in the form of the signal WS * to the signal line 88 via the changeover switch 94, through which the working voltage switch 93 is prepared for the driver matrix 12, the working potential of OV via the line 67 to the row drivers 63j bis 63 ₁₆ and the column drivers 64 _t to 64 ₁₆ on and off according to signals and clock pulses.

At the same time, the third switching flip-flop 101 is prepared via the signal line 98, which in accordance with clock pulses on the line 84 of the pulses: IELo. is set and, via the output terminal 72 K and the line 72, the output device 5 for the encrypted information is called up by the commands: A Lo . Since the clock pulses appearing on the line 84 are generated as a function of the signals IEE of the input device 4 for encrypted information (strip reader), this works directly on demand (IE Lo.) With the output device 5 (strip punch) for the encrypted information.

By pressing the button 96 the command: WS is given, which cancels the command: NS. The changeover switch 94 changes over and also changes over the operating voltage switch 93, whereupon the driver matrix 12 is switched on. As a result, the typewriter assumed, for example, as an output device is prepared for writing.

The start button 105 sets the start-stop flip-flop 104 , by means of which the fourth switching flip-flop 108 is prepared to feed the input device 4 (strip reader) for encrypted information via the line 109 in accordance with signals and clock pulses steer. The reset of the start-stop flip-flop 104 follows through the button 106. The switching of the start-stop flip-flop 104 can also take place via the lines 48, 49 from the validity checker.

At the same time, the voltage switch 90 is also prepared via the signal line 107 , which switches the combined encryption and decryption matrices 10Z or OK SP optionally as encryption and decryption units.

Without making any claim to completeness, the following three preferred modes of operation are intended the arrangement are explained. The first mode of operation is called serial mode. Here the information entered into the array by the strip reader is available on both the Typewriter written as well as in the output station for encrypted information in one Perforated tape.

The second mode of operation is used to write on the typewriter, and at the same time the written Information can be entered in the punched tape.

Finally, in the third operating mode, the strip reader works with the typewriter switched off directly with the hole punch.

Seri a! Operation

The keys 96 and 105 are printed. As previously explained, the working voltage switch 93 is located Working potential of 0 V to the driver stages 63 and 64 of the driver matrix 12. The signal voltage switch 92 applies 12 V signal voltage to line 23.

The voltage switch 90 does not yet apply one Voltage of 22 V as decoder voltage to line 39.

A start pulse is sent via line 1 (1) 9 to input device 4 for encrypted information. The strip reader begins to work, with a certain number of code contacts 20 to 20 _{M being} closed so that a signal potential of t 12V appears on the associated signal lines 24 to 24 _S and the associated column lines 31 to 31 _{K, which at the same time} is also applied to the Stellcingängcn of the corresponding register flip-flops.

From the signal potential 4 12 V on the signal lines 24, the OR circuit 22 is also excited, which via the line 25 with the signal IEE. sets both the first switching flip-flop 80 and the second switching flip-flop 86 in the control device 9. Initially, no polling pulse is emitted via the bus 79. Rather, the inherited switching flip-flop 80 sets the clock generator 83. which outputs clock information to line 84, which is also applied to the control inputs of Rcgister flip-flops 73 via bus line 78 for information transfer pulses. Those register flip-flops 73, whose control inputs were previously _{prepared via the column lines 31, to 31 H of} the matrices 10 Z, 10 SP by signals from the strip reader, now accept the information offered, whereupon the first information entered in encrypted form into the arrangement with i 12 V complementary to the implement and complement outputs of the mentioned register flip-flops 73 | to 73, _H is present.

The clock information on the bus 84 turns off the input device 4 for the encrypted information via the fourth switching flip-flop 108 and the output terminal 109 K. The clock information on the line 84 has no effect on the switching flip-flops 99 and 101.

The clock information on the line 84 also sets the / further switching flip-flop 86, which in turn generates the complementary responses of the clock information on the bus 87, which are sent to the control inputs of the voltage switch 90, the signal voltage switch 92 and the working voltage switch 91. The voltage switch 90 applies a voltage of + 22 V to the resistors 38 via the output bracket 39 K , whereby the combined encryption and decryption matrices 10Z and 10.SP are connected as decryptors. The signal voltage changeover switch 92 switches off the signal voltage.

The information taken over by the Kegister flip-flops 73 and offered complementarily with + 12 V to the matrices 1OZ, USP , which is now switched as a decoder, now leads to the selection of a corresponding

corresponding row lines 36 to 36, _β or 37, to 37, ₀ and the connected row or column address lines 360, to 360, ₀ or 370, to 370i ₆ , which are connected via the allocators 62 Z, 62 SP and an associated Row or column drivers 63 or 64 control a functional element 65 of the driver matrix 12.

In the event that the correct pair of line address lines 360 to 360 ₁₆ and 370 to 370, _{e was} mistakenly selected, the validity checker 11 responds. From the pulse that is then generated in connection with the complementary value of the clock information at the AND circuit 47, a parity or imparity pulse is derived at the terminals 48 and 49, which stops further processing of the transmitted information.

The activated functional element 65, for example an electromagnet in an electric typewriter, outputs the transmitted information. As a result of the excitation of the functional element 65, the associated acknowledgment or output contact 50 closes, whereby the same pair of row or column address lines 360, to 360 ,,; or 370, to 370, _(; what was selected for controlling the functional element 65 is addressed.

In the meantime, the information end pulse of the driver matrix IE Tr. Ma. - Has been generated, which appears at the input terminal 100 of the control unit 9 and sets the switching flip-flop 99, whereupon a pulse: IETr. Ma. * Is output to the signal line 88, which remains ineffective on the third switching flip-flop 101, but reaches the reset inputs of the first switching flip-flop 80, the voltage switch 90, the signal voltage switch 92 and the working voltage switch 93. These switches then accept their other switching command. The first switching flip-flop 80 sets the register flip-flops 73 to 73 _{S back} to their initial states via the line 79. The voltage switch 90 switches off the decoder voltage from H-22 V and applies a decoder voltage of 0V to the resistors 33.

The signal voltage switch 92 had applied the signal voltage again to the code contacts 20 to 20 _H and the acknowledgment or output contacts 50 in good time via the bus 2.4.

The operating voltage switch 93 blocks the driver matrix 12 via the line 97, so that the through the Acknowledgment or output contact c50 generated information cannot control the functional element 65 a second time.

The latter works by pressing the Quittungsbzw. Issue contact 50 as a sender.
It should be noted that the momentum IE Tr. Ma. appears quite early. The functional elements 65 of the typewriter work very slowly with regard to the rest of the data flow of the arrangement.

In addition, the arrangement is known per se, MiI-tcl not explained here in detail provided that both the main flow and the special working methods of the different F. and output devices to coordinate with each other.

Since there is a hold in the working voltage for

If the driver matrix prevents a functional element 65 from responding a second time, and the combined encryption and decryption matrices 10 Z or 10 SP are switched to: Encryption by the voltage switch 90, the activated function element 65 is activated via the acknowledgment or Output contact 50 encrypted information sent and offered at the control inputs of the corresponding register flip-flops 73 _t to 73 ₈ .

The information encrypted in this way is also available via the signal lines IA ₁ to 24 ₈ at the inputs of the OR circuit 22, which in turn emits a signal IE E via the signal line 25 which, in the manner already explained, the first switching flip-flop 80 and the second sonic flip-flop 86 sets.

The clock information on the bus 84 derived from this in the manner explained above takes over the information offered on the column lines 31 to 31 _{H of} the combined encryptors or decryptor matrices 10Z, 30SP into the register flip-flops 7S ₁ to 73 _K. Now, after the signal IE Tr. Ma. at the terminal 100 K a signal had previously reached the third switching flip-flop 101, the clock information on the bus 84 the third switching flip-flop 101 in such a way that the output device 5 for the encrypted information is called up via the line 72 . In detail, there is the signal appearing on line 72: ALo. at the second inputs of the AND circuits 71, at the other inputs of which the information generated by the register flip-flops73 is offered. In the embodiment described, the output device 5 is a strip picker which processes the information offered.

It must also be mentioned that in the serial area the punch is already started when dii: typewriter the output of the information by the functional element 65 is not yet completely finished. Without changing the essence of the invention, a person skilled in the art will be able to determine the individual operating speeds to coordinate the stations with one another by means known per se.

After the information processing, the output device 5 generates the information end pulse: IE Lo., Which reaches the control input of the third switching flip-flop 101 via the input terminal 102 of the control device. This outputs a pulse to the signal line 81: IELo * , which is sent simultaneously to the reset inputs of the signal voltage switch 92, the first. Scha! T-Flin-Flops80 and to the control input of the fourth switching flip-flop 108 is applied.

The first switching flip-flop 80 switches off the registers flip-flops 73 to 73 _S via the bus 79 and switches the signal voltage of 12 V on the line 23 on again via the signal voltage switch 92.

The fourth switching flip-flop 108 stell! over the line 109 the input device 4 again, so that the next information in the manner described can be taken over from the patrol camp. This retrieval operation is repeated as long as information are offered in the strip store or until the arrangement is switched off by the buttons 95 or 106 will.

If the information processing of the output device 1 and the output device 5 falls into the Dead time of a transmission cycle of the input device 4, the latter runs practically in free run.

If the read cycle of the input device 4 is exceeded, the information acknowledged as a stop comes into play and the signal: IE Ln starts the. Input device 4 again.

Schrcib operation

In this operating mode, only the button 96 is pressed.

By pressing a key ih on the input keyboard According to FIG. 2, one of the switches 500 is actuated, which signal potential is equal to 12V from line 23 through diodes 510, one

5 allocates 520 and lines 530 to a pair of row or column address lines 360, to 360, _r and 370, to 370, _H , respectively. As a result, a functional element 65 in the driver matrix 12 is selected in the manner described above. The controlled radio

ao tionelement65 carries out the output of the »ingularly keyed in Information durcii.

If necessary, an OR circuit can be connected behind the switches 500 on the keyboard, which, in a manner analogous to the OR circuit 22 in FIG

as input device 4, to the first switching flip-flop 80 acts.

When inputting through the switch 500 of the keyboard, the associated acknowledgment or output contact 50 closes after the activated functional element 65 has been activated, which in turn causes the same pair of row or column address lines 360 to 360, via the decoupling keys 51 and the allocator 52. , or 370, to 370, _(; what is addressed is what was selected from the keyboard.

Through the information end pulse of the driver matrix - IE - Tr. Ma. - Corresponding switching processes, as described above, are initiated so that the information sent by the acknowledgment or output contact 50 of the energized functional element 65 is transferred to the register and output by the output station 5.

This output happens so quickly in comparison to the working of the typewriter that in normal Typing speed the new information can be entered on the typewriter keyboard can.

For safety reasons, however, a signal system can be provided which, through the impulse:

IE Lo. is energized, and indicates to the operator when the punch is ready to receive further information.

Direct operation
between punch - reader

With the arrangement according to the invention, only one output operation of the encrypted input is intended Information is carried out through the strip punch, the two buttons 95 and 105 are pressed. The driver matrix 12 and thus the output device 1 for the unencrypted information is therefore without work voltage and thus canceled.

The signals offered by the input device 4 for encrypted information are applied via the signal lines 24 to 24 _H to the signal inputs of the register flip-flops 73 to 73 ₈ and are sent by these to the AND circuits 71 to 7I _{8 of} the

I 774 283

evarrichtung 5 forwarded. The punch is called up by an A Lo on the line 11. This generates the previously erm pulses which cause the j information to be called up from the strip reader

Window readers and strip punchers therefore work together in the company.

By the command; WS of key 96 is ei before given command; NS canceled and S operation starts again.

Speaks when transmitting information Ut

j row or column address lines 360 or respectively

the validator 11, it becomes a

for the entire information transfer

derived from the arrangement.

For this purpose 2 sheets of drawings

Claims (8)

Patent claims: 1. Arrangement between input and output devices of data processing systems for encryption and decryption as well as for the transmission of information in the retrieval mode using register, diode-equipped matrix or zaordnerschaltungen known, bistable stages, characterized in that the implementation outputs (73 ' ) the bistable stages (73) of the register (8) with the interposition of AND circuits (71) for polling pulses are connected to the output terminals (70) for encrypted information and the implement and complement outputs (73 ', 73K) of the bistable stages ( 73) are connected to column line pairs (30, 31) of two identical, combined encryption and decryption matrices (10 Z, IO SP), the row lines (36, 37) of which via row and column address lines (360 or 370) and allocators (62 Z, 62 SP) the row and column lines (60 and 61) of a driver matrix (12) for functional elements (65) for outputting unencrypted information control functions that a row and column address line pair (360, 370) each via an assigner (520) to a key contact (500) of an input keyboard for unencrypted information and / or via an assigner (52) to an output contact (50) each of a functional element ( 65) unencrypted to the output information is in circuit communication that the control inputs (735) of the bisabilen stages (73) of the register (8) connected to the Implementausgänge (73 ¹⁾ Spallenleitungen (31) of the combined supply and Entsciilüsselungsmatrizen (1OZ and 10 5P) are connected to code contacts (2Oi to 20 _H ) of the input device (4) for encrypted information, and that a control device (9) is provided which, in addition to keys (95, 96, 105, 106) as a function of the encrypted or unencrypted information passing through the input and output devices (4, 5, 12) can be switched and each time the next encrypted information is called up. 2. Arrangement according to claim 1, characterized in that the bistable stages (73) of the register (8) are flip-flops, and that a decoupling diode (76) is provided between each control input (73 S) and the associated Implcmcntingang (73 /) is. 3. Arrangement according to claims 1 and 2, characterized in that the control inputs (73 S) of the Registcr-FIip-flops (73) are additionally connected via a bus (78) for information transfer pulses to the control unit (9). 4. Arrangement according to claims 1 to 3, characterized in that the reset inputs (73 R) of the register flip-flops (73) except to a bus line (74) for reset pulses also via a bus line (79) for information retrieval pulses to the control unit (9) are connected. 5. Arrangement according to claim 1, characterized in that the row lines (36, 37) of the both combined encryption and decryption mairizen (U) Z and JO SP) via resistors (38) and a bus line (39) to the one (22 V), and the column lines (30, 31) via resistors (33) and another bus line (32) to the other (0 V) output of a voltage switch (90) in the control device (9) are connected, which can be switched over in accordance with the input of encrypted information and the output of unencrypted information. 6. Arrangement according to claims 1 to 5, characterized in that the output contacts (50) of the functional elements (65), the key contacts (500) of the input keyboard for unencrypted Information and the code contacts (20) of the input device (4) for encrypted information Via a common bus line (23) to a signal voltage switch (92) in the Control device (9) can be connected, each depending on the input unencrypted or encrypted information can be switched. 7. Arrangement according to claims 1 to 6, characterized in that all row or column _{drivers (63 T} to 63 _1ι; or 64, to 64 ₁₆ ) of the driver matrix (12) via a bus line (67) to ekien work voltage switch ( 93) are connected in the control unit (9), which can be switched depending on the input of unencrypted information and a key command (WS - WRITE AGAIN) or depending on the output of unencrypted information or a key command (NS - DO NOT WRITE). 8. Arrangement according to claims I to 7, characterized in that the input device (4) for the encrypted and the output device (5, 12) for the encrypted and unencrypted information elements (22) for sensing an information throughput, whose output signals (IEE, IELo and IE TrMa) are connected to the digit inputs of switching flip-flops (80, 99, 101) in the control unit (9), which in turn are connected via the voltage switch (90), the signal voltage switch (92) or the working voltage switch (93) control the retrieval operation of the arrangement.