DE1590704A1 - Process for the production of miniaturized circuits - Google Patents

Description

"Method of making miniaturized circuits" The invention relates to a process for the production of miniaturized circuits, such as module Micromodule or integrated circuits, especially for the production of passive ones Components and the interconnects connecting the components.

The invention consists in such a method that the Resistance insulation layers or interconnect layers forming the components and interconnects deposited chemically or electrochemically on a substrate.

The invention was based on the object of applying insulation layers, interconnect> resistance layers to a substrate. Previously, such coatings were par- "the resistance and Leitbahnschichten particular to a substrate using the known mask technique deposited or applied by means of screen printing. The apparatuses for said evaporation method are very expensive and complicated, since a Hochvakuumsaufdampf- plant with various auxiliary equipment must be available. in screen printing, the required close tolerances can not be maintained, so that further treatment with sandblasting for matching of the resistors is required especially in the resistance layers.

The method according to the invention is particularly suitable for the production of module, micromodule or thin-film circuits or for integrated semiconductor circuits. In thin-film technology , for example, passive switching elements such as resistors and capacitors have been vapor-deposited onto a ceramic plate. The individual components are linked to form a circuit by means of interconnects that are also vapor-deposited. In the case of integrated semiconductor circuits , resistance layers are also vapor-deposited onto the oxide layer covering the semiconductor body , which layers are then connected to a circuit with interconnects with the other components alloyed or diffused into the semiconductor body.

The main difficulty in the chemical deposition of the materials mentioned was the poor adhesive strength that these layers had on the substrate, for example on a ceramic plate or an oxide layer , in tests. This difficulty could be eliminated by suitable pretreatment of the substrate for the layers to be chemically deposited. In addition, the base was provided with a noble metal layer serving as a catalyst during the chemical deposition . In order to increase the adhesive strength in the method according to the invention, the substrate mJ1 serving as a base is roughened with the aid of an etching treatment. A wide variety of acids can be used for this purpose, depending on the material to be treated. After this acid pretreatment, the substrate is immersed in one or more metal salt solutions to deposit the catalyst layer. Examples play as the ceramic or semiconductor wafer can first be dipped in platinum chloride in tin chloride and thereafter. A platinum layer, only a few atomic layers thick, is deposited on the substrate and serves as a catalyst in the further chemical or electrochemical layer deposition. There are various possibilities for chemical or electrochemical layer deposition. It may be covered with a resist mask, having openings only at the locations at which the electrical resistance, insulation or Leitbahamaterial is to be deposited by the action of the exposed there catalyst layer once a substrate. On this first, selectively applied layer, further layers, as is necessary for the production of capacitors , can also be deposited chemically or electrochemically.

Another possibility is that an entire surface side of the substrate is provided with a first layer, for example with a resistive layer, to which a lacquer mask is then applied, with the aid of which the layer material is removed again at the points provided for this purpose. The acid used as an etching agent breaks down the resistance material at the points where the lacquer layer is cut out, while the parts of the resistive layer covered by the lacquer are not attacked by the acid. The process described here can be repeated as often as required to deposit further layers . In a third method , all of the required layers are applied one above the other in a specific order to an entire surface side of the substrate. To this end, therefore, no masks are used. To work out the components and their interconnects from this layer sequence, this is then each provided with a mask and treated with a specific etchant that only attacks a specific layer. This removes parts of the top and last layer that was applied. This process is repeated according to the number of layers until the circuit consisting of resistors, capacitors and interconnects is completely etched out of the layer sequence.

The invention is explained in more detail using an exemplary embodiment. FIG. 1 shows in cross section a substrate 1, for example a ceramic plate, on one surface side of which layers 2, 3, 4 and 5 are deposited chemically or electrochemically one after the other. First, however, this surface is roughened in an acid building and then covered with a catalyst layer that is only a few atomic layers thick , for example made of platinum. The lowest, then applied layer 2 consists, for example, of nickel and serves as a resistance layer. The nickel layer is deposited from a nickel bath that hypophosphite example, Nickelchlrid, triethanolamine, sodium carbonate, sodium hydroxide and is composed of n-amyl alcohol together. After a few minutes, a nickel layer a few hundred times thick has deposited on the substrate surface. Next, the layer 3 of conductive material is deposited on the substrate surface. For this purpose, for example, copper is applied to the nickel layer from an aqueous solution.

An insulation material is applied as the third layer 4, which in the case of capacitors takes on the task of the dielectric. For this purpose, the insulation material, for example silicon dioxide in the form of colloids or crystals, is suspended in alcohol, acetone or in another suitable liquid. The colloids and crystal pebbles surround themselves in the liquid with ions, for example with OH ions, and thereby lose their electrical neutrality. When an appropriately polarized voltage is applied, the electrically charged particles migrate to the previously deposited copper layer used as an electrode and form a cohesive insulating layer on it. Finally, another interconnect layer 5, for example again made of copper, is also deposited on the insulating layer 4 from an aqueous solution. Figure 2 shows in plan view and Figure 3 in section the finished RC element consisting of a resistor 6 and a capacitor 7 as well as the Leitbahnteilen 8, 9 and 1o together continues. To create this circuit, different parts of the 4 layers have to be removed again. The portions of the copper layer 5 are etched using a mask, for example, with nitric acid. This copper layer only remains in the area of the capacitor 7 and the contact connection 9, while it is removed over the entire remaining surface. The insulating layer 4 is also let nur.im capacitor region bought and serves as a dielectric, the remaining portion is removed with a silicon dioxide layer with a micro research of hydrofluoric acid and ammonium fluoride. Parts of the second copper layer 3 are most advantageously removed electrolytically with chromic acid and this layer may not be etched away only in the capacitor area and at the points 8, 9 and 10 provided for the interconnects and connection elements. At the end, the nickel layer 2 is removed to such an extent that a resistance track 6 remains with the desired dimensions and the required resistance value. The nickel coating to be removed is again removed using a mask at the intended locations, for example with diluted nitric acid. A resistor 6, a capacitor 7, the connection 8 of these two components and the connection points 9 and 10 of the RC element thus remain on the substrate 1. The procedure described here can of course be varied . For example, instead of the materials mentioned, it is possible to chemically deposit other suitable metals and insulating materials on a substrate and then partially remove them again using suitable acids or other etching processes. The baths from which the various substances are applied to the substrate can also be adapted to the respective requirements by means of suitable additives and by varying the solution concentration.

Claims (2)

Patent claims 1) Process for the production of miniaturized circuits, such as module, micro-module or integrated circuits, in particular for the production of passive components and the interconnects connecting the components, characterized in that the resistance, insulation or interconnect layers forming the components and interconnects deposited chemically or electrochemically on a substrate. 2) Method according to claim 1, characterized in that the layers forming the components and interconnects are selectively deposited chemically or electrochemically on the substrate using lacquer masks. 3) Method according to claim 1, characterized in that first the substrate is covered with one of the intended layers and then provided with a lacquer mask; which leaves openings at the points where the layer can be removed again, for example by etching, and all other layers are brought in and partially removed again with the help of the same process. 4) Method according to claim 1, characterized in that all the necessary layers are deposited without the use of masks in succession on the substrate, and that various masks then successively be applied through the openings using a respective appropriate etchant, the desired portions of one or meh - Several layers can be removed again. 5) Method according to one of the preceding claims, characterized in that th prior to the chemical deposition of the Schich- the substrate surface is pretreated by examples, will play as roughened by etchant and subsequently provided with a dienen- in layer deposition as the catalyst the noble metal layer . 6) Method according to claim 5, characterized in that " the noble metal layer is only a few atomic layers thick and consists of platinum. 7) Method according to claim 5 and 6, characterized in that for applying the noble metal layer the substrate is initially in tin chloride and then connected 8) the method according to claim 1, characterized in that the insulating material is introduced in the form of colloids or crystals in a liquid for deposition of the insulating layer in which the particles are cases with a ion is immersed overall in platinum chloride. surrounded, so that when a voltage loid- the piston or crystal particles are separated off at the substrate surface and form a continuous insulating layer. 9) method according to claim 8, characterized in that the liquid of alcohol or acetone is. 1o) method according to claim 4, characterized in that one layer of nickel, one layer of copper, is applied to the substrate one after the other Silicon dioxide and again copper is applied, and that parts of one or more layers are removed again from this layer sequence, depending on the required circuit, with the aid of suitable etching agents. 11) The method of claim 1o, characterized in that parts of the last-applied layer of copper with nitric acid peter, parts of the silicon dioxide with hydrofluoric acid containing ammonium fluoride, the parts of the Si02 layer @ iö @ tp! 'ossohi @ t oloctrolytic with chromic acid # y @ e Zs A1r gmerat a * lSebraobton Niokolsohiaht mit t öal, pefarsö # a has been replaced. .