DE1221275B - Pulse generator for single square-wave pulses with positive and negative half-wave - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

IntCI .:

H03k

German class: 21 al - 36/02

Number: 1221275

File number: St 22482 VIII a / 21 al

Filing date: August 1, 1964

Opening day: July 21, 1966

The invention relates to a pulse generator for square-wave pulses, which when driven with a single square pulse emits a pair of pulses, the first pulse of which has one polarity and the one other pulse has the other polarity and where the magnitudes of the amplitudes and the duration the impulses are the same.

Often it is required that DC voltage pulses for registration purposes over longer lines are to be transferred, which may still be completed by the transferor. Should the cutoff frequency of the transmission path can be used with as little effort as possible, then the individual impulses must have a sinusoidal character and, in addition to the positive half-wave, also have an equally large negative half-wave. To generate single pulses with a sinusoidal character, which also start in the zero passage and also stop there again, is only with great effort possible.

It is therefore more beneficial to generate individual square-wave pulses with the same basic frequency and those in them to let out the contained fundamental wave through the transmitter and transmission path, whereby something higher power losses arise. A pulse generator for single square-wave pulses, which can both generates a positive as well as a subsequent negative half-wave (or vice versa), is the subject of the invention.

In contrast to known generators, the shape and duration of the output pulses are largely different regardless of the type of load and insensitive to load fluctuations. the Control takes place via a square pulse. There is a transformer in the output of the generator, the termination and symmetry conditions for adaptation to the existing transmission lines creates.

The invention is characterized in that two monostable multivibrators are provided, in which the timing element of the first flip-flop is charged by the input pulses, whereby this flip-flop gets into the unstable state, and that during the idle time of the first Flip-flop the timer of the second flip-flop is charged and that immediately after the end of the unstable state of the first flip-flop the second flip-flop in the unstable State and that with the outputs of the flip-flops the two primary windings one Push-pull transformer are connected, on whose secondary winding the output signals can be removed.

Pulse generator for single square-wave pulses
with positive and negative half-wave

Applicant:

Standard Elektrik Lorenz Aktiengesellschaft,
Stuttgart-Zuffenhausen, Hellmuth-Hirth-Str. 42

Named as inventor:

Hans-Η. Niediek, Stuttgart-Zuffenhausen

The structure and function of the generator is explained below with reference to the drawing will.

F i g. 1 shows the desired curve 1 of the voltage Ua over time t. In the same diagram, the curve 2 of the generated voltage Ua is shown over time t . Both pulses consist of a half-wave I of duration τ 1, amplitude U1 and a half-wave Π of duration τ 2 and amplitude U 2.

It is required that τΐ = τ2 and Ul = U2 .

Fig. 2 shows the circuit of the pulse generator according to the invention. Only the battery voltage + UB is required for the energy supply. In the example shown, npn silicon transistors, silicon diodes and Zener diodes were used on semiconductors. In the idle state, the transistors T1 and Γ 2 are conductive, the transistors Γ 3 and Γ 4 are blocked. The input pulse JE arrives in a differentiated form via the capacitor Cl, the resistor R1 and the diode Dl to the connection between the resistor R 3 and the diode D 3 and thus to the base of the transistor Tl and blocks it. The base of the transistor T 4 thus receives a positive potential via the resistor R 4 and the diode DS , and the transistor Γ 4 becomes conductive. The substantially across the transformer winding flowing collector current generated in the secondary winding of the first half wave I. The length of this half-wave is dependent on the dimensioning of the differentiating circuit of the capacitor Cl and resistor Rl.

At the beginning of the first half cycle, the capacitor C 2 is simultaneously reloaded via resistor R 4 and diode D 9 to the potential existing between the voltage + UB and the emitter of the transistor T 4.

609 590/340

This reloading is completed by the end of the first half-wave. If the transistor Tl becomes conductive again, the transistor Γ2 is blocked by the charge stored in the capacitor C2. This blocking time depends on the time constants resulting from the capacitor C 2 and the resistor R 2. During this time, the diode D 4 is conductive and the diode D 9 is blocked. As long as the transistor Γ 2 is blocked, the transistor Γ 3 is conductive and generates the second half-wave with its collector current in the transformer Ü.

Inadmissibly high induction peaks are kept away from the collectors of transistors Γ 3 and Γ 4 by means of diodes D 7 and D 8 in conjunction with Zener diode D 6. The induction tips are. thereby limited to the voltage that results from the sum of the operating voltage + UB and the Zener voltage of the diode D 6 .

With a suitable design of the circuit, in particular the resistor R 4, the diodes ao D 4 and D 9 can be saved, the capacitor C 2 is then to be connected directly to the connection point of the resistor R 2 and the diode D 2.

The timing element consisting of the capacitor C 3 and the resistor R 7 influences the shape of the pulse and in particular prevents the formation of a staircase between the two half-waves. The capacitor C 4 prevents the circuit from oscillating after the end of the second half-cycle. The resistors9 and RIO are necessary for damping and adjustment reasons.

In order to achieve a reliable blocking of the transistors 3 and Γ 4, the emitters of these transistors through the Zener diode D 10 in connection with the resistor R 8 in comparison to the transistors T1 and Γ2 is supplied with a more positive potential.

. This potential is used at the same time as the blocking potential for the diodes D 4 and D 9 .

With suitable dimensioning of the timing elements connected upstream of the transistors T1 and Γ 2, both half-waves can be made the same size.

In a built pulse generator according to the invention, the function of the pulse generator essential components have the following values:

Rl 22kOhm

R2 33kOhm

Rl lkOhm

R9 ... 2.2kOhm

AlO 4.7 kOhm

Cl 5OnF

C2 25 nF

C3 1.2 nF

C4 150 pF

τΐ 0.5 ms

t2 0.5 ms

Claims (4)

Patent claims: 1. Pulse generator for square-wave pulses, which emits a pair of pulses when controlled with a single square-wave pulse, the first pulse of which has one polarity and the other pulse has the other polarity and the magnitudes of the amplitudes and the duration of the pulses are the same, characterized in that two monostable flip-flops (Tl, Γ4 and Γ2, Γ3) are provided, in which the timing element (C 1, R 1) of the first flip-flop is charged by the input pulses (JE) , whereby this flip-flop comes into the unstable state, and that during the The time of the first flip-flop the timing element (C2, R2) of the second flip-flop is charged and that immediately after the end of the unstable state of the first flip-flop the second flip-flop goes into the unstable state and that the two primary windings of a push-pull transformer are connected to the outputs of the flip-flops , at the secondary winding of which the output signals can be removed . 2. Pulse generator according to claim 1, characterized in that the two transistors of the monostable multivibrators switched as inverters and directly connected to one another are. 3. Pulse generator according to claim 2, characterized in that a series connection of a capacitor (C 3) and a resistor (i? 7) between the base and the collector of the first transistor (T 2) the second flip-flop is provided. 4. Pulse generator according to claim 3, characterized in that a capacitor (C 4) is provided to prevent the overshoot over the zero position between the base and the collector of the first transistor (Tl) of the first flip-flop. 1 sheet of drawings 609 590/340 7.66 © Bundesdruckerei Berlin