DE1166253B - Switching arrangement for generating a strictly linear saw tooth tension - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Boarding school Class: H 03 k

German class: 21 al -36/02

Number: 1 166 253

File number: F 35406 VIII a / 21 al

Filing date: November 23, 1961

Opening day: March 26, 1964

The invention relates to the generation of a strictly linear sawtooth voltage.

A well-known sawtooth voltage generator is the Miller integrator. The Miller integrator was before when the transistor became known and essentially existed in its original form from an electron tube (usually a pentode) with an ohmic anode load, a between its anode and its control grid and a capacitor connected between the control grid and a positive grid voltage source switched resistor.

When such a circuit is switched on, current flows into the capacitor connected to the control grid. The size of this capacitance, however, depends on the gain of the tube circuit and can be expressed by («+ 1) C, where μ is the gain of the circuit and C is the total anode control grid capacitance.

If the gain factor //, the capacitance C and the resistor in series with the control grid may have suitable values the time constant of the circuit can easily be designed so that only an initial fraction the exponential drop in the anode voltage for the desired purpose of sawtooth generation needs to be used. The circuit can be designed to be at the end of a chosen one initial fraction of the exponential decay becomes "saturated".

Miller integrators have also been developed which use a transistor in place of the tube will.

In both the tube and transistor circuits of the Miller integrator, the initial, practically linearly decreasing curve of the voltage but not yet for many purposes sufficient linearity.

It is an object of the invention to provide an improved Miller integrator using a Transistor in which, however, any exponential component in the course of the output voltage is avoided with which a strictly linear sawtooth voltage is achieved.

In the circuit arrangement according to the invention for generating a strictly linear sawtooth voltage, it is assumed that a transistor is used, between whose collector and base a capacitor is connected, which is charged via a charging circuit from an operating current source, and whose base circuit contains a resistor via which the Base current is supplied, so that on the KoI circuitry to generate a strictly
linear sawtooth voltage

Applicant:

Ferguson Radio Corporation Limited, London

Representative:

Dr.-Ing. E. Liebau, patent attorney,

Göggingen via Augsburg, v.-Eichendorff-Str. 10

Named as inventor:

John Victor Corney, London

Claimed priority:

Great Britain 23 November 1960 (40 310)

A voltage change is generated by the detector electrode. According to the invention, a switching element is provided in the charging circuit of the capacitor, which separates the collector electrode of the transistor from the operating current source, so that the capacitor acts as the sole current source for the collector current and there is a linear change in the collector voltage. In contrast to the conventional transistor equivalent of the Miller integrator, no resistance is therefore traversed by the collector current during the generation of the linear voltage change. Furthermore, the collector current source is isolated from the collector during the generation of the linear voltage change, so that the collector current is only drawn from the capacitor and a further capacitor connected to the collector during this time. If only the first-mentioned capacitor is connected to the collector electrode of the transistor and if in the circuit through which the working or operating current is supplied to the base, the resistor R in series connection is formed solely or only partially by the internal resistance of the current source, it can be shown that the speed at which the voltage of the collector electrode changes is equal to (-V ₁ ZR) (a / C) , where V _{1 is} the voltage of this current source, α is the current gain of the transistor and C is the capacitance of the capacitor. Hence the change in collector voltage is linear until the circuit saturates, provided α is of the

409 540/462

Collector voltage constant down to saturation voltage.

The invention is described with reference to the drawings, namely FIG

F i g. 1 is a circuit diagram of a device for generating a strictly linear voltage change, F i g. 2 is an explanatory waveform diagram;

F i g. 3 a circuit diagram of a further device for generating a linear voltage change,

Emitter forward voltage, which is usually 0.1 volts, is neglected, the current flowing through resistor 16 is V ₁ IR, where R is the magnitude of resistor 16.

The base current in transistor 10 results in an emitter current i _e and a collector current a · / ,,, where «is the current gain of the transistor.

As mentioned, the one now marked with «/ ,, Collector current taken from the capacitor 15,

4 shows a circuit diagram of a device for generating io so that it flows through the rectifier 13. Of the a linear voltage change from a fixed drop in the forward voltage due to the DC

Duration. starting at a certain point in time after the delivery of a trigger pulse to the device, and

Fig. 5 is an explanatory waveform diagram.

In the various figures, the same reference numbers denote the same parts.

In the case of the one shown in FIG. 1 is a circuit diagram of an npn transistor 10 with its collector via a rectifier 13 is essentially equal to the drop in base-emitter forward voltage in the transistor, see above that at the rectifier 14 there is essentially a voltage difference of zero and this therefore not directs.

The current flowing into the base of the transistor is (1 - ") / <" and this current, together with the current flowing into the capacitor 15, forms aL

converter 11 is connected to a terminal 12, while 20 the current flowing through the resistor 16.

its emitter is grounded. There are two rectifiers 13 between the base and the emitter of the transistor and 14 connected in series and arranged so that their forward directions are the same as those of the

thats why

(D

The speed of change in the chip

Base-emitter junction of the transistor. Forcing the collector electrode as a result of the discharge

of capacitor C is - a I ₁ JC, where C is the capacitance of capacitor 15.

From equation (I) it follows

-Hi ₁ JC- = (.-V ₁ ZR) (,, / C).

Therefore the voltage drop at the collector electrode is not exponential, but strictly linear, if «remains constant, which is the case when the collector voltage drops to the saturation level.

see the collector of transistor 10 and the the
a capacitor 15 is connected to both rectifiers 13 and 14,
while a resistor 16 between a terminal
17 and the base of the transistor is connected. A 30
Control generator 18 in the form of a flip-flop circuit
is with its two output lines on which
Impulses of opposite polarity occur,
connected to the terminal 12 or 17, while a
Control pulse input terminal 19 is connected to the control generator 18 35. This linear drop is connected by curve 23 in FIG. and the duration t of the + V _{drop is 2} volts

In operation, when the circuit is at zero (VJV ₁ ) (CRId) seconds. Therefore, when V ₁ = V. ,, the time t = CRIa seconds, the flip-flop circuit is idle. Output voltage of + V ,, volts to terminal 12, the time t is essentially independent of changes between transistors, while the voltage at terminal 17 is essentially independent, since the borrowed value is 0 volts. When a control pulse from a transistor to the other of the same type occurs at terminal 19, the flip-flop switch is only slightly changed.

device 18 triggered, which has the consequence that the span- The initial conditions are restored,

The voltage at terminal 12 is essentially zero when terminal 17 is grounded and the terminal is lowered while the voltage at 45 12 is brought back to the voltage -i- F., volts. Terminal 17 rises to + V ₁ volt. The capacitor 15 is then charged again via the

The control pulse and the changes in diodes 11 and 14 occur. The diode 13 prevents this Voltage at terminals 17 and 12 are due to the flow of base current in the transistor as a result of the Curves 20, 21 and 22 in FIG. 2 shown. Recharging the capacitor and avoids

Condensate 50 therefore the strong collector current that is otherwise in the transistor would flow.

The circuit shown in FIG. 3 has two modifications compared to the circuit according to FIG. Firstly, the diode 11 in Fig. 1 is replaced by the strong charging current of the capacitor 15 not 55 transistor 11 ', which, as shown, is connected with its base through the base-emitter junction of the Tran base to the terminal 12, whose Emitsistor 10. At the collector there is a voltage of
-t- F., volts when the capacitor 15 is fully charged

During the idle state, the sator 15 is charged by the current flowing from the Flip-flop circuit 18 through rectifier 11, capacitor 15 and rectifier 14 to earth flows. As a result of the arrangement of the rectifier 14

ter is connected to the collector of transistor 10 and its collector to another terminal

loading is. 12 'is connected to which a voltage of min-

When the voltage at terminal 12 is at zero 60 at least + V, volts is applied. Second, if a drops and the voltage at terminal 17 rises to + V _x second capacitor 24 between the collector and volts, the rectifier 11 is switched non-conductive to the emitter of transistor 10, so that the collector of transistor 10 is made by transistor 11 'acts as a switch between the

the power source 18 is disconnected. The only current collector electrode of transistor 10 and the The source for the collector current is therefore the condenser 65 terminal 12 'and is generated by the flip-flop circuit sator 15, which begins to discharge. 18 controlled.

Current flows from terminal 17 via the resistor. In operation, the Kolstand is during the drop 16 into the circuit. When the drop in the base- lector voltage, the collector current of the transistor

5 6

10 of the two capacitors 15 and 24 pass through with the transistors 10, 10 'and 10 "

took. If their capacitance is C ₁ or C ₂ , the transistor 11 'can be controlled as in FIG.

it can be shown that the current in the capacitor This transistor is in turn driven by the tran-

15 the size sistor 35 in connection with the transistor 31 a

(C r //.,) ■ '(C -f C) ^{5 and} switched off, so that the latter two trans-

^{1 1} ' sistors with their associated switching elements

and the current in the capacitor 24 has the value of the control generator 18 according to FIG. 3 form.

(C 'M (C -L c Λ ^ in transistor 42 as an emitter follower circuit ^{li "y / l1' -;} acts, is has its base connected to the collector of the duration T of the linear drop of the collector-io transistor 31st connected, and when the latter is saturated, the emitter voltage of the transistor is

(V IV ^ R [(CI \ '(CI ' Vl ^ 2 essentially - ν volts. The emitter of the tran-

(VJ ν ^ ₁ jk Za) -r (^ μη, _sistors ^. ^ "^ _{Resistors 43> 44 and 45 with the}

where β = u / (I - α). When V ₁ = V ₀ , the base electrodes of the transistors 10, 10 'and 10 " t = R \ (CI ) -J- (C / ti)] ^{15 are} connected. Therefore, when the transistor 31 is ¹ ' a PJ saturates and the emitter of transistor 42 has a span-If α is now between 0.1 and 1, C ₂ can have voltage of - ν volts, the transistors 10,10 'and the same order of magnitude as C ₁ and about 10 "no base current supplied. When the transistor let the same current through. Its value and 31 is saturated, the transistor 35 is switched off but its presence has only a slight effect on the time t, since C ₂ / β in comparison 11 'is essentially - V volts so that the condensation at C ₁ Ia is small. In the switching arrangement shown in FIG. 4, diodes 14, 14 'and 14 "are charged to a voltage of three generators from the one shown in FIG. 3 (Fv) are, while the collector used provided kind with 10,10 'and 10 "25 loading gates of the transistors 10,10' and 10" on - are distinguished V volts. The job of the circuit is to be kept at. As can be seen, further a control pulse a linearly changing output capacitors 46 to 51 are also charged to - (V - v) volts output voltage, starting with a certain time - via resistors 52-51, period, to supply and then the output voltage Die Input terminal 19 is connected to the base of a transistor 58 on transistor 58 for yet another specific period of time, the waveform maintaining the value reached at the end of the linear change applied to input terminal 19 control signals. as at 41 in FIG. 5 is shown. A diode 59 is

An npn transistor 25, which acts as an emitter follower switch between the base and the emitter of the transistor

voltage connected between ground and an emitter feeder 58, and the emitter of transistor 58 is

Rail 26 acts, stabilizes the voltage of the rail 35 via a capacitor 60 with the connection point

26 at - ν volts, for example at - 1 volt, which is connected between two diodes 61 and 62, which

Voltage through a voltage divider 27, 28 between the emitter and the base of the transistor

is correct, which are connected in series between the earth and a negative 31.

tive feed rail 29 is connected and a control der via the diode 59, via the capacitor 60

DC voltage to the base of the transistor 25 supplies. 40 and the diode 61 on the base of the transistor 31

The rail 26 is transmitted by a capacitor 30 positive control pulse is such that the

couples. Transistor 31 is "blocked". Therefore, the issuer

Another transistor 31, which between the undervoltage of the transistor 42 is essentially on

stabilized rail 26 and the supply rail 29 - V volts, as at 63 in FIG. 5 shown, and is

is switched, is normally through the base current 45 base current to the transistors 10, 10 'and 10 "

"Saturated", which is led from the feed rail 29 over one. The transistor 35 is saturated, whereby the

Resistor 32 is supplied. Base-emitter junction of the transistor 11 'and

The collector electrode of the transistor 31 is through the diodes 38, 39 and 40 by the charges in the

a diode 33 and an i? C element 34 with the base capacitors 46 to 51 and 15, 15 'and 15 "

another transistor 35 connected. The base 50 lockout can be biased with the tension

this transistor is also via a resistor of the emitter of the transistor 11 'at - ν volts,

36 grounded, and the cathode of diode 33 is further as at 64 in FIG. 5 shown.

Via a resistor 37 to the supply rail 29 The voltage of the collector of the transistor 10

tied together. increases linearly as shown by waveform 65 in FIG

The arrangement is such that when the 55 F i g. 5 shown until it is through an emitter follower transistor 31 is saturated, the transistor 35 as a result of the transistor 66 "caught" at a value the supply of its base via the diode 33 and the one that is activated by the setting of a potentiometer is determined by resistors 36 and 37 in conjunction with 67, which is connected to the base of the transistor the voltage divider formed by the i? C element 34 is not connected to 66. The effect of a change is conductive. 60 the setting of the potentiometer 67 in the long term

Further, the arrangement is such that when the linear slope 65 is indicated by the dashed line

the transistor 31 in an extension of the rise 65, described in more detail below, up to the limit value of

is made nonconductive in the same way, this results in - ν volts shown,

has that the transistor 35 becomes saturated. The arrangement is made so that the current in

As can be seen, the supply of the working voltage 65 capacitor 48 finds that in the resistor 32

voltage to the collector electrodes of the transistors 10, increases and that the current in the capacitor 49 den-

10 'and 10 "through the transistor 11' and over those in the resistor 44 exceeds and further

Diodes 38, 39 and 40 instead, so that the three genes - that the current in the capacitor 50 corresponds to that in the

Resistance 45 exceeds during the rise of the collector voltage of transistor 10, so that during during this period the transistors 31, 10 'and 10 "remain switched off.

If the rise in the collector voltage of the transistor 10, as described above, is intercepted is, the transistor 10 'is turned on by the current in the resistor 44 and increases the Collector voltage of transistor 10 ', as shown at 68 in FIG. 5, increases linearly until the limit value of - ν volts is reached. The arrangement is made so that the current through the capacitor 47 that through resistor 32 and the current through capacitor 51 exceeds that through the Resistance exceeds 45, so that during the entire rise in the collector voltage of the transistor 10 'the transistors 31 and 10 "remain switched off.

When transistor 10 'is saturated, transistor 10 "is turned on by the current flowing in Resistor 45 flows and the voltage of the collector of transistor 10 'rises, as at 69 in FIG. 5 shown linearly.

If the time constant of capacitor 46 and resistor 32 is made longer than the time which the linear rise 69 (Fig. 5) of the collector voltage of the transistor 10 "claims to - ν volts, the transistor 31 remains off until this linear increase has ended.

When the transistor is saturated 10 ", the transistor 31 is turned on and the switching condition to the initial condition in readiness is fed back to the reception of the next control pulse. The 'occurring at the collector of transistor 10 voltage through an RC-member 70 to the base electrodes of two transistors 71 and 72, which are connected as emitter follower circuits to an output terminal 73. Therefore, only the waveform 68 (FIG. 5) occurs at the output terminal 73.

The linear rise of this waveform begins, as can be seen, at a time t _x after the front of the control pulse 41 and is determined by the duration of the linear rise in the voltage of the collector electrode of the transistor 10. It can also be seen that the linear rise takes up a time interval t. Which is determined by the constants of the generator with the transistor 10 '. Finally, the output voltage is kept at the value -v volts for a period of time t _s which is determined by the third generator with the transistor 10 ″.

The transistor 58 and diode 62 provide a path for recharging the capacitor 60 the negative-going edge of the control pulse 41 (Fig. 5). Diode 74 limits the reverse bias at transistor 10 'from capacitor 49, so that the voltage rise of the collector of the transistor 10 'begins rapidly when the collector voltage of transistor 10 is intercepted by transistor 66 will. The capacitor 75 in the IC element 34 improves the rate at which the current flows in the transistor 35 is switched on and off.

Diodes 38, 39 and 40 isolate the delay capacitors of each generator from the delay capacitors in the other generators. If necessary, however, the diode 38 can be replaced by a short circuit. Resistance 76 in AC element 70 prevents damage to the diode and transistors 10 'and 11', if any of the transistors 71,72 a base-collector short circuit occurs.

The capacitor 77 in the AC element 70 is reduced the high frequency loss at the output due to the presence of resistor 76. The capacitor 78 decouples the base of transistor 66.

Claims (7)

Patent claims: 1. Circuit arrangement for generating a strictly linear sawtooth voltage using a transistor with a capacitor connected between its collector and base, which is charged via a charging circuit from an operating power source, and its base circuit contains a resistor through which current is supplied to the base, so that at the collector electrode a voltage change is generated, characterized in that a switching element in the charging circuit of the capacitor (15) (11) is provided that the collector electrode of the transistor (10) from the operating power source separates so that the capacitor acts as the sole power source for the collector current and there is a linear change in the collector voltage (Fig. 1). 2. Circuit arrangement according to claim 1, characterized in that the switching element (11) to separate the current source from the collector electrode of the transistor and the associated one Allocation of the capacitor (15) a rectifier is provided through which the capacitor is charged during operation, as well as a control arrangement (18) through which the rectifier supplied voltage is reduced so far that the rectifier is non-conductive. 3. Circuit arrangement according to claim 2, characterized in that the control arrangement (18) a relaxation circuit to reduce the voltage fed to the rectifier (11) is provided, one output (12) with the rectifier (11) and the other output (17) is connected to the resistor (16) in the base circuit, the arrangement being made in this way is that in the one stable operating state of the relaxation circuit, a voltage is fed from the relaxation circuit via the rectifier to the capacitor, while the voltage is essentially zero at one resistor and stable at the other State of the relaxation circuit a voltage from the relaxation circuit to the resistor is supplied, while the voltage is essentially zero at the rectifier. 4. Circuit arrangement according to claim 1, characterized in that as a switching element for Separation of the current source a further transistor (U ') is provided. its emitter-collector circuit is connected in series with the collector circuit of the first transistor (10), the control arrangement (18) the base of the further transistor (H ') supplies such a signal that this Transistor becomes non-conductive (Fig. 3). 5. Circuit arrangement according to one of claims 1 to 4, characterized in that in Row between the base and emitter electrodes of the first transistor (10) two rectifiers (13, 14) are connected, which in the same current direction how the base-emitter path of the transistor are polarized that the capacitor (15) between the Collector electrode and the connection of the two rectifiers is connected and the resistor (16) is connected between the base and the power source. 6. sawtooth generator using a circuit arrangement according to claim 1 to 5, ge ίο characterized by two such circuits, which are interconnected so that in one Control signal a first one of these circuits linearly changing voltage generated during a given period of time, whereupon it Triggering the second circuit and generating a second linearly changing one Causes tension. 7. sawtooth generator according to claim 6, characterized by a third circuit according to any one of claims 1 to 5 so interconnected with the first and second circuits is that when the second linearly changing voltage reaches a certain value, is triggered and a third linearly changing voltage is generated. 1 sheet of drawings 409 540/462 3.64 © Bundesdruckerei Berlin