DE112012004032A5 - Elektrisch isolierendes Harz-Gehäuse für Halbleiterbauelemente oder Baugruppen und Herstellungsverfahren mit einem Mold-Prozess - Google Patents
Elektrisch isolierendes Harz-Gehäuse für Halbleiterbauelemente oder Baugruppen und Herstellungsverfahren mit einem Mold-Prozess Download PDFInfo
- Publication number
- DE112012004032A5 DE112012004032A5 DE112012004032.5T DE112012004032T DE112012004032A5 DE 112012004032 A5 DE112012004032 A5 DE 112012004032A5 DE 112012004032 T DE112012004032 T DE 112012004032T DE 112012004032 A5 DE112012004032 A5 DE 112012004032A5
- Authority
- DE
- Germany
- Prior art keywords
- assemblies
- semiconductor devices
- electrically insulating
- molding process
- insulating resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000429 assembly Methods 0.000 title 1
- 230000000712 assembly Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 238000000465 moulding Methods 0.000 title 1
- 239000011347 resin Substances 0.000 title 1
- 229920005989 resin Polymers 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102011053997 | 2011-09-27 | ||
DE102011053997.2 | 2011-09-27 | ||
PCT/IB2012/055168 WO2013061183A1 (de) | 2011-09-27 | 2012-09-27 | Elektrisch isolierendes harz - gehäuse für halbleiterbauelemente oder baugruppen und herstellungsverfahren mit einem moldprozess |
Publications (1)
Publication Number | Publication Date |
---|---|
DE112012004032A5 true DE112012004032A5 (de) | 2014-07-24 |
Family
ID=47148873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE112012004032.5T Withdrawn DE112012004032A5 (de) | 2011-09-27 | 2012-09-27 | Elektrisch isolierendes Harz-Gehäuse für Halbleiterbauelemente oder Baugruppen und Herstellungsverfahren mit einem Mold-Prozess |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE112012004032A5 (de) |
WO (1) | WO2013061183A1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107768362B (zh) * | 2013-03-28 | 2020-09-08 | 东芝北斗电子株式会社 | 发光装置及其制造方法 |
DE102014111930A1 (de) | 2014-08-20 | 2016-02-25 | Rupprecht Gabriel | Thermisch gut leitendes, elektrisch isolierendes Gehäuse mit elektronischen Bauelementen und Herstellverfahren |
CN105990297A (zh) * | 2015-01-28 | 2016-10-05 | 苏州普福斯信息科技有限公司 | 不对等模腔配合无下沉导线框的结构 |
CN113113315B (zh) * | 2020-01-13 | 2023-03-31 | 珠海零边界集成电路有限公司 | 一种防止智能功率模块溢胶的方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1346993A (en) * | 1970-05-20 | 1974-02-13 | Dowty Seals Ltd | Method for the production of shaped articles |
JPS58138039A (ja) * | 1982-02-10 | 1983-08-16 | Nec Home Electronics Ltd | 樹脂封止型半導体装置の製造方法 |
DE10024415A1 (de) * | 2000-05-19 | 2001-11-22 | Erich Schuermann | Befüllvorrichtung |
DE10213296B9 (de) * | 2002-03-25 | 2007-04-19 | Infineon Technologies Ag | Elektronisches Bauteil mit einem Halbleiterchip, Verfahren zu seiner Herstellung und Verfahren zur Herstellung eines Nutzens |
JP3740116B2 (ja) * | 2002-11-11 | 2006-02-01 | 三菱電機株式会社 | モールド樹脂封止型パワー半導体装置及びその製造方法 |
JP2007165426A (ja) | 2005-12-12 | 2007-06-28 | Mitsubishi Electric Corp | 半導体装置 |
CN101755328B (zh) * | 2007-07-19 | 2011-08-31 | 积水化学工业株式会社 | 电子器件用胶粘剂 |
JP5184543B2 (ja) * | 2007-09-26 | 2013-04-17 | 三菱電機株式会社 | 熱伝導性シート及びパワーモジュール |
JP5308107B2 (ja) * | 2008-09-11 | 2013-10-09 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 回路装置の製造方法 |
-
2012
- 2012-09-27 WO PCT/IB2012/055168 patent/WO2013061183A1/de active Application Filing
- 2012-09-27 DE DE112012004032.5T patent/DE112012004032A5/de not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
WO2013061183A1 (de) | 2013-05-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |