DE112010003595B4 - Verfahren, Systeme und maschinenverarbeitbares Medium zur Bereitstellung einer verteiltenPrädikatvorhersage - Google Patents

Verfahren, Systeme und maschinenverarbeitbares Medium zur Bereitstellung einer verteiltenPrädikatvorhersage Download PDF

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DE112010003595B4
DE112010003595B4 DE112010003595.4T DE112010003595T DE112010003595B4 DE 112010003595 B4 DE112010003595 B4 DE 112010003595B4 DE 112010003595 T DE112010003595 T DE 112010003595T DE 112010003595 B4 DE112010003595 B4 DE 112010003595B4
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predicate
predictor
processor
core
history register
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DE112010003595T5 (de
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Doug Burger
Stephen W. Keckler
Hadi Esmaeilzadeh
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University of Texas System
University of Texas at Austin
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/445—Exploiting fine grain parallelism, i.e. parallelism at instruction level
    • G06F8/4451—Avoiding pipeline stalls
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
DE112010003595.4T 2009-09-09 2010-06-11 Verfahren, Systeme und maschinenverarbeitbares Medium zur Bereitstellung einer verteiltenPrädikatvorhersage Active DE112010003595B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/556,440 2009-09-09
US12/556,440 US8433885B2 (en) 2009-09-09 2009-09-09 Method, system and computer-accessible medium for providing a distributed predicate prediction
PCT/US2010/038350 WO2011031361A1 (en) 2009-09-09 2010-06-11 Method, system and computer-accessible medium for providing a distributed predicate prediction

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DE112010003595T5 DE112010003595T5 (de) 2012-11-22
DE112010003595B4 true DE112010003595B4 (de) 2024-06-06

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US (1) US8433885B2 (enExample)
JP (3) JP2013500539A (enExample)
KR (1) KR101364314B1 (enExample)
CN (2) CN102473086B (enExample)
DE (1) DE112010003595B4 (enExample)
WO (1) WO2011031361A1 (enExample)

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US10031756B2 (en) 2015-09-19 2018-07-24 Microsoft Technology Licensing, Llc Multi-nullification
US11126433B2 (en) 2015-09-19 2021-09-21 Microsoft Technology Licensing, Llc Block-based processor core composition register
US10936316B2 (en) 2015-09-19 2021-03-02 Microsoft Technology Licensing, Llc Dense read encoding for dataflow ISA
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US10678544B2 (en) 2015-09-19 2020-06-09 Microsoft Technology Licensing, Llc Initiating instruction block execution using a register access instruction
US10719321B2 (en) 2015-09-19 2020-07-21 Microsoft Technology Licensing, Llc Prefetching instruction blocks
US10180840B2 (en) 2015-09-19 2019-01-15 Microsoft Technology Licensing, Llc Dynamic generation of null instructions
US11681531B2 (en) 2015-09-19 2023-06-20 Microsoft Technology Licensing, Llc Generation and use of memory access instruction order encodings
US20170083341A1 (en) * 2015-09-19 2017-03-23 Microsoft Technology Licensing, Llc Segmented instruction block
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US10776115B2 (en) 2015-09-19 2020-09-15 Microsoft Technology Licensing, Llc Debug support for block-based processor
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US20170083319A1 (en) * 2015-09-19 2017-03-23 Microsoft Technology Licensing, Llc Generation and use of block branch metadata
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Also Published As

Publication number Publication date
JP2015164068A (ja) 2015-09-10
US8433885B2 (en) 2013-04-30
DE112010003595T5 (de) 2012-11-22
US20110060889A1 (en) 2011-03-10
KR20120068855A (ko) 2012-06-27
CN105183449A (zh) 2015-12-23
JP2014142969A (ja) 2014-08-07
JP2013500539A (ja) 2013-01-07
CN105183449B (zh) 2018-12-18
CN102473086A (zh) 2012-05-23
WO2011031361A1 (en) 2011-03-17
CN102473086B (zh) 2015-08-19
JP5747104B2 (ja) 2015-07-08
KR101364314B1 (ko) 2014-02-18

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