DE112005002852B4 - Passivation structure with voltage equalization loops - Google Patents
Passivation structure with voltage equalization loops Download PDFInfo
- Publication number
- DE112005002852B4 DE112005002852B4 DE112005002852.6T DE112005002852T DE112005002852B4 DE 112005002852 B4 DE112005002852 B4 DE 112005002852B4 DE 112005002852 T DE112005002852 T DE 112005002852T DE 112005002852 B4 DE112005002852 B4 DE 112005002852B4
- Authority
- DE
- Germany
- Prior art keywords
- closed loop
- loop
- semiconductor device
- passivation structure
- resistance material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002161 passivation Methods 0.000 title claims abstract description 38
- 239000004065 semiconductor Substances 0.000 claims abstract description 26
- 239000000463 material Substances 0.000 claims abstract description 20
- 239000002184 metal Substances 0.000 claims description 6
- 239000002019 doping agent Substances 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- 230000005684 electric field Effects 0.000 description 8
- 230000007704 transition Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/965—Shaped junction formation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Halbleiter-Bauelement, das Folgendes umfasst:
einen Halbleiterkörper eines ersten Leitfähigkeitstyps,
ein in dem Halbleiterkörper ausgebildetes aktives Gebiet, das ein Gebiet eines zweiten Leitfähigkeitstyps enthält, das in der Nähe der äußeren Grenze des aktiven Gebietes endet, und
eine Passivierungsstruktur, die um das aktive Gebiet herum angeordnet ist und
ein durchgängiges Band aus Widerstandsmaterial mit im Wesentlichen gleichmäßiger Breite, wobei sich das durchgängige Band nach einer Umrundung des aktiven Gebietes mit sich selbst kreuzt und eine erste geschlossene Schleife aus einem Widerstandsmaterial bildet, die als innere Grenze der Passivierungsstruktur dient, ein schleifenbildendes Band aus dem Widerstandsmaterial aufweist, das die erste geschlossene Schleife unter Bildung von Schleifen umgibt, ohne sich zu kreuzen, wobei das durchgängige Band sich ein zweites Mal mit sich selbst kreuzt und um die erste geschlossene Schleife herum eine zweite geschlossene Schleife aus dem Widerstandsmaterial bildet, die als äußere Grenze der Passivierungsstruktur dient,
wobei das schleifenbildende Band an einem Ende von dem Außenrand der ersten geschlossenen Schleife aus verläuft und an seinem anderen Ende an dem Innenrand der zweiten geschlossenen Schleife endet.
A semiconductor device comprising:
a semiconductor body of a first conductivity type,
an active region formed in the semiconductor body and containing a region of a second conductivity type which ends in the vicinity of the outer boundary of the active region, and
a passivation structure arranged around the active area and
a continuous band of resistance material with a substantially uniform width, the continuous band crossing itself after a circumnavigation of the active area and forming a first closed loop made of a resistance material, which serves as the inner boundary of the passivation structure, a loop-forming band made of the resistance material which surrounds the first closed loop to form loops without crossing, the continuous band crossing itself a second time and forming a second closed loop of the resistive material around the first closed loop, acting as the outer boundary serves the passivation structure,
wherein the loop-forming tape extends at one end from the outer edge of the first closed loop and ends at the other end at the inner edge of the second closed loop.
Description
Die vorliegende Erfindung betrifft ein Halbleiter-Bauelement und insbesondere ein Halbleiter-Bauelement, das eine Randpassivierungsstruktur aufweist.The present invention relates to a semiconductor component and in particular to a semiconductor component which has an edge passivation structure.
Ein typisches Halbleiter-Bauelement weist in der Regel ein aktives Gebiet auf, das an einem pn-Übergang endet.A typical semiconductor component usually has an active region that ends at a pn junction.
Die Durchschlagsspannung eines in einem Substrat ausgebildeten pn-Übergangs ist in der Regel geringer als ihr theoretischer Grenzwert, da bestimmte Stellen an dem pn-Übergang dazu neigen, stärkere elektrische Felder zu entwickeln. Der pn-Übergang an dem Abschlussrand des aktiven Gebietes eines Bauelements ist beispielsweise insbesondere an Stellen mit geringem Krümmungsradius stärkeren elektrischen Feldern ausgesetzt.The breakdown voltage of a pn junction formed in a substrate is generally lower than its theoretical limit, since certain locations on the pn junction tend to develop stronger electric fields. The pn junction at the end edge of the active area of a component is exposed to stronger electrical fields, for example, in particular at locations with a small radius of curvature.
Um die Intensität der elektrischen Felder in der Nähe des pn-Übergangs an dem Abschlussrand des aktiven Gebietes zu reduzieren, können Hochspannungshalbleiter-Bauelemente eine Randpassivierungsstruktur aufweisen. Eine Randpassivierungsstruktur sorgt für eine Übergangszone, in der die starken elektrischen Felder um das aktive Gebiet herum allmählich zu dem niedrigeren Potential an dem Rand des Bauelements übergehen. Eine Passivierungsstruktur verringert die Feldstärke um das Abschlussgebiet eines pn-Übergangs, indem die elektrischen Feldlinien über das Randpassivierungsgebiet verteilt werden.In order to reduce the intensity of the electric fields in the vicinity of the pn junction at the termination edge of the active region, high-voltage semiconductor components can have an edge passivation structure. An edge passivation structure provides a transition zone in which the strong electric fields around the active area gradually transition to the lower potential at the edge of the device. A passivation structure reduces the field strength around the termination area of a pn junction by distributing the electrical field lines over the edge passivation area.
Zum Ausgleichen der Spannung schlägt
Das spiralförmige Band weist zudem eine variierende Breite auf, so dass der Widerstand des Bandes über seine Länge hinweg ausgeglichen wird. Ein solches Band ist in der Praxis möglicherweise nur schwer mit Präzision herzustellen. Infolgedessen kann der Widerstand an dem Band entlang auf unvorhersehbare Weise variieren, was statt zu einem gleichmäßigen, fast linearen Spannungsabfall zu Schwankungen beim Spannungsabfall führt.The spiral band also has a varying width so that the resistance of the band is balanced over its length. In practice, such a tape may be difficult to manufacture with precision. As a result, the resistance along the band can vary in an unpredictable manner, resulting in fluctuations in the voltage drop rather than a smooth, almost linear voltage drop.
Eine Aufgabe der vorliegenden Erfindung besteht darin, eine Passivierungsstruktur bereitzustellen, um die elektrischen Felder um das aktive Gebiet eines Halbleiterchips herum zu reduzieren.An object of the present invention is to provide a passivation structure to reduce the electrical fields around the active area of a semiconductor chip.
Gemäß der vorliegenden Erfindung weist eine Passivierungsstruktur ein leitfähiges Band aus Widerstandsmaterial auf, das sich einmal kreuzt und eine erste geschlossene Schleife bildet und dann endet, indem es sich ein zweites Mal kreuzt und eine zweite geschlossene Schleife bildet.According to the present invention, a passivation structure comprises a conductive band of resistive material that crosses once and forms a first closed loop and then ends by crossing a second time and forming a second closed loop.
Gemäß der vorliegenden Erfindung ist die erste geschlossene Schleife aus einem elektrisch leitfähigen Widerstandsmaterial um das aktive Gebiet eines Halbleiter-Bauelements herum angeordnet und dient als innere Grenze der Passivierungsstruktur, die zweite geschlossene Schleife aus dem Widerstandsmaterial ist um die erste geschlossene Schleife herum angeordnet und dient als äußere Grenze der Passivierungsstruktur, und ein schleifenbildendes Band aus dem Widerstandsmaterial mit der gleichen Breite wie die innere geschlossene Schleife und die äußere geschlossene Schleife umgibt die erste geschlossene Schleife unter Bildung von Schleifen, ohne sich zu kreuzen, und endet an der zweiten geschlossenen Schleife.According to the present invention, the first closed loop made of an electrically conductive resistance material is arranged around the active region of a semiconductor device and serves as an inner boundary of the passivation structure, the second closed loop made of the resistance material is arranged around the first closed loop and serves as outer boundary of the passivation structure, and a loop-forming tape made of the resistive material with the same width as the inner closed loop and the outer closed loop surrounds the first closed loop without forming a loop and ends at the second closed loop.
Die innere geschlossene Schleife und die äußere geschlossene Schleife sorgen für eine im Wesentlichen gleichmäßige Spannung an den Enden des schleifenbildenden Bandes, und da die innere geschlossene Schleife und die äußere geschlossene Schleife ungefähr die gleiche Breite aufweisen wie das durchgängige Band, nehmen sie wesentlich weniger Platz in Anspruch als die im Stand der Technik vorgeschlagenen Feldplatten.The inner closed loop and the outer closed loop provide a substantially uniform tension at the ends of the loop-forming band, and since the inner closed loop and the outer closed loop are approximately the same width as the continuous band, they take up much less space Claim as the field plates proposed in the prior art.
Gemäß einer weiteren Ausführungsform der vorliegenden Erfindung wird das durchgängige Band so dotiert, dass es pn-Übergänge aufweist, die für schrittweise (statt stufenlos) erfolgende Spannungsabfälle entlang des durchgängigen Bandes sorgen.According to a further embodiment of the present invention, the continuous band is doped so that it has pn junctions which ensure gradual (instead of continuous) voltage drops along the continuous band.
Gemäß noch einem weiteren Aspekt der vorliegenden Erfindung wird zumindest über den pn-Übergängen in dem durchgängigen Band eine leitfähige Metallschicht abgeschieden, um dessen Zeitkonstante RC zu verbessern (reduzieren) und den Gesamtwiderstand zu reduzieren. According to yet another aspect of the present invention, a conductive metal layer is deposited at least over the pn junctions in the continuous band in order to improve (reduce) its time constant RC and to reduce the overall resistance.
Andere Merkmale und Vorteile der vorliegenden Erfindung ergeben sich aus der nachfolgenden Beschreibung der Erfindung, die sich auf die beiliegenden Zeichnungen bezieht.Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.
Bei der ersten Ausführungsform der vorliegenden Erfindung in
In Abhängigkeit von dem gewünschten Gesamtwiderstand und dem spezifischen Widerstand jeder Schleife kann eine beliebige Anzahl Schleifen benutzt werden.Any number of loops can be used depending on the total resistance desired and the resistivity of each loop.
Die innere geschlossene Schleife
Bei der ersten Ausführungsform der vorliegenden Erfindung ist ein Ende eines schleifenbildenden Bandes
Jede Schleife des schleifenbildenden Bandes
Außerdem weisen die innere geschlossene Schleife
Die zweite Ausführungsform der vorliegenden Erfindung in
Ein in
Die Passivierungsstruktur
Die Passivierungsstruktur gemäß der vorliegenden Erfindung kann mit Dotierstoffen mit einer Leitfähigkeit, wie beispielsweise n-Leitfähigkeit, dotiert werden. Für das Erzielen des gewünschten Gesamtwiderstandes kann eine beliebige Anzahl Schleifen und eine beliebiger entsprechender spezifischer Widerstand verwendet werden.The passivation structure according to the present invention can be doped with dopants with a conductivity, such as n-conductivity. Any number of loops and any corresponding specific resistance can be used to achieve the desired total resistance.
Die Passivierungsstruktur
Um einen angemessenen Spannungsabfall zu erzielen, kann die Passivierungsstruktur so gestaltet sein, dass sie fünfundzwanzig Schleifen enthält, von denen jede vier Dioden aufweist, die jeweils einen Spannungsabfall von sechs Volt bewirken.In order to achieve an adequate voltage drop, the passivation structure can be designed to contain twenty five loops, each of which has four diodes, each causing a voltage drop of six volts.
Bei der Ausbildung von pn-Übergängen in dem schleifenbildenden Band
Es ist jedoch festgestellt worden, dass Passivierungsstrukturen, die Dioden enthalten, eine relativ hohe Kapazität aufweisen, was insbesondere unter Bedingungen eines hohen Verhältnisses dv/dt unerwünscht ist. Um die hohe Kapazität zu reduzieren, kann das Polysilizium zwischen den Dioden durch eine Metallschicht oder Silizid beispielsweise zumindest an den Kurven in jeder Schleife (90°-Positionen) kurzgeschlossen werden.However, it has been found that passivation structures containing diodes have a relatively high capacitance, which is undesirable especially under conditions of a high ratio dv / dt. In order to reduce the high capacitance, the polysilicon between the diodes can be short-circuited by a metal layer or silicide, for example at least on the curves in each loop (90 ° positions).
Wie in
Die Passivierungsstruktur
Claims (9)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/991,167 | 2004-11-17 | ||
US10/991,167 US7183626B2 (en) | 2004-11-17 | 2004-11-17 | Passivation structure with voltage equalizing loops |
PCT/US2005/041734 WO2006055738A2 (en) | 2004-11-17 | 2005-11-17 | Passivation structure with voltage equalizing loops |
Publications (2)
Publication Number | Publication Date |
---|---|
DE112005002852T5 DE112005002852T5 (en) | 2007-10-11 |
DE112005002852B4 true DE112005002852B4 (en) | 2020-03-12 |
Family
ID=36385376
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE112005002852.6T Active DE112005002852B4 (en) | 2004-11-17 | 2005-11-17 | Passivation structure with voltage equalization loops |
Country Status (6)
Country | Link |
---|---|
US (2) | US7183626B2 (en) |
JP (1) | JP2008521256A (en) |
KR (1) | KR100903428B1 (en) |
CN (1) | CN101057337B (en) |
DE (1) | DE112005002852B4 (en) |
WO (1) | WO2006055738A2 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7183626B2 (en) * | 2004-11-17 | 2007-02-27 | International Rectifier Corporation | Passivation structure with voltage equalizing loops |
CN101405871A (en) * | 2004-11-24 | 2009-04-08 | 美高森美公司 | Junction termination structures for wide-bandgap power devices |
US8853770B2 (en) * | 2010-03-16 | 2014-10-07 | Vishay General Semiconductor Llc | Trench MOS device with improved termination structure for high voltage applications |
US8928065B2 (en) * | 2010-03-16 | 2015-01-06 | Vishay General Semiconductor Llc | Trench DMOS device with improved termination structure for high voltage applications |
JP2012221976A (en) * | 2011-04-04 | 2012-11-12 | Toyota Central R&D Labs Inc | Semiconductor device |
EP2779225B1 (en) | 2011-11-11 | 2018-04-25 | Fuji Electric Co., Ltd. | Semiconductor device |
JP6134219B2 (en) | 2013-07-08 | 2017-05-24 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
JP6649102B2 (en) * | 2016-02-05 | 2020-02-19 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
JP6719090B2 (en) * | 2016-12-19 | 2020-07-08 | パナソニックIpマネジメント株式会社 | Semiconductor element |
JP6910907B2 (en) * | 2017-09-25 | 2021-07-28 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4157563A (en) * | 1971-07-02 | 1979-06-05 | U.S. Philips Corporation | Semiconductor device |
JPH0389554A (en) * | 1989-09-01 | 1991-04-15 | Nippon Mining Co Ltd | Schottky barrier semiconductor device |
US5382825A (en) * | 1993-01-07 | 1995-01-17 | Harris Corporation | Spiral edge passivation structure for semiconductor devices |
US6525390B2 (en) * | 2000-05-18 | 2003-02-25 | Fuji Electric Co., Ltd. | MIS semiconductor device with low on resistance and high breakdown voltage |
DE69331793T2 (en) * | 1992-06-24 | 2004-11-04 | Kabushiki Kaisha Toshiba, Kawasaki | Integrated power semiconductor circuit component with uniform electrical field distribution |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3890698A (en) * | 1971-11-01 | 1975-06-24 | Motorola Inc | Field shaping layer for high voltage semiconductors |
US4947232A (en) * | 1980-03-22 | 1990-08-07 | Sharp Kabushiki Kaisha | High voltage MOS transistor |
US5382826A (en) * | 1993-12-21 | 1995-01-17 | Xerox Corporation | Stacked high voltage transistor unit |
US5486718A (en) * | 1994-07-05 | 1996-01-23 | Motorola, Inc. | High voltage planar edge termination structure and method of making same |
JPH10163506A (en) * | 1996-11-29 | 1998-06-19 | Texas Instr Japan Ltd | Thin-film silicon diode and semiconductor device |
JP3472476B2 (en) * | 1998-04-17 | 2003-12-02 | 松下電器産業株式会社 | Semiconductor device and driving method thereof |
JP4960540B2 (en) * | 1998-11-05 | 2012-06-27 | 富士電機株式会社 | Semiconductor device |
JP2002535839A (en) * | 1999-01-15 | 2002-10-22 | インフィネオン テクノロジース アクチエンゲゼルシャフト | Edge termination for semiconductor device, Schottky diode having edge termination, and method of manufacturing Schottky diode |
JP4857458B2 (en) * | 2000-06-07 | 2012-01-18 | 富士電機株式会社 | High voltage semiconductor device |
JP4547790B2 (en) * | 2000-10-05 | 2010-09-22 | 富士電機システムズ株式会社 | Semiconductor device |
KR100535062B1 (en) * | 2001-06-04 | 2005-12-07 | 마츠시타 덴끼 산교 가부시키가이샤 | High-voltage semiconductor device |
CN1280907C (en) * | 2002-09-24 | 2006-10-18 | 旺宏电子股份有限公司 | Shielding layer structure of semiconductor component and forming method thereof |
JP4242353B2 (en) * | 2004-02-04 | 2009-03-25 | パナソニック株式会社 | Semiconductor device |
US7196397B2 (en) * | 2004-03-04 | 2007-03-27 | International Rectifier Corporation | Termination design with multiple spiral trench rings |
US7183626B2 (en) * | 2004-11-17 | 2007-02-27 | International Rectifier Corporation | Passivation structure with voltage equalizing loops |
-
2004
- 2004-11-17 US US10/991,167 patent/US7183626B2/en active Active
-
2005
- 2005-11-17 KR KR1020077011281A patent/KR100903428B1/en active IP Right Grant
- 2005-11-17 WO PCT/US2005/041734 patent/WO2006055738A2/en active Application Filing
- 2005-11-17 CN CN2005800390463A patent/CN101057337B/en not_active Expired - Fee Related
- 2005-11-17 JP JP2007543251A patent/JP2008521256A/en active Pending
- 2005-11-17 DE DE112005002852.6T patent/DE112005002852B4/en active Active
-
2006
- 2006-12-28 US US11/647,070 patent/US8076672B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4157563A (en) * | 1971-07-02 | 1979-06-05 | U.S. Philips Corporation | Semiconductor device |
JPH0389554A (en) * | 1989-09-01 | 1991-04-15 | Nippon Mining Co Ltd | Schottky barrier semiconductor device |
DE69331793T2 (en) * | 1992-06-24 | 2004-11-04 | Kabushiki Kaisha Toshiba, Kawasaki | Integrated power semiconductor circuit component with uniform electrical field distribution |
US5382825A (en) * | 1993-01-07 | 1995-01-17 | Harris Corporation | Spiral edge passivation structure for semiconductor devices |
US6525390B2 (en) * | 2000-05-18 | 2003-02-25 | Fuji Electric Co., Ltd. | MIS semiconductor device with low on resistance and high breakdown voltage |
Also Published As
Publication number | Publication date |
---|---|
US7183626B2 (en) | 2007-02-27 |
KR20070084339A (en) | 2007-08-24 |
US20060102984A1 (en) | 2006-05-18 |
CN101057337B (en) | 2011-01-05 |
WO2006055738A2 (en) | 2006-05-26 |
US8076672B2 (en) | 2011-12-13 |
CN101057337A (en) | 2007-10-17 |
JP2008521256A (en) | 2008-06-19 |
DE112005002852T5 (en) | 2007-10-11 |
WO2006055738A3 (en) | 2006-11-02 |
US20070120224A1 (en) | 2007-05-31 |
KR100903428B1 (en) | 2009-06-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE112005002852B4 (en) | Passivation structure with voltage equalization loops | |
DE112011101442B4 (en) | semiconductor device | |
DE4037876C2 (en) | Lateral DMOS FET device with reduced operating resistance | |
DE102004051348B4 (en) | Superjunction device with improved robustness | |
DE2954481C2 (en) | POWER MOSFET ARRANGEMENT. | |
DE112013007363B4 (en) | Semiconductor device | |
DE102013217850B4 (en) | Silicon carbide semiconductor device and method of manufacturing the same | |
DE102004055879B4 (en) | Semiconductor component with insulated control electrode | |
EP1039548A2 (en) | Field effect controlled semiconductor component | |
EP0360036A2 (en) | Planar pn-junction having a high withstand voltage | |
DE69937101T2 (en) | LATERAL THIN FILM SILICON ON INSULATOR (SOI) ARRANGEMENT WITH SEVERAL AREAS IN DRIFT FIELD | |
DE112012006068T5 (en) | Semiconductor device | |
DE10225864A1 (en) | MOSFET semiconductor component has low input resistance layer beneath high breakdown voltage layer | |
DE10322594A1 (en) | Metal-insulator-semiconductor component, especially power MOSFET, includes second drain region also serving as drift region | |
DE1913053A1 (en) | Field effect transistor with insulated gate electrode | |
DE3782748T2 (en) | FIELD EFFECT TRANSISTOR WITH INSULATED GATE. | |
DE3021042C2 (en) | High breakdown voltage resistance element for integrated circuits | |
DE102020116653B4 (en) | SILICON CARBIDE SEMICONDUCTOR COMPONENT | |
DE102018206482B4 (en) | Semiconductor component with a composite clip made of composite material | |
DE102006060384B4 (en) | Semiconductor device with super-junction structure | |
DE2300116A1 (en) | HIGH FREQUENCY FIELD EFFECT TRANSISTOR WITH ISOLATED GATE ELECTRODE FOR BROADBAND OPERATION | |
EP0913000A1 (en) | Field effect controllable semiconductor component | |
DE1810322B2 (en) | Bipolar transistor for high currents and high current amplification | |
DE1789119B2 (en) | Semiconductor component. Eliminated from: 1514855 | |
DE102014203851B4 (en) | Circuit arrangement |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
R016 | Response to examination communication | ||
R082 | Change of representative |
Representative=s name: PATENTANWAELTE LAMBSDORFF & LANGE, DE Representative=s name: LAMBSDORFF & LANGE PATENTANWAELTE PARTNERSCHAF, DE |
|
R081 | Change of applicant/patentee |
Owner name: INFINEON TECHNOLOGIES AMERICAS CORP., EL SEGUN, US Free format text: FORMER OWNER: INTERNATIONAL RECTIFIER CORP., EL SEGUNDO, CALIF., US |
|
R082 | Change of representative |
Representative=s name: LAMBSDORFF & LANGE PATENTANWAELTE PARTNERSCHAF, DE |
|
R018 | Grant decision by examination section/examining division | ||
R020 | Patent grant now final | ||
R082 | Change of representative |