DE112005002370T5 - Ausführung von Kontrollbefehlen in redundanten Multithreadingumgebungen - Google Patents

Ausführung von Kontrollbefehlen in redundanten Multithreadingumgebungen Download PDF

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Publication number
DE112005002370T5
DE112005002370T5 DE112005002370T DE112005002370T DE112005002370T5 DE 112005002370 T5 DE112005002370 T5 DE 112005002370T5 DE 112005002370 T DE112005002370 T DE 112005002370T DE 112005002370 T DE112005002370 T DE 112005002370T DE 112005002370 T5 DE112005002370 T5 DE 112005002370T5
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DE
Germany
Prior art keywords
thread
last
command
commands
control commands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE112005002370T
Other languages
German (de)
English (en)
Inventor
Shubhendu Framingham Mukherjee
Joel Acton Emer
Steven Ann Arbor Reinhardt
Christopher Marlborough Weaver
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE112005002370T5 publication Critical patent/DE112005002370T5/de
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1479—Generic software techniques for error detection or fault masking
    • G06F11/1492—Generic software techniques for error detection or fault masking using run-time replication performed by the application software, e.g. N-modular type
    • G06F11/1494—N-modular type
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Hardware Redundancy (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE112005002370T 2004-09-29 2005-09-29 Ausführung von Kontrollbefehlen in redundanten Multithreadingumgebungen Withdrawn DE112005002370T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/953,887 US7353365B2 (en) 2004-09-29 2004-09-29 Implementing check instructions in each thread within a redundant multithreading environments
US10/953,887 2004-09-29
PCT/US2005/035375 WO2006039595A2 (en) 2004-09-29 2005-09-29 Executing checker instructions in redundant multithreading environments

Publications (1)

Publication Number Publication Date
DE112005002370T5 true DE112005002370T5 (de) 2007-09-20

Family

ID=36001038

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112005002370T Withdrawn DE112005002370T5 (de) 2004-09-29 2005-09-29 Ausführung von Kontrollbefehlen in redundanten Multithreadingumgebungen

Country Status (7)

Country Link
US (1) US7353365B2 (https=)
JP (1) JP4691105B2 (https=)
CN (1) CN101031887B (https=)
DE (1) DE112005002370T5 (https=)
GB (1) GB2430520B (https=)
TW (1) TWI317063B (https=)
WO (1) WO2006039595A2 (https=)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7581152B2 (en) * 2004-12-22 2009-08-25 Intel Corporation Fault free store data path for software implementation of redundant multithreading environments
US7321989B2 (en) * 2005-01-05 2008-01-22 The Aerospace Corporation Simultaneously multithreaded processing and single event failure detection method
US7818744B2 (en) * 2005-12-30 2010-10-19 Intel Corporation Apparatus and method for redundant software thread computation
GB0602641D0 (en) * 2006-02-09 2006-03-22 Eads Defence And Security Syst High speed data processing system
US7444544B2 (en) * 2006-07-14 2008-10-28 International Business Machines Corporation Write filter cache method and apparatus for protecting the microprocessor core from soft errors
US9081688B2 (en) * 2008-12-30 2015-07-14 Intel Corporation Obtaining data for redundant multithreading (RMT) execution
US9594648B2 (en) * 2008-12-30 2017-03-14 Intel Corporation Controlling non-redundant execution in a redundant multithreading (RMT) processor
CN101551764B (zh) * 2009-02-27 2010-11-10 北京时代民芯科技有限公司 基于同步冗余线程与编码技术的抗单粒子效应系统及方法
WO2011101707A1 (en) * 2010-02-16 2011-08-25 Freescale Semiconductor, Inc. Data processing method, data processor and apparatus including a data processor
US9361104B2 (en) * 2010-08-13 2016-06-07 Freescale Semiconductor, Inc. Systems and methods for determining instruction execution error by comparing an operand of a reference instruction to a result of a subsequent cross-check instruction
JP2012208662A (ja) * 2011-03-29 2012-10-25 Toyota Motor Corp マルチスレッド・プロセッサ
WO2014080245A1 (en) 2012-11-22 2014-05-30 Freescale Semiconductor, Inc. Data processing device, method of execution error detection and integrated circuit
AT515341B1 (de) * 2014-01-23 2015-12-15 Bernecker & Rainer Ind Elektronik Gmbh Verfahren zur Überprüfung der Abarbeitung von Software
US9823983B2 (en) 2014-09-25 2017-11-21 Nxp Usa, Inc. Electronic fault detection unit
US10013240B2 (en) 2016-06-21 2018-07-03 Advanced Micro Devices, Inc. Fingerprinting of redundant threads using compiler-inserted transformation code
US10042687B2 (en) * 2016-08-08 2018-08-07 Advanced Micro Devices, Inc. Paired value comparison for redundant multi-threading operations

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19625195A1 (de) 1996-06-24 1998-01-02 Siemens Ag Synchronisationsverfahren
JPH1115661A (ja) * 1997-06-26 1999-01-22 Toshiba Corp Ｃｐｕの自己診断方法
US6463579B1 (en) * 1999-02-17 2002-10-08 Intel Corporation System and method for generating recovery code
US6625749B1 (en) * 1999-12-21 2003-09-23 Intel Corporation Firmware mechanism for correcting soft errors
US6640313B1 (en) 1999-12-21 2003-10-28 Intel Corporation Microprocessor with high-reliability operating mode
US6854051B2 (en) 2000-04-19 2005-02-08 Hewlett-Packard Development Company, L.P. Cycle count replication in a simultaneous and redundantly threaded processor
US6854075B2 (en) 2000-04-19 2005-02-08 Hewlett-Packard Development Company, L.P. Simultaneous and redundantly threaded processor store instruction comparator

Also Published As

Publication number Publication date
JP4691105B2 (ja) 2011-06-01
US7353365B2 (en) 2008-04-01
TW200634504A (en) 2006-10-01
TWI317063B (en) 2009-11-11
GB2430520B (en) 2008-10-22
CN101031887B (zh) 2010-05-26
US20060095821A1 (en) 2006-05-04
WO2006039595A2 (en) 2006-04-13
GB0700979D0 (en) 2007-02-28
JP2008515064A (ja) 2008-05-08
CN101031887A (zh) 2007-09-05
GB2430520A (en) 2007-03-28
WO2006039595A3 (en) 2006-06-29

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OP8 Request for examination as to paragraph 44 patent law
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20140401