DE1107830B - Process for the production of electrically asymmetrically conductive systems - Google Patents
Process for the production of electrically asymmetrically conductive systemsInfo
- Publication number
- DE1107830B DE1107830B DEL16646A DEL0016646A DE1107830B DE 1107830 B DE1107830 B DE 1107830B DE L16646 A DEL16646 A DE L16646A DE L0016646 A DEL0016646 A DE L0016646A DE 1107830 B DE1107830 B DE 1107830B
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor
- impurity
- production
- copper
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 16
- 239000000126 substance Substances 0.000 claims description 14
- 229910052738 indium Inorganic materials 0.000 claims description 8
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 8
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 7
- 239000012535 impurity Substances 0.000 claims description 7
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 6
- 238000009792 diffusion process Methods 0.000 claims description 6
- 229910052732 germanium Inorganic materials 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 239000013078 crystal Substances 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 4
- 230000008018 melting Effects 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
- 239000002904 solvent Substances 0.000 claims description 3
- 241000530268 Lycaena heteronea Species 0.000 claims description 2
- 238000005275 alloying Methods 0.000 claims description 2
- 150000001879 copper Chemical class 0.000 claims description 2
- 229910000765 intermetallic Inorganic materials 0.000 claims description 2
- 229910052756 noble gas Inorganic materials 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 238000002679 ablation Methods 0.000 claims 1
- 239000013589 supplement Substances 0.000 claims 1
- 230000004888 barrier function Effects 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000007669 thermal treatment Methods 0.000 description 2
- 208000001840 Dandruff Diseases 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005019 vapor deposition process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Die Bonding (AREA)
- Light Receiving Elements (AREA)
- Electrodes Of Semiconductors (AREA)
- Photovoltaic Devices (AREA)
Description
DEUTSCHESGERMAN
PATENTAMTPATENT OFFICE
L 16646 Vnic/21gL 16646 Vnic / 21g
ANMELDETAG: 16. SEPTEMBER 1953REGISTRATION DATE: SEPTEMBER 16, 1953
BEKANNTMACHUNGNOTICE
DER ANMELDUNGTHE REGISTRATION
UNDAUSGABE DERAND ISSUE OF
AUSLEGESCHRIFT: 31. MAI 1961 EDITORIAL: MAY 31, 1961
Es war bislang üblich, elektrisch unsymmetrisch leitende Systeme, insbesondere solche mit Halbleitermaterialien mit hohen Schmelzpunkten, wie z. B. Germanium, dadurch herzustellen, daß auf einen Halbleiterkörper eines bestimmten Leitfähigkeitscharakters Störstellenmaterial oder Störstellenmaterial, vermischt mit reinem Halbleitermaterial der gleichen oder einer anderen Art, aufgebracht wurde und daß das System daraufhin einer thermischen Behandlung unterworfen wurde. Dabei bildet sich an der Grenze zwischen dem Halbleiterkörper und dem aufgebrachten Material durch Diffusion und/oder Legierung eine Schicht aus, die im wesentlichen eine Leitfähigkeit zeigt, die der des Halbleiterkörpers entgegengesetzt ist. Diese Systeme zeigen in diesem Zustand bereits Sperrschichten, jedoch stehen ihrer Verwendung insofern Schwierigkeiten entgegen, als das auf dem Halbleiterkörper verbleibende aufgebrachte Material, was zum überwiegenden Teil aus störstellenbildender Substanz besteht, insbesondere die Abführung der an der Sperrschicht gebildeten Wärme dadurch erschwert, daß die störstellenbildenden Substanzen verhältnismäßig schlechte Wärmeleiter sind. Desgleichen verbot die verbleibende verhältnismäßig große Menge störstellenbildender Substanz, die nicht zur Sperrschichtbildung herangezogen war, eine thermische Nachbehandlung der so hergestellten Systeme, weil bei einer solchen weiteren thermischen Behandlung die Diffusionsvorgänge nicht oder nur unzureichend gesteuert werden konnten. Desgleichen war man gezwungen, zur Her-Stellung elektrischer Kontakte das störstellenbildende Material zu schmelzen, da die zur Herstellung des sperrfreien Kontaktes an der Basis verwendbaren Lote gewöhnlich einen höheren Schmelzpunkt haben als die störstellenbildenden Substanzen.Up to now, it has been customary to use electrically asymmetrically conductive systems, in particular those with semiconductor materials with high melting points, such as B. germanium to be produced in that on a semiconductor body of a certain conductivity character impurity material or impurity material, mixed with pure semiconductor material of the same or a different type, and that the system was then subjected to a thermal treatment. This forms on the border between the Semiconductor body and the applied material by diffusion and / or alloy a layer of, which essentially exhibits a conductivity which is opposite to that of the semiconductor body. These Systems in this state already show barrier layers, but their use is insofar as possible Difficulties counteracted as the applied material remaining on the semiconductor body, which leads to predominantly consists of impurity-forming substance, in particular the removal of the at the barrier layer The heat generated is made more difficult by the fact that the substances that cause defects are relatively are poor conductors of heat. Likewise, the remaining relatively large amount of defect-forming banned Substance that was not used to form the barrier layer, a thermal aftertreatment of the systems produced in this way, because with such a further thermal treatment the diffusion processes could not or only inadequately be controlled. Likewise, one was forced to manufacture electrical contacts to melt the defect-forming material, since the production of the Non-blocking contact solders that can be used at the base usually have a higher melting point than that impurity-forming substances.
Die vorliegende Erfindung bezieht sich nun auf ein Verfahren zum Herstellen von elektrisch unsymmetrisch leitenden Systemen, wie Gleichrichter oder Kristallverstärker, unter Verwendung eines Halbleiters mit hohem Schmelzpunkt, wie z. B. Germanium, Silizium oder einer halbleitenden intermetallischen Verbindung, bei dem auf einen Halbleiterkörper eines bestimmten Leitfähigkeitstyps eine kleine Menge einer Substanz aufgebracht oder erzeugt ist, die aus einem Halbleitermaterial und solchem Störstellenmaterial besteht, das entgegengesetzte Leitfähigkeit wie das in dem Halbleitergrundkörper enthaltene hervorruft, und bei dem die Schicht entgegengesetzten Leitfähigkeitstyps durch ein Legierungs- und/oder Diffusionsverfahren erzeugt worden ist. Das erfmdungsgemäße Verfahren unterscheidet sich von dem bisher bekannten dadurch, daß das auf dem System verbleibende Stör-Verfahren zum HerstellenThe present invention now relates to a method for producing electrically unbalanced conductive systems, such as rectifiers or crystal amplifiers, using a semiconductor with a high melting point, such as. B. germanium, silicon or a semiconducting intermetallic Compound in which a small amount of a Substance is applied or generated, which consists of a semiconductor material and such an impurity material consists of the opposite conductivity to that in the semiconductor base body contained, and in which the layer of opposite conductivity type by an alloying and / or diffusion process has been generated. The method according to the invention differs from that previously known in that the jamming process remaining on the system to manufacture
von elektrisch unsymmetrisch leitendenof electrically asymmetrically conductive
SystemenSystems
Anmelder:Applicant:
LICENTIA Patent-Verwaltungs - G. m. b. H., Frankfurt/M., Theodor-Stern-Kai 1LICENTIA Patent Administration - G. m. B. H., Frankfurt / M., Theodor-Stern-Kai 1
Dipl.-Ing. Reiner Thedieck, Belecke/Möhne,
ist als Erfinder genannt wordenDipl.-Ing. Reiner Thedieck, Belecke / Möhne,
has been named as the inventor
Stellenmaterial auf mechanischem, chemischem oder thermischem Wege entfernt und darüber eine sperrfreie Elektrode mit großer Wärmekapazität aus einem gut leitenden Material, z. B. Kupfer, angebracht wird. Die oben angegebenen Schwierigkeiten werden also durch die Entfernung des verbleibenden Störstellenmaterials überwunden und die weiteren Erleichterungen und Verbesserungen können durchgeführt werden.Site material removed mechanically, chemically or thermally and a lock-free one Electrode with a large heat capacity made of a highly conductive material, e.g. B. copper is attached. Thus, the above-mentioned difficulties are alleviated by the removal of the remaining impurity material overcome and the further simplifications and improvements can be carried out.
So ist es z. B. von besonderem Vorteil, das System nach dem Entfernen der störstellenbildenden Substanz einer thermischen Nachbehandlung zu unterwerfen. Dadurch kann unter Verwendung einer definierten Menge störstellenbildender Substanz die Eindiffusion in einem vorbestimmbaren und kontrollierbaren Maße weitergetrieben werden. Dadurch werden die elektrischen Eigenschaften des Systems wesentlich verbessert und können gegebenenfalls dem beabsichtigten Verwendungszweck angepaßt werden.So it is z. B. of particular advantage, the system after the removal of the impurity-forming substance to be subjected to a thermal aftertreatment. This allows using a defined Amount of impurity-forming substance diffuses in a predeterminable and controllable degree be driven on. This significantly improves the electrical properties of the system and can, if necessary, be adapted to the intended use.
Bei Verwendung von Indium als störstellenbildender Substanz hat es sich bewährt, die Abtragung des Indiums mit Hilfe eines chemischen Lösungsmittels, vorzugsweise mit Salzsäure, vorzunehmen. Außerdem ist es von Vorteil, wenn die thermische Nachbehandlung im Vakuum oder in einer inerten Atmosphäre erfolgt.When using indium as an impurity-forming substance, it has proven useful to remove the Indium with the help of a chemical solvent, preferably hydrochloric acid. aside from that it is advantageous if the thermal aftertreatment takes place in a vacuum or in an inert atmosphere he follows.
Das erfindungsgemäße Verfahren hat sich besonders zur Herstellung von steuerbaren Systemen, vorzugsweise Kristallverstärkern oder Transistoren, bewährt. Es werden dabei mit besonderem Vorteil zwei gegenüberliegende Flächen des Halbleiterkörpers behandelt. Nach dem Entfernen des verbleibenden Störstellenmaterials kann die thermische Nachbehandlung dann so geführt werden, daß sich die durch Diffusion gebildeten Zonen gleichen LeitfähigkeitscharaktersThe process according to the invention has proven particularly useful for the production of controllable systems, preferably Crystal amplifiers or transistors, proven. It is particularly advantageous that there are two Treated opposite surfaces of the semiconductor body. After removing the remaining impurity material the thermal aftertreatment can then be carried out in such a way that the diffusion formed zones of the same conductivity character
109»609/420109 »609/420
bis auf eine für den gewünschten Verwendungszweck besonders günstigen Abstand einander nähern.approach each other except for a distance that is particularly favorable for the desired purpose.
Besonders große Vorteile bietet das erfindungsgemäße Verfahren hinsichtlich der Kontaktierung. Diese geht besonders gut vonstatten, wenn die behandelte Fläche mit Kupfer überzogen und die Elektrode auf dieser Kupferschicht mit einem Lot hoher Wärmeleitfähigkeit aufgelötet wird. Es wird dabei erreicht, daß die an der Sperrschicht entstehende Wärme unter Vermeidung überflüssiger Wärmewiderstände besonders gut abgeführt werden kann, was wiederum zu einer höheren Belastbarkeit des Systems führt.The method according to the invention offers particularly great advantages with regard to the contacting. These works particularly well if the treated area is coated with copper and the electrode is on this copper layer is soldered with a solder of high thermal conductivity. It is achieved that the heat generated at the barrier layer is particularly important while avoiding superfluous thermal resistances can be dissipated well, which in turn leads to a higher load capacity of the system.
Zum Beispiel wird bei einem Verfahren gemäß der Lehre der Erfindung an eine einkristalline Germaniumscheibe mit einem spezifischen Widerstand von mindestens 2 Ohm-cm eine geringe Menge Indium angeschmolzen. Während dieses Vorganges löst sich eine im wesentlichen durch die maximal erreichte Temperatur bestimmte Menge Germanium in dem Indium. Während der Abkühlung dieses Systems scheidet sich das gelöste Germanium in feinkristalliner Form in dem Indium ab. Ferner scheidet sich das Germanium in Form von Schuppen, deren kristalline Orientierung im wesentlichen von der des Grundkörpers abhängt, auf dem Halbleitergrundkörper ab. Das so erhaltene Gebilde wird nunmehr einer chemischen Nachbehandlung unterworfen, vorzugsweise wird mit HiKe eines Lösungsmittels, z. B. Salzsäure, das auf der Oberfläche des Halbleitergrundkörpers lagernde überschüssige Indium so weit entfernt, daß die obenerwähnte Schuppendichte freigelegt wird. Nach Spülung und Trocknung des Gebildes wird diese nunmehr einer thermischen Nachbehandlung unterworfen. Diese besteht beispielsweise darin, daß das Gebilde in einer Edelgasatmosphäre, vorzugsweise Argon, für die Dauer von etwa 2 Stunden bei einer Temperatur von etwa 500° C getempert wird. Die Bedingungen der thermischen Nachbehandlung werden so gewählt, daß sie den verwendeten Materialien und dem vorgesehenen Verwendungszweck der Systeme entsprechen. Die behandelten Gebilde werden daraufhin beispielsweise mit Hilfe eines elektrolytischen oder eines Aufdampfverfahrens mit einem metallischen Überzug, beispielsweise aus Kupfer oder Silber, versehen, und zwar so, daß dieser Überzug maximal die mit den obenerwähnten Schuppen bedeckten Flächen des Halbleiterkörpers überdeckt. Hierauf wird unter Verwendung eines Lotmetalls hoher Wärmeleitfähigkeit eine vorzugsweise flächenhafte Elektrode mit großer Wärmekapazität als elektrische Zuleitung zum Sperrschichtbereich angelötet.For example, in a method according to the teaching of the invention, a single crystal germanium wafer melted a small amount of indium with a resistivity of at least 2 ohm-cm. During this process, a temperature that is essentially reached by the maximum temperature dissolves certain amount of germanium in the indium. As this system cools down, it separates the dissolved germanium in finely crystalline form in the indium. The germanium also separates in the form of scales, the crystalline orientation of which essentially depends on that of the base body, on the semiconductor body. The structure obtained in this way is now subjected to a chemical aftertreatment subjected, preferably with HiKe of a solvent, e.g. B. hydrochloric acid that is on the surface of the semiconductor base body stored excess indium so far away that the above-mentioned Dandruff is exposed. After rinsing and drying the structure, this is now subjected to a thermal aftertreatment. This is, for example, that the structure in a Noble gas atmosphere, preferably argon, for a period of about 2 hours at a temperature of about 500 ° C is annealed. The conditions of the thermal aftertreatment are chosen so that they correspond to the materials used and the intended use of the systems. the treated structures are then, for example, with the help of an electrolytic or a vapor deposition process provided with a metallic coating, for example made of copper or silver, as follows, that this coating maximally covers the surfaces of the semiconductor body covered with the above-mentioned flakes covered. Then, using a solder metal of high thermal conductivity, one is preferable Flat electrode with a large heat capacity as an electrical lead to the barrier layer area soldered on.
Claims (6)
Deutsche Patentschriften Nr. 829 018, 851527;
britische Patentschrift Nr. 571 905;
USA.-Patentschriften Nr. 2 375 353, 2 644 852;
»Der Radio-Markt«, Beilage in der »Elektro-Technik«, Coburg, 9. 2.1951, S. 14 bis 16.Considered publications:
German Patent Nos. 829 018, 851527;
British Patent No. 571,905;
U.S. Patent Nos. 2,375,353, 2,644,852;
»Der Radio-Markt«, supplement in the »Elektro-Technik«, Coburg, January 9, 1951, pp. 14 to 16.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DEL16646A DE1107830B (en) | 1953-09-16 | 1953-09-16 | Process for the production of electrically asymmetrically conductive systems |
| FR1108247D FR1108247A (en) | 1953-09-16 | 1954-09-15 | Manufacturing process of asymmetric electrical conductor systems |
| GB26862/54A GB768462A (en) | 1953-09-16 | 1954-09-16 | A method for the manufacture of electric asymmetrically conducting systems |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DEL16646A DE1107830B (en) | 1953-09-16 | 1953-09-16 | Process for the production of electrically asymmetrically conductive systems |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE1107830B true DE1107830B (en) | 1961-05-31 |
Family
ID=7260494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DEL16646A Pending DE1107830B (en) | 1953-09-16 | 1953-09-16 | Process for the production of electrically asymmetrically conductive systems |
Country Status (3)
| Country | Link |
|---|---|
| DE (1) | DE1107830B (en) |
| FR (1) | FR1108247A (en) |
| GB (1) | GB768462A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1197556B (en) * | 1962-02-01 | 1965-07-29 | Telefunken Patent | Process for the production of semiconductor components |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3260625A (en) * | 1963-06-25 | 1966-07-12 | Westinghouse Electric Corp | Electron beam method for making contacts and p-n junctions |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2375353A (en) * | 1940-05-17 | 1945-05-08 | Bolidens Gruv Ab | Selenium rectifier |
| GB571905A (en) * | 1944-01-12 | 1945-09-13 | William Warren Triggs | Selenium rectifiers |
| DE829018C (en) * | 1948-10-01 | 1952-01-21 | Sueddeutsche App Fabrik Gmbh | Process for tempering selenium layers for the production of dry rectifiers, barrier layer photocells |
| DE851527C (en) * | 1949-04-29 | 1952-10-06 | Western Electric Co | Semiconductor amplifier |
| US2644852A (en) * | 1951-10-19 | 1953-07-07 | Gen Electric | Germanium photocell |
-
1953
- 1953-09-16 DE DEL16646A patent/DE1107830B/en active Pending
-
1954
- 1954-09-15 FR FR1108247D patent/FR1108247A/en not_active Expired
- 1954-09-16 GB GB26862/54A patent/GB768462A/en not_active Expired
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2375353A (en) * | 1940-05-17 | 1945-05-08 | Bolidens Gruv Ab | Selenium rectifier |
| GB571905A (en) * | 1944-01-12 | 1945-09-13 | William Warren Triggs | Selenium rectifiers |
| DE829018C (en) * | 1948-10-01 | 1952-01-21 | Sueddeutsche App Fabrik Gmbh | Process for tempering selenium layers for the production of dry rectifiers, barrier layer photocells |
| DE851527C (en) * | 1949-04-29 | 1952-10-06 | Western Electric Co | Semiconductor amplifier |
| US2644852A (en) * | 1951-10-19 | 1953-07-07 | Gen Electric | Germanium photocell |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1197556B (en) * | 1962-02-01 | 1965-07-29 | Telefunken Patent | Process for the production of semiconductor components |
Also Published As
| Publication number | Publication date |
|---|---|
| GB768462A (en) | 1957-02-20 |
| FR1108247A (en) | 1956-01-10 |
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