DE1089014B - Circuit arrangement for magnetic core corrector - Google Patents

Description

GERMAN

The invention relates to circuit arrangements for correctors, such as those used, for example, in telephone exchanges come to use and in which a plurality of core groups made of ferromagnetic Material is provided in which each core has a separate magnetically coupled to the core Output wire is assigned and in which a plurality of input wires are also provided each of which is magnetically coupled to a plurality of cores selected from the different Groups of respective magnetic cores are selected.

In such correctors, if they are operated in the normal way, a after signal transmitted to an input wire output signals in the output wires of each core, which is magnetically coupled to the input wire, induced.

For example, a corrector can consist of four core groups, each of which in turn consists of ten Has cores which correspond to the digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9. Different input cores can be threaded through different sets of cores, each set of which has four cores, one in each group. A choice of four cores, one of each of the four Groups, corresponds to the four digits of a four-digit code or phone number. On the transmission of a corresponding signal to one of the input cores are output signals in four Caused output wires, which reproduce a four-digit decimal number. Often the kernels are in Form of rings and the input cores loosely threaded through the rings to thereby to effect the magnetic coupling. Such an arrangement has proven to be particularly useful, because there is a change in the code numbers corresponding to a given input wire can be carried out easily. So the wire is pulled out of one core set and through a new one Threaded core set through to achieve the desired change.

Sometimes a corrector of the aforementioned type is needed, in which measures are taken are the times of occurrence, at which output signals from the different core groups and a purpose of the present invention is to provide one such a corrector.

According to the invention, a corrector of the aforementioned type contains a plurality of control cores, each magnetically coupled to all cores of the core groups, and a control circuit which is connected to the control cores and is designed so that it flows in predetermined control cores circuit arrangement
for magnetic core correctors

Applicant:
Ericsson Telephones Limited, London

Representative: Dipl.-Ing. E. Schubert, patent attorney,
Siegen, Oranienstr. 14th

Claimed priority:
Great Britain January 2, 1958

Arye Leib Freedman, Stevenage, Hertfordshire

(Great Britain),
has been named as the inventor

or combinations of ^ control cores to be able to selectively produce output signals to allow in the output cores of the different core groups, or alternatively to evoke of output signals in output cores of the different core groups, namely below to effect the transmission of an input signal to an input wire.

In the course of this description, the term switchable core is intended to mean a component made of ferromagnetic Material that has such a hysteresis loop that it is open to transmission and removal a magnetic field with a corresponding sense of direction to thereby determine the magnetization state of the material from one to the other two stable states, which in the following are referred to as the normal or initial state and as an alternative state and which after the saturation of the core in the two opposite directions after removal of the external field remain behind, if the strength of the magnetic field with a corresponding sense of direction is increased from zero to a first value, the magnetic flux within the material increases by a relative small value changes, and then when the strength of the magnetic field exceeds the first value by one is increased compared to the first value, a relatively strong magnetic flux change, which is caused by a change in sign is accompanied, and finally when the strength of the magnetic field occurs

009 607/93

is then reduced to zero, only a relatively small change in magnetic flux occurs.

Suitable materials are those that have hysteresis loops have the shape known in the art as rectangular. One can from speak of a rectangular hysteresis loop as a loop in which the remanence is both in the normal and also in the alternative state is 80% or more of the saturation induction. Foregoing However, the definition is not limited to cores made of such material.

An input signal can be transmitted to an input wire and output signals in succession from the cores to which the input wire is magnetically coupled. If the core groups correspond to the code numbers of a code number, the signals which the code numbers the key figure that corresponds to a given input wire, caused in succession will.

The invention can be carried out using the saturation effect of ferromagnetic cores by transmitting currents in the control cores with such strength that they lead to the It is sufficient to saturate all cores in those groups to which the cores are assigned. The input signals can be used as impulses with such a sense of direction are transmitted that they the nuclei in the same sense of direction as the currents in the control cores magnetize. A pulse in an input wire only causes an output signal in the output wire of a core, but not in a group of cores, the control wire of which is excited by the control circuit will. A succession of input pulses can be produced in an input wire, and the different control cores can alternately be de-energized while the other Control cores are excited. Thus, the code numbers of a code number can be derived in sequence. The succession of input pulses can be caused by a rectified alternating current will. In an alternative embodiment, a non-rectified alternating current in an input wire, with either rectifiers in the output wires of each Kerns are provided, which in these signals induced in the output wires half the cycle of the alternating current, which counteract the currents in the control cores, or the currents in the control cores can be so strong that they exceed the saturation of the cores in a sufficient manner bring out to prevent a still detectable output signal from the alternating current is induced.

When switchable cores are used, the invention can be used in a variety of ways be performed.

A current that is half as strong as the current required to switch a core can be used is to be transmitted to an input wire as an input signal, and there can be another current that is half as much as strong as the current that is required to switch a core through the control circuit according to the Control wire to be transmitted, which is assigned to a core group, from which an output signal it is asked for. A similar effect can be achieved by conveying a countercurrent in a Retention wire can be obtained, which is magnetically coupled to all cores, the countercurrent so it is strong that it is sufficient to cancel the effect of the current which is used as the input signal is transmitted to an input wire, but is again so strong that it is used to switch itself one core is sufficient. The control circuit transmits a current in the control wire, that of a core group is assigned from which an output signal is desired, the current being so strong that it sufficient to shell the core in that core group in which the effect of the countercurrent

ίο through the current in an assigned input wire is extinguished.

In further embodiments in which switchable cores are used, an input in an input wire is designed so that it can switch the state of those cores to which the wire is magnetically coupled, from a normal state to the alternative state. Rectifiers are built into the output wires of the cores, which only allow the output pulses to flow in the output wires when the cores are switched back from the alternative state to the normal state. The cores, which are state ^r in Alternath be switched back at predetermined times by currents in the Steuerädern in the normal state. This is how output signals are generated. The invention will now be explained in more detail with reference to the drawing reproduced by way of example, namely shows

1 shows a schematic circuit arrangement of an exemplary embodiment according to the invention, while

2 shows a schematic circuit arrangement of a second exemplary embodiment according to the invention.

Reference is first made to FIG. 1, in which a corrector consists of forty cores CS made of saturable ferromagnetic material. The cores are each arranged in four rows of ten cores, the cores in each row being labeled 0, 1, 2, 3, 4, 5, 6, 7, 8, 9. Each core has an output wire U, which is provided individually for each core.

A number of input cores, four of which, A, B, C, D _{1 are} shown, are provided, each of which is threaded through a core in each of the four groups. The core A is threaded through the core 2 of the first group, through the core 4 of the second group, through the core 1 of the third group and through the core 6 of the fourth group. Wire A thus corresponds to the code number 2, 4, 1, 6. The wires are connected to respective pulse sources 5. The wire A is excited by the source 6 *, which is connected to it, in order to receive output pulses corresponding to the codes 2, 4, 1, 6. However, the corrector is designed so that the four codes are obtained consecutively and not all at the same time. For this purpose, four control wires Kl, K2, KZ and K 4 are threaded through the cores CvS ″ in the four groups. Each S expensive wire is connected to the output of a corresponding bistable device F1 to I ⁷ 4 when it is in its one switching state, a current flows through the corresponding control wire which is so strong that all those cores through which this control wire is threaded are saturated. When the bistable device is in its other switching state, flows however, no current via the control wire.

Each bistable device has two inputs, one of which is separately connected to a pulse generator

switched, while the other is connected in common to this pulse generator. The pulse generator causes a pulse sequence in the following way: A pulse P1 is transmitted to the bistable device F 1. Thus, the bistable device Fl is brought into its second switching state, while the bistable devices F 2 to i ⁷ 4 persist in their first switching state. Accordingly, no current flows in the control wire Kl ₁ , but a current flows in the control wheels K 2 to K 4. In response to the transmission of a pulse from a source 5 * to wire A , there is an output in the output wire U of core 2 in the first group induced. No output pulse is induced in the output cores of the other cores through which core A is wound, since the input pulse caused by the source .S only tries to bring these cores further beyond saturation, since it has such a polarity that it acts in the direction of the already existing saturation.

The pulse generator then generates a pulse Q, which is transmitted to all bistable devices together. This pulse is a reset pulse which returns the bistable device F1 to its first switching state. A pulse P 2 is then transmitted to the device F 2 , which brings it into its second switching state. Accordingly, upon the transmission of a further pulse in wire A, an output signal is induced in the output wire of core 4 in the second group. Another pulse Q brings the bistable device F 2 back to its initial state. A pulse P 3 sets the bistable device F 3 and the next pulse in wire A induces an output in the output wire of core 1 in the third group. After the transmission of a further reset pulse Q , a pulse P 4 brings the bistable device F 4 into its second switching state, and a further pulse in wire A induces an output in the output wire of core 6 in the fourth group. The pulse generator now continues to produce further pulse trains Pl, P 2, P 3 and P 4 with intervening pulses Q , and each time the four-digit code corresponding to one of the wires A, B ₁ C , etc. is desired, a A succession of four precisely timed pulses caused by the source 6 ″, which is connected to the selected wire.

In another procedure, the source 5 "produces alternating current signals in the cores A, B, C etc. Rectifiers R can then be provided in each of the output cores of the cores CS and polarized in such a way that they prevent the flow of a current which is in the Output windings would be induced by those sections of each cycle of the alternating current which tend to counteract the effect of the currents in the control cores. However, the rectifiers R do not necessarily have to be provided. If the currents in the control cores are dimensioned sufficiently strong, the alternating current signals are unable to bring the cores through which the control wires are threaded and through which an excitation control wire is also threaded out of the saturation state, and an output signal, as already described in the previous embodiment, is only in the output winding of a core of that group induced whose control artery is not excited i st.

In Fig. 2 a similar series arrangement of forty cores is illustrated, which in this case, however, consists of cores made of a ferromagnetic !! Are material having a hysteresis loop of the shape known in the art as rectangular. The cores are in turn equipped with individual output wires and a plurality of input wires A, B, C , etc. Each input wire is threaded through a core of each of the four groups of ten cores each. Again, control cores are Kl, K2, K3 and K4. intended. The bistable devices are replaced by coincidence circles or gates G1, G2, GZ, G 4, which are excited by the pulse generator. The gates are arranged to produce successive outputs in each cycle of operation. So each gate is connected with one input to a common line L and with one at its input to one of the lines Ll to L4, which are provided individually for the gate. The pulse generator generates a pulse P1 of relatively long duration in the L wire and, one after the other, the pulses P2, P3, Pi, P5 in the wires Ll to L 4. A reset pulse is transmitted to a wire RR, which is threaded through all forty cores, following the transmission of each of the pulses P2 to P 5. When pulses P1 and P 2 are transmitted to the gate G 1 at the same time Wire K 1 caused an output pulse. This is half as strong as the amplitude that is required to switch a nucleus from the normal state to the alternative state. Each source 6 ″ supplies a current in its assigned input wire A ₁ B or C etc., which in turn is half as strong as the amplitude required to switch the cores through which this wire is threaded from the normal state to the alternative state Accordingly, when an input current is transmitted in wire A, which, as can be seen, corresponds to code number 2142, when gate Gl causes an output pulse P 2 , an output signal is produced in the output wire of core 2 in the first group a reset pulse in the wire RR brings this core back to its normal state. The subsequent output pulse P 3 from gate G2 induces an output pulse in the output wire of core 1 in the second group. The subsequent transmission of further reset pulses and the pulses P 4 and P 5 causes output signals to be induced in the output wires of core 4 in the third group and core 2 in the fourth group become T.

Again, this embodiment can operate in alternative procedures. For example, the pulse generator can excite the wire RR with a continuous current which is so high and has such a sign that each core in the alternative state is switched to the normal state. The currents in the wires A, B, C etc. are then so strong that they automatically switch those cores through which the wires are threaded from the normal state to the alternative state. The current pulses in the control cores Kl to K 4 have similar amplitudes. In this case, only one core, through which both an excited wire in rows Kl to Ki and an excited input wire is threaded, is switched from its normal state to the alternative state, whereby an output pulse is induced in its output wire. The core switched in this way is activated immediately when the current pulse is in the

energized S expensive winding is discontinued, brought back to the normal state by the continuous current in the wire RR.

If desired, the output wire of each core CS can be provided with a rectifier R in order to pass output pulses only when the cores change from their normal state to the alternative state or from the alternative state to the normal state.

In a further exemplary embodiment, the wire RR is omitted. The current supply in wires A, B, C etc. has such an amplitude that all cores through which this wire is wound are switched from the normal state to the alternative state. Rectifiers are installed in each output wire that is coupled to the cores, which are polarized in such a way that no current is allowed through when the cores are switched from the normal state to the alternative state. The output pulses from the ports Gl to Gi have such an amplitude and such a sign that they return each nucleus in the associated group which is in the alternative state to the normal state. Thus, when a current is transmitted to wire A , the cores corresponding to the code numbers 2, 1, 4, 2 are switched to the alternative state. Through the gates GI ₁ G2, GZ, G 4 pulses are generated in succession, which alternately bring these cores back to the normal state and alternately cause output pulses in their output wires.

Claims (14)

PATENT APPLICATIONS: 1. Circuit arrangement for magnetic core correctors in telecommunications, in particular telephone systems, with a plurality of core groups made of ferromagnetic material, in which each core is assigned a separate output wire magnetically coupled to the core, and with a plurality of input wires, each of which is magnetic with several Cores of the groups is coupled, characterized in that a control circuit and control cores (Kl to Ki) are provided in order to respond to the transmission of an input signal to an input core ( A ₁ B, C or D) in the output cores (U) of the different core groups ( CS 0 to CS9) to produce separate output signals in chronological order. 2. Circuit arrangement according to claim 1, characterized in that the control circuit is designed so that it all en S expensive wheels (K Ibis K 4), with the exception of a selected control wire, transmits currents of such strength that all cores (CS) in the groups which are assigned to the energized control cores (Kl to Ki) are saturated, and that input control devices which are connected to the input cores (A to D) are set up so that they input pulses in the input cores (A to D) with cause such a sense of direction that the cores (CS), which are coupled to an input wire (A, B, C or D), are magnetized in the same sense of direction as by the currents from the control circuit, so that the transmission of an input pulse to an input wire (A, B, C or D) an output pulse is only caused by that core coupled to the input wire (A, B ₁ C or D) which is in the group that corresponds to the selected control wire r (Kl, K 2, K 3 or Ki) is assigned. 3. Circuit arrangement according to claim 1, characterized in that the control circuit is set up so that it transmits currents of such strength to all control cores (ill to Ki) ₁ with the exception of a selected control core (Kl, K2, KZ or Ki), currents of such strength that all Cores (CS) in the groups which are assigned to the energized control cores are saturated, that input control devices which are connected to the input cores (A to D) are set up so that they produce alternating input signals in the input cores (A to D) and that are incorporated rectifier (R) in each of the output wires and so poled to pass only those currents flowing in the output leads (U) by magnetic flux transitions in the nuclei (CS) in the direction in which it through said streams are saturated, induced, so that upon the transmission of an input signal to an input wire (A, B, C or D) an output signal only in the output wire (U) of the one with the E is caused input vein coupled core, which is located in the group which is assigned to the selected S expensive vein (K 1, K 2, K 3 or Ki) . 4. Circuit arrangement according to claim 1, characterized in that the control circuit is set up so that it causes currents of greater strength in all control cores, with the exception of a selected control core, than is necessary for saturating all cores (CvS ") in those groups which are assigned to the energized control cores (K 1, K 2, K 3 or Ki) , and that input control devices which are connected to the input cores (A to D) are set up so that they alternate input signals in the input cores (A to -D), the amplitude of which is not strong enough to bring a core in a group that is assigned to an energized control core (Kl, K 2, K 3 or Ki) out of the saturation state, so that the transmission of an input signal after an input wire (A, B, C or D) an output signal is produced only in the output wire (U) of that core (CS ") coupled to the input wire, which core is in that group, w which is assigned to the selected control line (Kl, K2, KZ or Ki) . 5. Circuit arrangement according to claim 2, 3 or 4, characterized in that the control circuit is set up so that it as that control wire (Kl, K2, K3 or Ki) which is not energized, each of the control wires (Kl to Ki) in Sequence selects. 6. Circuit arrangement according to claim 2, 3, 4 or 5, characterized in that the control circuit has a plurality of bistable control devices (Fl to Fi) with output connections which are each connected to the control wires (Kl to Ki) , that each bistable control device ( Fl to Fi) has a first switching state in which a current is transmitted via its output terminal to the control wire connected to it (Kl, K2, KZ or Ki) , and has a second switching state in which no current is transmitted in this way and that the control circuit has a pulse generator which is set up so that it receives input pulses (Pl to P 4) after the bistable control circuits (Fl to I ⁷ 4) supplies in order to set them optionally in their first and second switching state. 7. Circuit arrangement according to claim 1, characterized in that the cores (CSO to CS 9) are switchable cores and that the control circuit is set up so that it receives currents in selected control cores (Kl, Kl, KZ or i £ 4) with that sign and causes about half the strength required to switch the cores (CS) from the normal state to the alternate state, and that the input wires (A to -D) are connected to input control devices which are arranged to have currents in the input wires (A to D) , which in turn have that sign and about half the strength that are required to switch the cores (KS) from the normal state to the alternative state, so that ao an output signal can only be obtained from a core that is coupled to an excited input wire (A, B, G or D) , with simultaneous excitation of the control wire (Kl, K 2, K 3 or iv4) which belongs to the group containing this core dnet is. 8. Circuit arrangement according to claim 7, characterized in that a reset wire (RR) is magnetically coupled to all cores (CS) and that the control circuit is arranged to excite the reset wire (RR) to thereby each core brought into the alternative state return to normal. 9. Circuit arrangement according to claim 1, characterized in that the cores (CS) are switchable cores, and that the control circuit is set up so that it has currents in selected control cores (Kl, K2, K3 or Kb) of the strength and the sign that are required to switch the cores (CS) from the normal state to the alternative state, and that it simultaneously causes a current in a retaining wire (RR) which is magnetically coupled to all cores (CS) and which has the strength and sign that are required to switch the cores (CvS ") from the alternative state to the normal state, and that the input wires (A to D) are connected to input control devices which are set up so that they have currents of that strength in the input wires (A to D) and produce that sign which are required to switch the cores from the normal state to the alternative state, so that an output signal from only one core (CS) is obtained can be held, which is coupled to an excited input wire (A, B, C or D) , with simultaneous excitation of the control wire (Kl, K2, K 3 or i £ 4), which is assigned to the group containing this core. 10. Circuit arrangement according to claim 9, characterized in that the current in the retaining wire (RR) is continuously transmitted during operation, whereby a core (CS) switched to its alternative state subsequently automatically returns to its normal state. 11. Circuit arrangement according to claim 7 to 10, characterized in that a rectifier (R) is switched on in each output wire (U) so that an output current pulse is only produced in an output wire (U) of a core (CS) when the state of the core changes from the normal state to the alternative state or changed from the alternative state to the normal state. 12. Circuit arrangement according to claim 7 to 11, characterized in that the control circuit is set up so that it causes currents in the control cores (Kl to Ki) in a predetermined sequence. 13. Circuit arrangement according to claim 1, characterized in that the cores (CS) are switchable cores, that the input cores (A to D) are connected to input control devices which are set up so that they all cores (CS) connected to a selected input core (A, B, C or -D) are coupled, switch from the normal state to the alternative state that the control devices are set up so that they then cause pulses in succession in the respective control cores (Ä'lbisi £ 4) to thereby the To bring cores (CS) back to normal in succession, and that a rectifier (R) is connected in each output wire (U) and polarized so that an output current pulse is only then produced in an output wire (U) of a core (CS) when this core is brought back from its alternate state to its normal state. 14. Circuit arrangement according to claim 12 or 13, characterized in that the control circuit has a plurality of gate circuits (Gl to G 4), the outputs of which are placed on the control wires (Kl to KA) and which require actuation pulses at two inputs to generate a current according to the assigned control wire (Kl, K2, K 3 or KA) to be transmitted, and that the control circuit has a pulse generator which is set up so that it emits a relatively long-lasting actuation pulse (Pl) after an input of the mentioned gate circuits (Gl to G 4 ) and, while this pulse is being transmitted, a sequence of relatively short-duration actuation pulses (P2 to PS ) are transmitted to the other inputs of the gate circuits (Gl to G 4). 1 sheet of drawings © 009 607/93 9.