DE10346278A1 - Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits - prevents boosting failure of computer system - Google Patents

Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits - prevents boosting failure of computer system Download PDF

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Publication number
DE10346278A1
DE10346278A1 DE2003146278 DE10346278A DE10346278A1 DE 10346278 A1 DE10346278 A1 DE 10346278A1 DE 2003146278 DE2003146278 DE 2003146278 DE 10346278 A DE10346278 A DE 10346278A DE 10346278 A1 DE10346278 A1 DE 10346278A1
Authority
DE
Germany
Prior art keywords
bios
memory circuit
bios memory
computer system
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE2003146278
Other languages
German (de)
Inventor
Huo-Yuan Lin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giga Byte Technology Co Ltd
Original Assignee
Giga Byte Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giga Byte Technology Co Ltd filed Critical Giga Byte Technology Co Ltd
Priority to DE2003146278 priority Critical patent/DE10346278A1/en
Publication of DE10346278A1 publication Critical patent/DE10346278A1/en
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1417—Boot up procedures

Abstract

An automatic recovery method of defective BIOS memory circuit in a computer system having memory apparatus containing dual BIOS memory circuits is disclosed in the present invention. A computer system contains a memory apparatus that includes a main BIOS memory circuit and a recovery BIOS memory circuit, which respectively store the first BIOS program and the second BIOS program for starting the operation of computer system. In addition, the main BIOS memory circuit or the safe recovery BIOS memory circuit even contains a BIOS flash utility such that, when the computer system is boosted, the chip enable circuit in the computer system first enables the recovery BIOS memory circuit and uses an error detection circuit to check and find if there is any error contained in the first BIOS program stored in the main BIOS memory circuit. If the first BIOS program stored in the main BIOS memory circuit contains error, the content of safe recovery BIOS memory circuit is used to program the main BIOS memory circuit via the BIOS flash utility. Then, the chip enable circuit disable the safe recovery BIOS memory circuit and enable the main BIOS memory circuit so as to continue the boosting procedure of computer system from main BIOS memory circuit.
DE2003146278 2003-10-06 2003-10-06 Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits - prevents boosting failure of computer system Ceased DE10346278A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE2003146278 DE10346278A1 (en) 2003-10-06 2003-10-06 Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits - prevents boosting failure of computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2003146278 DE10346278A1 (en) 2003-10-06 2003-10-06 Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits - prevents boosting failure of computer system

Publications (1)

Publication Number Publication Date
DE10346278A1 true DE10346278A1 (en) 2005-05-12

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ID=34428188

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Application Number Title Priority Date Filing Date
DE2003146278 Ceased DE10346278A1 (en) 2003-10-06 2003-10-06 Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits - prevents boosting failure of computer system

Country Status (1)

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DE (1) DE10346278A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1903436A2 (en) * 2006-09-18 2008-03-26 Fujitsu Siemens Computers GmbH Computer system and method for updating program code
CN100386732C (en) * 2005-07-05 2008-05-07 英业达股份有限公司 Computer platform spare-system programe long-distance switch-over operation and control method and system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5793943A (en) * 1996-07-29 1998-08-11 Micron Electronics, Inc. System for a primary BIOS ROM recovery in a dual BIOS ROM computer system
US5797023A (en) * 1994-10-17 1998-08-18 Digital Equipment Corporation Method and apparatus for fault tolerant BIOS addressing
WO2000079390A1 (en) * 1999-06-21 2000-12-28 Nokia Networks Oy Updating microprocessor boot software

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5797023A (en) * 1994-10-17 1998-08-18 Digital Equipment Corporation Method and apparatus for fault tolerant BIOS addressing
US5793943A (en) * 1996-07-29 1998-08-11 Micron Electronics, Inc. System for a primary BIOS ROM recovery in a dual BIOS ROM computer system
US5835695A (en) * 1996-07-29 1998-11-10 Micron Electronics, Llp Method for a primary BIOS ROM recovery in a dual BIOS ROM computer system
WO2000079390A1 (en) * 1999-06-21 2000-12-28 Nokia Networks Oy Updating microprocessor boot software

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100386732C (en) * 2005-07-05 2008-05-07 英业达股份有限公司 Computer platform spare-system programe long-distance switch-over operation and control method and system
EP1903436A2 (en) * 2006-09-18 2008-03-26 Fujitsu Siemens Computers GmbH Computer system and method for updating program code
EP1903436A3 (en) * 2006-09-18 2009-04-29 Fujitsu Siemens Computers GmbH Computer system and method for updating program code
US7941658B2 (en) 2006-09-18 2011-05-10 Fujitsu Siemens Computers Gmbh Computer system and method for updating program code

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8131 Rejection