CN1180346C - Autoamtic safe reset method of BIOS storage in computer system - Google Patents

Autoamtic safe reset method of BIOS storage in computer system Download PDF

Info

Publication number
CN1180346C
CN1180346C CNB011047267A CN01104726A CN1180346C CN 1180346 C CN1180346 C CN 1180346C CN B011047267 A CNB011047267 A CN B011047267A CN 01104726 A CN01104726 A CN 01104726A CN 1180346 C CN1180346 C CN 1180346C
Authority
CN
China
Prior art keywords
bios
memory storage
basic input
output system
computer program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB011047267A
Other languages
Chinese (zh)
Other versions
CN1371052A (en
Inventor
林火元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giga Byte Technology Co Ltd
Original Assignee
Giga Byte Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giga Byte Technology Co Ltd filed Critical Giga Byte Technology Co Ltd
Priority to CNB011047267A priority Critical patent/CN1180346C/en
Publication of CN1371052A publication Critical patent/CN1371052A/en
Application granted granted Critical
Publication of CN1180346C publication Critical patent/CN1180346C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Stored Programmes (AREA)

Abstract

The present invention relates to a method for a BIOS storage device in a computer system to make automatic and safe replies. The computer system is provided with a main BIOS storage device and a safe reply BIOS storage device, wherein the main BIOS storage device and the safe reply BIOS storage device are respectively used for storing a first BIOS program and a second BIOS program which are used for starting the computer system; one of the main BIOS storage device and the safe reply BIOS storage device also comprises a BIOS fast program. When the computer system is powered on, the safe reply BIOS storage device is energized, and an error detection circuit detects the first BIOS program; if an error exists, the content of the safe reply BIOS storage device reprograms the main BIOS storage device through the BIOS fast program. Then, a chip energizing circuit switches off the safe reply BIOS storage device and switches on the main BIOS storage device, and the main BIOS storage device continues a starting program of the computer system.

Description

The automatic safe restoration methods of the BIOS memory storage in a computer system
Technical field
The present invention recovers a main BIOS memory storage automatically with a security recovery BIOS memory storage relevant comprising in the computer system of double basic input/output systems (BIOS) memory storage one, and the startup when avoiding the start of computer system operates the method that makes a mistake and cause computer booting to be failed.
Background technology
In the framework of computing machine now, (basic input-output system BIOS) is most basic software in the computer elementary operation to Basic Input or Output System (BIOS).BIOS mainly is made up of the instruction set of computing machine low order, the characteristic of the most basic hardware testing, definition computing machine and handle basic work when computer operating is provided.Such as: when the computer booting, the start selftest of object computer is annotated the signal that keyboard sent, and the transmission or the like of information between the connectivity port.Therefore, initial running during computing machine one start all is to carry out running according to the content of BIOS.If BIOS goes wrong, computing machine can't be carried out the test as internal memory (RAM), hard disk (HD), central processing unit (CPU) etc. once starting shooting, just then computing machine can't successfully be started shooting.
Also because BIOS has possessed consequence like this in computer system, general all can with the program instruction set quick storage of BIOS one can permanent power-source free internal memory in, as Flash ROM, PROM, EPROM, EEPROM etc., and will be built in the motherboard of computing machine in this type of BIOS internal memory or put into the chipset of computer system, make its content not influenced by the power supply power supply and can forever preserve its content.
Yet the content of BIOS internal memory is not to be not have mistake fully.When the circuit structure of BIOS internal memory produces degeneration (degradation) or is subjected to the influence of uncertain operation along with the time, its content may run off or produce mistake, produce error when causing computer booting to carry out bios program, thereby cause computing machine can't finish start.
Summary of the invention
The object of the present invention is to provide a kind of method of automatic recovery BIOS memory storage, in order to comprise in the computer system of two BIOS memory storages of a main BIOS memory storage and a security recovery BIOS memory storage one, recover defective main BIOS memory storage with security recovery BIOS memory storage, start the running of computer system again with main BIOS memory storage.
For achieving the above object, the method that automatic safe of the present invention recovers the BIOS memory storage comprises the following steps: to provide one first Basic Input or Output System (BIOS) memory storage and one second Basic Input or Output System (BIOS) memory storage, described first Basic Input or Output System (BIOS) memory storage and the described second Basic Input or Output System (BIOS) memory storage store one first computer program and one second computer program respectively, and described first computer program and described second computer program are used to start the running of described computer system; When described computer system power-on, the described second Basic Input or Output System (BIOS) memory storage of switching on; Detect described first computer program and whether comprise mistake; And ought comprise mistake by described first computer program of detection, with the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
According to above-mentioned conception, memory storage that the described first Basic Input or Output System (BIOS) memory storage is a programmable and the described second Basic Input or Output System (BIOS) memory storage are the memory storage of non-programmable; Stored second computer program of first computer program that the described first Basic Input or Output System (BIOS) memory storage is stored and the described second Basic Input or Output System (BIOS) memory storage is identical or different.
The step of the described second Basic Input or Output System (BIOS) memory storage of above-mentioned energising comprises the chip power-on circuit that chip energising control end is provided, when described computer system power-on, with the described chip energising control end of the described chip power-on circuit device described second Basic Input or Output System (BIOS) memory storage of switching on; Above-mentioned chip energising control end adopts an input and output pin.
Detect described first computer program and whether comprise that wrong step comprises and utilize an error detect circuit to check the error detection data value that described first computer program is included, for judging whether described first computer program comprises mistake.
Above-mentioned error detection data value can be a verification and (checksum) data value, a parity data value or be a CRC data value.
In order to carry out reprogramming to the described first Basic Input or Output System (BIOS) memory storage, described first Basic Input or Output System (BIOS) memory storage or the described second Basic Input or Output System (BIOS) memory storage also comprise a quick program, are used for the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
Conception according to a further aspect of the invention, the invention provides a kind of method of startup one computer system operation, described method comprises the following steps: to provide one first Basic Input or Output System (BIOS) memory storage and one second Basic Input or Output System (BIOS) memory storage, described first Basic Input or Output System (BIOS) memory storage and the described second Basic Input or Output System (BIOS) memory storage store one first computer program and one second computer program respectively, and wherein said first computer program and described second computer program are used to start the running of described computer system; When described computer system power-on, the described second Basic Input or Output System (BIOS) memory storage of switching on, and detect described first computer program and whether comprise mistake; When described first computer program of detection comprises mistake, with the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming; Then, the switch on described first Basic Input or Output System (BIOS) memory storage and the described second Basic Input or Output System (BIOS) memory storage that cuts off the power supply; At last, start the running of described computer system with the described first Basic Input or Output System (BIOS) memory storage.
According to above conception, the described first Basic Input or Output System (BIOS) memory storage comprises a programmable memory storage, and the described second Basic Input or Output System (BIOS) memory storage comprises a non-programmable memory storage; Stored described second computer program of described first computer program that the described first Basic Input or Output System (BIOS) memory storage is stored and the described second Basic Input or Output System (BIOS) memory storage is identical or different.
The step of the described second Basic Input or Output System (BIOS) memory storage of wherein switching on comprises the chip power-on circuit that chip energising control end is provided, when described computer system power-on, with the described chip energising control end of the described chip power-on circuit described second Basic Input or Output System (BIOS) device of switching on; Above-mentioned chip energising control end adopts an input and output pin.
Detecting described first computer program and whether comprise wrong step, is to utilize an error detect circuit to check the error detection data value that described first computer program is comprised, for judging whether described first computer program comprises mistake.
Above-mentioned error detection data value system can be a verification and data value, a parity data value or is a cyclic redundancy check data value.
In order to carry out reprogramming to the described first Basic Input or Output System (BIOS) memory storage, described first Basic Input or Output System (BIOS) memory storage or the described second Basic Input or Output System (BIOS) memory storage also comprise a quick program, are used for the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
The accompanying drawing summary
Purpose of the present invention, characteristics and advantage are by obtaining more deep understanding below in conjunction with accompanying drawing to the detailed description of a preferred embodiment of the present invention.
Fig. 1 is the computer system functions calcspar that comprises two BIOS memory storages according to a preferred embodiment of the present invention; And
Fig. 2 is the BIOS memory storage automatic safe restoration methods process flow diagram in according to a preferred embodiment of the present invention the computer system.
Better embodiment
See also Fig. 1, according to a preferred embodiment of the present invention, the computer system 10 of of the present invention pair of BIOS memory storage comprises a central processing unit 11, one internal memory 12, one chip power-on circuit 13, one error detect circuit 15, and two BIOS memory storages are respectively a main BIOS memory storage (main BIOS memory device) 17 and one security recovery BIOS memory storage (safe recovery BIOS memory device) 16.Wherein main BIOS memory storage 17 is the memory storage of a programmable, such as a quick ROM (read-only memory) (Flash ROM) or electronics can erase programmble read only memory PROM (EEPROM) composition, and security recovery BIOS memory storage 16 can be a non-programmable memory storage, such as a ROM (read-only memory) (ROM) composition.
Main BIOS memory storage 17 and security recovery BIOS memory storage 16 stored bios programs can be identical bios program, also can be different bios programs.And both stored bios programs all are made up of the computer program instruction set of the running that is used to start computer system 10.For can be in that the stored bios program of main BIOS memory storage 17 be detected when comprising mistake, can recover the stored bios program of main BIOS memory storage 17, main BIOS memory storage 17 or security recovery BIOS memory storage 16 also comprise a quick program (flashutility), be used for the bios program reprogramming master BIOS memory storage 17 that security recovery BIOS memory storage 16 is stored, so as to recovering the content of main BIOS memory storage 17.
Chip power-on circuit 13 shown in Figure 1 has chip energising control end 131, for example adopt a general purpose input and output pin (GPIO pin), be used to send a power on signal to chip energising (CE) pin 171 of main BIOS memory storage 17 and chip energising (CE) pin 161 of security recovery BIOS memory storage 16, switch the BIOS memory storage of desire energising.
And the BIOS memory storage automatic safe restoration methods in the computer system of a preferred embodiment of the present invention, the understanding that can obtain by the process flow diagram of Fig. 2 filling part.See also Fig. 2.Automatic safe of the present invention recovers the method for BIOS memory storage by step 21 beginning, and behind computer system power-on (step 22), the GPIO pin of chip power-on circuit just can make security recovery BIOS memory storage energising (step 23).At this moment, the error detect circuit of computing machine can go just to check whether the bios program that is stored in the main BIOS memory storage comprises mistake (judgement formula 24).And the technology of error-detecting can utilize inspection summation (checksum) data value or parity check (paritycheck) data value or unnecessary inspection (CRC) data value that circulates of checking a memory address of being scheduled to that is positioned at main BIOS memory storage whether to judge whether correctly that the content of main BIOS memory storage comprises mistake.If do not detect the mistake of any main BIOS memory storage content, then the GPIO pin of chip power-on circuit just can make the outage of security recovery BIOS memory storage and make main BIOS memory storage energising (step 26), and the running of computer booting is just proceeded (step 27) by main BIOS memory storage.Comprise mistake if detect main BIOS memory storage content, stored quick program then can be performed in then main BIOS memory storage or the security recovery BIOS memory storage, so that the bios program reprogramming master BIOS memory storage that security recovery BIOS memory storage is stored is so as to recovering the content (step 25) of main BIOS memory storage.After the step of reprogramming is finished, the GPIO pin of chip power-on circuit just can make the outage of security recovery BIOS memory storage and make main BIOS memory storage energising (step 26), and the running of computer booting is just proceeded (step 27) by main BIOS memory storage.Like this, the boot program of computer system just can successfully be finished, and whether at all can not be subjected to the stored bios program of main BIOS memory storage comprises vicious influence.
In sum, the present invention utilizes a security recovery BIOS memory storage that stores a bios program respectively with main BIOS memory storage to come as the security recovery device when main BIOS memory storage is detected when comprising mistake, and quick program is stored in main BIOS memory storage or the security recovery BIOS memory storage in the lump, when making the content of the BIOS of winner memory storage be detected mistake, carry out described quick program is recovered main BIOS memory storage with the stored bios program of security recovery BIOS device content.Such method makes a mistake in the time of can avoiding bios program to carry out and the result that causes computing machine to start shooting, makes the startup running of computing machine smooth.

Claims (16)

  1. One kind in a computer system in order to recover the method for a Basic Input or Output System (BIOS) memory storage, it is characterized in that described method comprises the following steps:
    One first Basic Input or Output System (BIOS) memory storage and one second Basic Input or Output System (BIOS) memory storage are provided, described first Basic Input or Output System (BIOS) memory storage and the described second Basic Input or Output System (BIOS) memory storage store one first computer program and one second computer program respectively, and described first computer program and described second computer program are used to start the running of described computer system;
    When described computer system power-on, the described second Basic Input or Output System (BIOS) memory storage of switching on;
    Detect described first computer program and whether comprise mistake; And
    Comprise mistake when detecting described first computer program, with the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
  2. 2. the method for claim 1 is characterized in that, the described first Basic Input or Output System (BIOS) memory storage comprises a programmable memory storage, and the described second Basic Input or Output System (BIOS) memory storage comprises a non-programmable memory storage.
  3. 3. the method for claim 1 is characterized in that, described first computer program is identical with described second computer program.
  4. 4. the method for claim 1 is characterized in that, described first computer program and described second computer program are different.
  5. 5. the method for claim 1 is characterized in that, the step system of the described second Basic Input or Output System (BIOS) memory storage of switching on comprises the following steps:
    The one chip power-on circuit with chip energising control end is provided; And
    When described computer system power-on, with the described chip energising control end of the described chip power-on circuit device described second Basic Input or Output System (BIOS) memory storage of switching on.
  6. 6. method as claimed in claim 5 is characterized in that, described chip energising control end is an input and output pin.
  7. 7. the method for claim 1 is characterized in that, detects described first computer program and whether comprises wrong step and comprise the following steps:
    One error detect circuit is provided;
    Check the error detection data value that described first computer program is comprised with described error detect circuit, for judging whether described first computer program comprises mistake.
  8. 8. method as claimed in claim 7 is characterized in that, described error detection data value comprises a verification and data value.
  9. 9. method as claimed in claim 7 is characterized in that, described error detection data value comprises a parity data value.
  10. 10. method as claimed in claim 7 is characterized in that, described error detection data value comprises a cyclic redundancy check data value.
  11. 11. the method for claim 1 is characterized in that, the described first Basic Input or Output System (BIOS) memory storage also comprises a quick program, in order to the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
  12. 12. the method for claim 1 is characterized in that, the described second Basic Input or Output System (BIOS) memory storage also comprises a quick program, is used for the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
  13. 13. a method that starts a computer system operation is characterized in that, described method is to comprise the following steps:
    One first Basic Input or Output System (BIOS) memory storage and one second Basic Input or Output System (BIOS) memory storage are provided, described first Basic Input or Output System (BIOS) memory storage and the described second Basic Input or Output System (BIOS) memory storage store one first computer program and one second computer program respectively, and described first computer program and described second computer program are in order to start the running of described computer system;
    When described computer system power-on, the described second Basic Input or Output System (BIOS) memory storage of switching on;
    Detect described first computer program and whether comprise mistake;
    Comprise mistake when detecting described first computer program, with the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming;
    The switch on described first Basic Input or Output System (BIOS) memory storage and the described second Basic Input or Output System (BIOS) memory storage that cuts off the power supply; And
    Start the running of described computer system with the described first Basic Input or Output System (BIOS) memory storage.
  14. 14. method as claimed in claim 13 is characterized in that, the step of the described second Basic Input or Output System (BIOS) memory storage of switching on also comprises the following steps:
    The one chip power-on circuit with chip energising control end is provided; And
    When described computer system power-on, with the described chip energising control end of the described chip power-on circuit device described second Basic Input or Output System (BIOS) memory storage of switching on.
  15. 15. method as claimed in claim 13 is characterized in that, detects described first computer program and whether comprises wrong step and more comprise the following steps:
    One error detect circuit is provided;
    Check the error detection data value that described first computer program is comprised with described error detect circuit, for judging whether described first computer program comprises mistake.
  16. 16. method as claimed in claim 13, it is characterized in that, the described first Basic Input or Output System (BIOS) memory storage also comprises a quick program, in order to the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming, and the described second Basic Input or Output System (BIOS) memory storage also comprises a quick program, in order to the described first Basic Input or Output System (BIOS) memory storage of the described second computer program reprogramming.
CNB011047267A 2001-02-20 2001-02-20 Autoamtic safe reset method of BIOS storage in computer system Expired - Lifetime CN1180346C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB011047267A CN1180346C (en) 2001-02-20 2001-02-20 Autoamtic safe reset method of BIOS storage in computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB011047267A CN1180346C (en) 2001-02-20 2001-02-20 Autoamtic safe reset method of BIOS storage in computer system

Publications (2)

Publication Number Publication Date
CN1371052A CN1371052A (en) 2002-09-25
CN1180346C true CN1180346C (en) 2004-12-15

Family

ID=4653996

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB011047267A Expired - Lifetime CN1180346C (en) 2001-02-20 2001-02-20 Autoamtic safe reset method of BIOS storage in computer system

Country Status (1)

Country Link
CN (1) CN1180346C (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1295903C (en) * 2002-11-18 2007-01-17 华为技术有限公司 A safe system starting method
CN1277211C (en) * 2003-05-06 2006-09-27 联想(北京)有限公司 Repair method for computer operation system
CN1317650C (en) * 2003-10-27 2007-05-23 联想(北京)有限公司 Method for automatically recovering BIOS based on hard disk protective space
CN1304948C (en) * 2004-10-14 2007-03-14 威盛电子股份有限公司 Memory analog device and method
CN1304947C (en) * 2004-10-14 2007-03-14 威盛电子股份有限公司 Switching equipment of memory analog device
CN100419678C (en) * 2004-12-04 2008-09-17 鸿富锦精密工业（深圳）有限公司 BIOS updating system and method
CN100451987C (en) * 2006-05-23 2009-01-14 北京金元龙脉信息科技有限公司 System and method for carrying out safety risk check to computer BIOS firmware
CN101131643B (en) * 2006-08-25 2010-08-25 佛山市顺德区顺达电脑厂有限公司 Computer system and restoring method thereof
CN101470613A (en) * 2007-12-28 2009-07-01 华硕电脑股份有限公司 Debugging method and starting method for computer system and its basic input/output system
CN101667128B (en) * 2008-09-05 2013-11-06 华硕电脑股份有限公司 Method for updating and repairing basic input and output system
CN101840365B (en) * 2010-04-30 2012-08-29 广州广电运通金融电子股份有限公司 Safe protection method and system for BIOS (Basic Input/Output System)
CN107632902B (en) * 2016-07-18 2021-03-30 深圳衡宇芯片科技有限公司 Method, controller and storage system for replying data in case of programming failure
CN114385247A (en) * 2020-10-21 2022-04-22 环达电脑(上海)有限公司 Starting-up method

Also Published As

Publication number Publication date
CN1371052A (en) 2002-09-25

Similar Documents

Publication Publication Date Title
CN1180346C (en) Autoamtic safe reset method of BIOS storage in computer system
US6061788A (en) System and method for intelligent and reliable booting
US20050081090A1 (en) Method for automatically and safely recovering BIOS memory circuit in memory device including double BIOS memory circuits
US8468389B2 (en) Firmware recovery system and method of baseboard management controller of computing device
EP1639468B1 (en) Network equipment and a method for monitoring the start up of a such an equipment
US7941658B2 (en) Computer system and method for updating program code
TWI470420B (en) Dubugging method and computer system using the smae
CN111324192A (en) System board power supply detection method, device, equipment and storage medium
CN103744764A (en) Crontab based whole computer memory stability test method
CN1971536A (en) Correcting system and method of basic in-out system
US20090217105A1 (en) Debug device for embedded systems and method thereof
CN101634960A (en) Method for revising BIOS parameter and regenerating checksum
US7574621B2 (en) Method and system for identifying and recovering a file damaged by a hard drive failure
CN100395713C (en) Method of automatic repairing basic input output system element and module
CN113315675B (en) White box switch U-Boot automatic testing method, system and storage medium
CN101477484A (en) Method and equipment for recovering destroyed main bootstrap program
CN103823725A (en) Debugging device and debugging method
CN102184115B (en) Method for updating system software and terminal device
CN109086162B (en) Memory diagnosis method and device
KR101393034B1 (en) Apparatus and method for restoring system
CN113867812B (en) Method, system, equipment and medium for BMC to acquire link information
CN103294573B (en) A kind of intelligent terminal and data back up method thereof
CN113094107A (en) Data protection method, device, equipment and computer storage medium
JP2004021922A (en) Pseudo memory failure injection device
TW575838B (en) Automatic recovery method of BIOS memory circuit in memory apparatus containing dual BIOS memory circuits

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20041215

CX01 Expiry of patent term