DE10342981A1 - Vorrichtung zur partiellen Bearbeitung von Wafern sowie Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers - Google Patents

Vorrichtung zur partiellen Bearbeitung von Wafern sowie Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers Download PDF

Info

Publication number
DE10342981A1
DE10342981A1 DE2003142981 DE10342981A DE10342981A1 DE 10342981 A1 DE10342981 A1 DE 10342981A1 DE 2003142981 DE2003142981 DE 2003142981 DE 10342981 A DE10342981 A DE 10342981A DE 10342981 A1 DE10342981 A1 DE 10342981A1
Authority
DE
Germany
Prior art keywords
foil
semiconductor wafer
adhesive foil
stripping
processing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE2003142981
Other languages
English (en)
Other versions
DE10342981B4 (de
Inventor
Karl Heinz Priewasser
Sylvia Winter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Disco Hi Tec Europe GmbH
Original Assignee
Infineon Technologies AG
Disco Hi Tec Europe GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, Disco Hi Tec Europe GmbH filed Critical Infineon Technologies AG
Priority to DE2003142981 priority Critical patent/DE10342981B4/de
Publication of DE10342981A1 publication Critical patent/DE10342981A1/de
Application granted granted Critical
Publication of DE10342981B4 publication Critical patent/DE10342981B4/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)

Abstract

Die Erfindung bezieht sich auf eine Vorrichtung zur partiellen Bearbeitung von Wafern mit einer Einrichtung zum Laminieren der aktiven Seite des Wafers 1 mit einer haftenden ersten Folie 2, gekennzeichnet durch eine Laminiervorrichtung zur Aufbringung einer haftenden Abziehfolie 3 auf die erste Folie 2 sowie durch eine Separiervorrichtung zum Abziehen der Abziehfolie 3 sowie definierter Bereiche der ersten Folie 2.
DE2003142981 2003-09-17 2003-09-17 Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers Expired - Lifetime DE10342981B4 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE2003142981 DE10342981B4 (de) 2003-09-17 2003-09-17 Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2003142981 DE10342981B4 (de) 2003-09-17 2003-09-17 Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers

Publications (2)

Publication Number Publication Date
DE10342981A1 true DE10342981A1 (de) 2005-04-21
DE10342981B4 DE10342981B4 (de) 2007-05-24

Family

ID=34352906

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2003142981 Expired - Lifetime DE10342981B4 (de) 2003-09-17 2003-09-17 Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers

Country Status (1)

Country Link
DE (1) DE10342981B4 (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008032319A1 (de) * 2008-07-09 2010-01-14 Epcos Ag Verfahren zur Herstellung eines MST Bauteils und MST Bauteil
DE102012101399B3 (de) * 2012-02-22 2013-08-01 Chih-hao Chen Methode zur umweltfreundlichen Bearbeitung von Substraten
DE102022201365A1 (de) 2022-02-10 2023-08-10 Robert Bosch Gesellschaft mit beschränkter Haftung Wafer-Vereinzelungsfolie

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6140151A (en) * 1998-05-22 2000-10-31 Micron Technology, Inc. Semiconductor wafer processing method
DE10008273A1 (de) * 2000-02-23 2001-08-30 Bosch Gmbh Robert Verfahren und Vorrichtung zur Montage von durch Vereinzelung aus einem Rohstück erzeugbaren Kleinbauelementen auf einen Träger

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001044144A (ja) * 1999-08-03 2001-02-16 Tokyo Seimitsu Co Ltd 半導体チップの製造プロセス

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6140151A (en) * 1998-05-22 2000-10-31 Micron Technology, Inc. Semiconductor wafer processing method
DE10008273A1 (de) * 2000-02-23 2001-08-30 Bosch Gmbh Robert Verfahren und Vorrichtung zur Montage von durch Vereinzelung aus einem Rohstück erzeugbaren Kleinbauelementen auf einen Träger

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008032319A1 (de) * 2008-07-09 2010-01-14 Epcos Ag Verfahren zur Herstellung eines MST Bauteils und MST Bauteil
US20110180885A1 (en) * 2008-07-09 2011-07-28 Epcos Ag Method for encapsulating an mems component
DE102008032319B4 (de) * 2008-07-09 2012-06-06 Epcos Ag Verfahren zur Herstellung eines MST Bauteils
US9051174B2 (en) * 2008-07-09 2015-06-09 Epcos Ag Method for encapsulating an MEMS component
DE102012101399B3 (de) * 2012-02-22 2013-08-01 Chih-hao Chen Methode zur umweltfreundlichen Bearbeitung von Substraten
DE102022201365A1 (de) 2022-02-10 2023-08-10 Robert Bosch Gesellschaft mit beschränkter Haftung Wafer-Vereinzelungsfolie
WO2023152264A1 (de) 2022-02-10 2023-08-17 Robert Bosch Gmbh Wafer-vereinzelungsfolie

Also Published As

Publication number Publication date
DE10342981B4 (de) 2007-05-24

Similar Documents

Publication Publication Date Title
WO2004051708A3 (de) Verfahren und vorrichtung zum bearbeiten eines wafers sowie wafer mit trennschicht und trägerschicht
SG111946A1 (en) Die bonding sheet sticking apparatus and method of sticking die bonding sheet
EP1523030A3 (de) Apparat und Methode zur Abtrennung einer Halbleiterscheibe von einem Träger
TW200618130A (en) Sheet peeling device and method
TW200520042A (en) Semiconductor module containing circuit elements, method for manufacture thereof, and application thereof
WO2006054024A3 (fr) Amincissement d'une plaquette semiconductrice
SG103375A1 (en) Protective tape applying and separating method
TW200514188A (en) Mounting device and mounting method
WO2005076794A3 (en) Die encapsulation using a porous carrier
TW200644106A (en) Support board separating apparatus, and support board separating method using the same
EP1496547A3 (de) Mehrschichtige Folie zum Schleifen einer Halbleiterscheibenrückseite
MY139597A (en) Film peeling method and film peeling device
SG134324A1 (en) Method and device for separating a reinforcing-plate fixed to a reinforced semiconductor wafer
SG113568A1 (en) Process for producing semiconductor devices, and heat resistant adhesive tape used in this process
WO2005091868A3 (en) Wafer scale die handling
WO2005024932A3 (en) Apparatus and method for removing semiconductor chip
EP1396883A3 (de) Substrat und Herstellungsverfahren dafür
WO2004032257A3 (de) Folie mit organischen halbleitern
MY139274A (en) Protective tape applying and separation method
TW200738547A (en) Method for affixing adhesive tape to semiconductor wafer, and apparatus using the same
FR2852618B1 (fr) Sol sportif notamment pour gymnases
DE10342981A1 (de) Vorrichtung zur partiellen Bearbeitung von Wafern sowie Verfahren zum selektiven Aufbringen einer Folie auf definierte Bereiche eines Wafers
DE602006013159D1 (de) Verringerung von anziehungskräften zwischen siliziumscheiben
WO2006015187A3 (en) System and method for assembly of semiconductor dies to flexible circuits
ATE422111T1 (de) Akustische oberflächenwellenanordnung und verfahren zu ihrer herstellung

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

Owner name: DISCO HI-TEC EUROPE GMBH, 85551 KIRCHHEIM, DE

R081 Change of applicant/patentee

Owner name: INFINEON TECHNOLOGIES AG, DE

Free format text: FORMER OWNERS: DISCO HI-TEC EUROPE GMBH, 85551 KIRCHHEIM, DE; QIMONDA AG, 81739 MUENCHEN, DE

Owner name: DISCO HI-TEC EUROPE GMBH, DE

Free format text: FORMER OWNERS: DISCO HI-TEC EUROPE GMBH, 85551 KIRCHHEIM, DE; QIMONDA AG, 81739 MUENCHEN, DE

Owner name: INFINEON TECHNOLOGIES AG, DE

Free format text: FORMER OWNER: DISCO HI-TEC EUROPE GMBH, QIMONDA AG, , DE

Owner name: DISCO HI-TEC EUROPE GMBH, DE

Free format text: FORMER OWNER: DISCO HI-TEC EUROPE GMBH, QIMONDA AG, , DE

R071 Expiry of right