DE102022117139A1 - Method for operating a power converter - Google Patents

Abstract

A method for operating a power converter with a power electronic circuit is described, which comprises at least one semiconductor switch, wherein by means of clocked control of the at least one semiconductor switch, an adjustable transmission ratio between voltages and / or currents at connections on a first side of the circuit and a second side of the Circuit is generated, wherein the control of the at least one semiconductor switch comprises a control signal with a clock frequency and an adjustable duty cycle, the duty cycle having a value in a first value range or in a second value range, the first value range comprising two extreme values and between a minimum value greater than zero and a maximum value less than one and the second value range includes the values zero and / or one. By means of an auxiliary variable with a third value range between minus one and one, a duty cycle for generating the control signals is changed in such a way that a transition from duty cycles with values close to zero or close to one to values of zero or one is improved. A power converter with a control device is set up to carry out the procedure.

Description

TECHNICAL FIELD OF THE INVENTION

The invention relates to a method for operating a power converter with a power electronic circuit with clocked semiconductor switches.

STATE OF THE ART

An electrical power converter is used to convert electrical power, for example converting a direct voltage into another direct voltage or a direct current into an alternating current or vice versa. In this case, a power converter establishes in particular a transmission ratio between voltages and/or currents at the connections of the power converter. For example, a DC/DC power converter can be arranged between a DC source, in particular a PV generator or a battery, and a load. The load can in particular be formed by a voltage intermediate circuit of another power converter, for example an inverter for exchanging electrical power between the DC source and an AC voltage network. Alternatively, a power converter can be arranged between a power supply network and a load, the load comprising, for example, an electrolyzer.

By specifically manipulating the transmission ratio of the power converter, both the voltages and the currents at the connections of the power converter can be adjusted. In a power converter with a power electronic circuit, semiconductor switches can be operated in a clocked manner, which interact with other components, so that the circuit is designed, for example, as a step-up converter, a step-down converter or as a (bidirectional) inverter. To set a desired transmission ratio, a suitable clock pattern for controlling the power semiconductors is then generated, which is converted into specific switching actions by the semiconductor switch, in particular by switching the semiconductor switch on and off using a control signal via a suitable driver circuit.

A large number of methods for generating clock patterns for semiconductor switches of power converters are known from the prior art. Some of the known methods use pulse width modulation, which involves adjusting the duty cycle between an on phase and an off phase within a given cycle, the duty cycle being modulated by means of a control to achieve the desired gear ratio.

The range of achievable transmission ratios of the power converter is generally limited to the achievable duty cycles. The semiconductor switches can be switched on for a maximum of one entire cycle (duty cycle equal to one) or at least not switched on at all in one cycle, i.e. switched off for the entire cycle (duty cycle equal to zero). Due to a finite switch-on and switch-off duration of the semiconductor switches, arbitrarily short switch-on and switch-off phases are not possible, so that the duty cycles cannot be set arbitrarily close to one or close to zero for electrical reasons and, in particular, there is no continuous transition of (permitted) duty cycles between zero and one and a duty cycle of zero or one is possible.

This can mean that the transmission ratio of a power converter cannot easily be continuously adjusted between the possible extreme values with a duty cycle of zero or one. Particularly near the extreme values, duty cycles would have to be set that cannot be implemented by the semiconductor switches. If, for example, with a control signal with a duty cycle close to zero, the desired switch-on phase of a switch essentially corresponds to its switch-on duration, the switch would already be switched off again according to the control signal, even though it is not yet fully switched on. This is particularly critical when transitioning from a gear ratio close to one to a gear ratio equal to one or when transitioning from near zero to zero.

Furthermore, various methods are known from the prior art in which the finite switch-on and switch-off durations are taken into account. In particular, corrected duty cycles can be generated as part of a control system, which produce the desired gear ratio even in the vicinity of the extreme values. However, such methods also have their limits and involve additional effort, for example in that it is necessary to measure the voltages and/or currents at the connections of the power converter and to regulate the resulting transformation ratio of the power converter. From the EP 1 662 641 B1 a method with a control loop is known in which such a voltage measurement is used as part of a two-point control for the targeted suspension of individual switch-on or switch-off phases.

OBJECT OF THE INVENTION

The invention is based on the object of demonstrating a method for operating a power converter with a semiconductor switch, with which a transition from duty cycles with values close to zero or close to one to values of zero or one is improved.

SOLUTION

The object is achieved by a method for operating a power converter with the features of patent claim 1 and by a power converter with the features of patent claim 7. Preferred embodiments are defined in the dependent claims.

DESCRIPTION OF THE INVENTION

In a method for operating a power converter with a power electronic circuit that includes at least one semiconductor switch, an adjustable transmission ratio between voltages and/or currents at connections on a first side of the circuit and a second side of the circuit is generated by means of clocked control of the at least one semiconductor switch . The control of the at least one semiconductor switch comprises a control signal with a clock frequency and an adjustable duty cycle, the duty cycle having a value in a first value range or in a second value range. The first value range includes two extreme values and extends between a minimum value greater than zero and a maximum value less than one, and the second value range includes the values zero and/or one, so that the control signal has a switch-on phase and a switch-off phase at a duty cycle in the first value range a duty cycle in the second value range has exclusively a switch-on phase or exclusively a switch-off phase. The duty cycle is set individually for each cycle depending on a target duty cycle, whereby the set duty cycle corresponds to the target duty cycle if the target duty cycle has a value that lies in the first or second value range.

The method according to the invention is characterized in that an auxiliary variable with a third value range between minus one and one is formed and the at least one semiconductor switch in the case of a target duty cycle which has a value between a value of the second value range and the adjacent extreme value of the first value range , is controlled with a control signal which, depending on the auxiliary variable, either has a duty cycle with the extreme value of the first value range, which is closest to the target duty cycle, or has a duty cycle with the value of the second value range, which is the target duty cycle next. The duty cycle for the control signal is set with the adjacent extreme value of the first value range if the auxiliary variable has a value greater than zero, or the duty cycle for the control signal is set with the adjacent value of the second value range if the auxiliary variable has a value smaller or equal to zero. The auxiliary variable is increased by one if it has a value less than or equal to zero, and the auxiliary variable is reduced in each cycle by a value which is the quotient of the difference between the target duty cycle and the adjacent extreme value of the first value range and the Difference between the value of the second value range adjacent to the target duty cycle and the extreme value adjacent to it.

The core idea of the invention is to have a target duty cycle that lies in the transition range between an extreme value of the first value range and the adjacent value of the second value range and therefore cannot be explicitly set as a duty cycle for a cycle due to the finite switch-on or switch-off phases of a semiconductor switch can set a sequence of several cycles with duty cycles that correspond to either the adjacent extreme value of the first value range or the adjacent value of the second value range. As a result, the duty cycle deviates from the target duty cycle for each cycle individually, but the duty cycles can be combined over the sequence, taking into account the auxiliary variables, so that, on average over several cycles, an effective duty cycle results that is between the respective extreme value of the first Value range and the adjacent value of the second value range and approximates the target duty cycle.

In contrast to the prior art, the method is independent of external variables, in particular independent of actual or target voltages at the connections of the power converter. In this respect, the determination of the duty cycle to be used is independent of measured values from the power converter and enables (temporarily) controlled operation based on the otherwise specified target duty cycle. With the help of the method, any compensating currents and the load on components of the power converter are reduced, particularly in the case of a dynamic change in the target duty cycle from a value in the first value range to a value in the second value range, and in particular in the case of a target duty cycle that is in the transition range for a long time between an ext rem value of the first value range and the adjacent value of the second value range, the controller and system stability is improved.

In one embodiment of the method, in the case of a target duty cycle that has a value between the maximum value of the first value range and one, the duty cycle is set for the control signal with the maximum value of the first value range if the auxiliary variable has a value greater than zero, and that Duty cycle set to one if the auxiliary variable has a value less than or equal to zero. In this embodiment, the minimum value of the first value range can be largely irrelevant and have a value close to or equal to zero, in particular if the power converter is not operated with a duty cycle close to or equal to zero due to its principle and in this respect the minimum value of the first value range is not undercut during operation; This is the case, for example, with a step-down converter.

In one embodiment of the method, in the case of a target duty cycle that has a value between zero and the minimum value of the first value range, the duty cycle is set for the control signal with the minimum value of the first value range if the auxiliary variable has a value greater than zero, and that Duty cycle set to zero if the auxiliary variable has a value less than or equal to zero. In this embodiment, the maximum value of the first value range can be largely irrelevant and have a value close to or equal to one, in particular if the power converter is not operated with a clock ratio close to or equal to one due to its principle and in this respect the maximum value of the first value range is not exceeded during operation; This is the case, for example, with a boost converter.

The method can be applied in various embodiments to power converters that are designed as buck converters or boost converters. Such DC-DC converters are generally operated with duty cycles that lie in the first range of values and only reach one of the values of the second range of values. This allows the process to be implemented easily and efficiently. In addition, in the operation of DC-DC converters, for example battery converters, over longer periods of time, i.e. over a large number of cycles, gear ratios may be required that require a duty cycle with a value between the first and second value ranges. In such a situation, the method can be used particularly advantageously, since the averaged actual duty cycle generated with it allows a good approximation of the target duty cycle.

In addition, the power converter can be designed as an inverter. Due to the sinusoidal curve of the transmission ratio of an inverter, the duty cycles in an inverter can, in case of doubt, pass through the first value range in each period and reach one or both values of the second value range. In such a situation, the method can be used particularly advantageously, since the current periodic target duty cycle is used in each cycle when calculating the duty cycle, so that the dynamic change in the target duty cycle is appropriately taken into account.

BRIEF DESCRIPTION OF THE FIGURES

• 1 zeigt ein Ablaufdiagramm einer Ausführungsform des anmeldungsgemäßen Verfahrens,
• 2a zeigt beispielhaft einen zeitlichen Verlauf von Tastverhältnissen bei Anwendung des anmeldungsgemäßen Verfahrens,
• 2b zeigt ein weiteres Beispiel eines zeitlichen Verlaufs von Tastverhältnissen bei Anwendung des anmeldungsgemäßen Verfahrens,
• 3a zeigt einen parametrisierten Verlauf des Tastgrades bei Verwendung eines herkömmlichen Verfahrens aus dem Stand der Technik,
• 3b zeigt einen parametrisierten Verlauf des Tastgrades bei Verwendung eines anmeldungsgemäßen Verfahrens,
• 4a zeigt beispielhaft zeitliche Verläufe von Soll- und Ist-Tastgrad bei Anwendung des anmeldungsgemäßen Verfahrens,
• 4b zeigt ein weiteres Beispiel von zeitlichen Verläufen von Soll- und Ist-Tastgrad bei Anwendung des anmeldungsgemäßen Verfahrens,

The invention is further explained and described below using exemplary embodiments shown in the figures.

• 1 shows a flowchart of an embodiment of the method according to the application,
• 2a shows an example of a time course of duty cycles when using the method according to the application,
• 2 B shows a further example of a time course of duty cycles when using the method according to the application,
• 3a shows a parameterized course of the duty cycle when using a conventional method from the prior art,
• 3b shows a parameterized course of the duty cycle when using a method according to the application,
• 4a shows an example of the time course of the target and actual duty cycle when using the method according to the application,
• 4b shows a further example of time curves of the target and actual duty cycle when using the method according to the application,

FIGURE DESCRIPTION

1 shows schematically a flow chart of a method according to the application for operating a power converter with a semiconductor switch, which is operated in a clocked manner to set a transmission ratio of the power converter.

In S0, the method starts with the receipt of a target duty cycle for the clocking of the semiconductor switch, which can be provided by a higher-level control of the power converter, in particular depending on a desired transmission ratio.

In S1 it is checked whether the target duty cycle is in a permitted value range, the permitted value range including those duty cycles that can actually be set by the semiconductor switch of the power converter. The permitted range of values includes a first range of values with duty cycles that include a switch-on phase and a switch-off phase of the semiconductor switch, as well as a second range of values that only includes a switch-on phase or only a switch-off phase, i.e. represents duty cycles of one or zero. The first range of values is limited by two extreme values at which the switch-on phase and the switch-off phase have the shortest possible adjustable time period. Specifically, the minimum value of the first value range can, for example, have the value 0.03, ie represent a clock with a very short switch-on phase, while the maximum value of the first value range can, for example, have the value 0.97, ie represent a clock with a very short switch-off phase.

A target duty cycle in the first value range can be implemented directly by switching the semiconductor switch on and off in the course of a cycle so that the duty cycle corresponds to the target duty cycle. A target duty cycle in the second value range can also be implemented directly by switching the semiconductor switch on or off for the entire duration of the relevant cycle. If the target duty cycle is in the first or second value range, the semiconductor switch can be controlled with a control signal that has a duty cycle that essentially corresponds to the target duty cycle

If it is determined in S1 that the target duty cycle is within this permitted value range, the method branches to step S5. In S5, a duty cycle for the current clock is output, which is converted into a control signal for the relevant semiconductor switch of the power converter in the following step S6 as part of a subsequent control or regulation.

If it is determined in S1 that the target duty cycle is outside the permitted value range, i.e. has a value between the first value range and the second value range, the method branches to S2. It is understood that there are two ranges outside the permitted range of values, namely between zero and the minimum value of the first range of values on the one hand and between the maximum value of the first range of values and one on the other hand.

S2 checks what value an auxiliary variable has. The auxiliary variable can have a value in a third value range between minus one and one and can basically have been initialized to any value within the third value range in advance of the method.

If the auxiliary variable has a value greater than zero in this cycle, the method branches to step S3a. In S3a, a duty cycle for the control signal is defined for the current clock, which corresponds to the adjacent extreme value of the first value range and is output in S5 for the current clock. Specifically, either the minimum value of the first value range is used if the target duty cycle is between zero and the minimum value of the first value range, or the maximum value of the first value range is used if the target duty cycle is between the maximum value of the first value range and one.

If the auxiliary variable has a value less than or equal to zero, a duty cycle for the control signal is defined in S3b for the current clock, which corresponds to the adjacent value of the second value range and is output in S5 for the current clock. Specifically, either the value zero is used if the target duty cycle is between zero and the minimum value of the first value range, or the value one is used if the target duty cycle is between the maximum value of the first value range and one. The auxiliary variable in S3 is then increased by one, so that the auxiliary variable is raised from the negative to the positive range.

Subsequently, in S4, in each case, i.e. both after S3a and S3c, the auxiliary variable is reduced by a value that is the quotient of the difference between the target duty cycle and the adjacent extreme value and the difference between the adjacent value of the second value range and the adjacent extreme value corresponds. The denominator of this quotient corresponds to the difference between zero and the minimum value of the first value range (i.e. the denominator is the minimum value of the first value range) or between the maximum value of the first value range and one. Since the extreme values of the first value range essentially reflect the switching capacity of the semiconductor switch, the denominator of this quotient can be fixed in the context of this exemplary embodiment, but in principle can also be set dynamically. The numerator of the quotient, on the other hand, depends on the position of the target duty cycle relative to the extreme values of the first value range and is greater the greater the deviation of the target duty cycle from the adjacent extreme value of the first value range or the closer the target duty cycle is is at the adjacent value of the second value range.

In S5, the duty cycle for the current cycle, which either corresponds to the target duty cycle or was set differently from the target duty cycle in S3a or S3b, is output to a subsequent control or regulation and in S6 into a control signal for the relevant semiconductor switch of the power converter implemented, with which this semiconductor switch is subsequently controlled. The method then branches back to S0 in order to determine the duty cycle to be set for the next cycle, taking into account the auxiliary variables changed in S4 and possibly in S3c and the target duty cycle that may have been changed externally in the meantime. For the following cycle the procedure is as follows 1 thus applied again, with the auxiliary variable having the value modified in the previous run. It is understood that the method uses the current target duty cycle in each cycle, whereby the target duty cycle can be identical or have changed in the following cycle. This ensures that a possible dynamic change in the target duty cycle is optimally taken into account in each individual cycle.

$$ski{p}_{n+1}=\{\begin{array}{cc}ski{p}_n& d{c}_{min}<d{c}_{in}<d{c}_{max}\\ ski{p}_n-\frac{d{c}_{in}-d{c}_{min}}{d{c}_{min}}& d{c}_{in}<d{c}_{min},ski{p}_n>0\\ ski{p}_n-\frac{d{c}_{in}-d{c}_{max}}{1-d{c}_{max}}& d{c}_{in}<d{c}_{max},ski{p}_n>0\\ 1+ski{p}_n-\frac{d{c}_{in}-d{c}_{min}}{d{c}_{min}}& d{c}_{in}<d{c}_{min},ski{p}_n\le 0\\ 1+ski{p}_n-\frac{d{c}_{in}-d{c}_{max}}{1-d{c}_{max}}& d{c}_{in}>d{c}_{max},ski{p}_n\le 0\end{array}$$

The following formulas express the process described above mathematically, where dc _is the target duty cycle, dc _max and dc _max are the extreme values of the first value range, skip _n is the auxiliary variable of the current clock, dc _out is the resulting duty cycle of the control signal and skip _n+1 is the auxiliary variable of the following cycle. $$d{c}_{Out}=\{\begin{array}{cc}d{c}_{in}& d{c}_{min}<d{c}_{in}<d{c}_{max}\\ d{c}_{min}& d{c}_{in}<d{c}_{min},ski{p}_n>0\\ d{c}_{max}& d{c}_{in}>d{c}_{max},ski{p}_n>0\\ 0& d{c}_{in}<d{c}_{min},ski{p}_n\le 0\\ 1& d{c}_{in}>d{c}_{max},ski{p}_n\le 0\end{array}$$

$$ski{p}_{n+1}=\{\begin{array}{cc}ski{p}_n& d{c}_{min}<d{c}_{in}<d{c}_{max}\\ ski{p}_n-\frac{d{c}_{in}-d{c}_{min}}{d{c}_{min}}& d{c}_{in}<d{c}_{min},ski{p}_n>0\\ ski{p}_n-\frac{d{c}_{in}-d{c}_{ma\mathrm{<figure-callout\; id="1"\; label="x"\; filenames="DE102022117139A1\_0010.png,DE102022117139A1\_0011.png"\; state="\{\{state\}\}">x</figure-callout>}}}{1-d{c}_{max}}& d{c}_{in}<d{c}_{max},ski{p}_n>0\\ 1+ski{p}_n-\frac{d{c}_{in}-d{c}_{min}}{d{c}_{min}}& d{c}_{in}<d{c}_{min},ski{p}_n\le 0\\ 1+ski{p}_n-\frac{d{c}_{in}-d{c}_{ma\mathrm{<figure-callout\; id="1"\; label="x"\; filenames="DE102022117139A1\_0010.png,DE102022117139A1\_0011.png"\; state="\{\{state\}\}">x</figure-callout>}}}{1-d{c}_{max}}& d{c}_{in}>d{c}_{max},ski{p}_n\le 0\end{array}$$

The resulting duty cycle dc _out corresponds to the target duty cycle dc _in if the target duty cycle dc _in is in the first value range between dc _min and dc _max ; in this case the auxiliary variable skip _n+1 remains unchanged. This also applies to the trivial case where the target duty cycle dc _in is zero or one and can therefore be implemented directly by the semiconductor switch.

bzw. $\frac{d{c}_{in}-d{c}_{max}}{1-d{c}_{max}}$

reduziert oder zusätzlich um eins erhöht wird.The resulting duty cycle dc _out corresponds to the adjacent extreme value dc _min or dc _mαx or the adjacent value of the second value range (zero or one), if the target duty cycle dc _out is outside the first value range and the second value range and is therefore straight from the semiconductor switch cannot be implemented directly. Depending on the current value of the auxiliary variable skip _n, a decision is made as to whether the duty cycle dc _min or zero or dc _max or one results for the respective cycle n, and whether the auxiliary variable skip _n+1 for the following cycle is only increased by the quotient $\frac{d{c}_{min}-d{c}_{in}}{d{c}_{min}}$

or. $\frac{d{c}_{in}-d{c}_{ma\mathrm{<figure-callout\; id="1"\; label="x"\; filenames="DE102022117139A1\_0010.png,DE102022117139A1\_0011.png"\; state="\{\{state\}\}">x</figure-callout>}}}{1-d{c}_{max}}$

is reduced or additionally increased by one.

It is understood that the method also includes embodiments in which the target duty cycles basically only lie in the first value range and between one of the values of the second value range, but can or will never lie between the first value range and the other of the values of the second value range . This can occur, for example, with a power converter that is designed as a step-up converter and is usually operated with target duty cycles between zero and a value (significantly) less than one, but rather not with a target duty cycle close to or equal to one, or with a Power converter, which is designed as a step-down converter and is usually operated with target duty cycles between one and a value (significantly) greater than zero, but rather not with a target duty cycle close to or equal to zero. In these cases, the method can be reduced to the fact that it is only applied in the transition area between the relevant value of the second value range and the first value range, while the irrelevant value of the second value range does not occur and the adjacent extreme value of the first value range probably does not occur or only is exceeded in exceptional cases. This simplifies the procedure in that the formulas given above then only need to use one of the values dc _max or dc _min .

2a shows an example of a time course of the resulting duty cycles dc _out over several clock cycles with a fixed target duty cycle dc _in of 0.975 and a maximum value dc _max of the first value range of 0.97. In the graphic above 2a The target duty cycle dc _in (horizontal line at the value 0.975) and the duty cycle dc _out resulting within a respective cycle are shown. Since the target duty cycle dc _in of 0.975 is above the first value range, it cannot be set directly as a duty cycle for technical reasons.

reduziert. Lediglich in etwa jedem sechsten Takt sinkt die Hilfsvariable skip_n dadurch unter null, so dass in dem entsprechenden Takt ein Tastverhältnis dc_out von 1 entsprechend dem angrenzenden Wert des zweiten Wertebereichs resultiert und die Hilfsvariable skip_n für den Folgetakt um eins erhöht wird.In the bottom graphic of 2a the auxiliary variable skip _n is shown with the same X-axis. With reference to 1 It can be seen that the auxiliary variable skip _n is usually greater than zero and therefore, when using the method according to the application, a duty cycle dc _out of 0.97, i.e. the adjacent maximum value dc _max of the first value range, is often set. The auxiliary variable skip _n is increased by the quotient in every bar $\frac{d{c}_{in}-d{c}_{ma\mathrm{<figure-callout\; id="1"\; label="x"\; filenames="DE102022117139A1\_0010.png,DE102022117139A1\_0011.png"\; state="\{\{state\}\}">x</figure-callout>}}}{1-d{c}_{max}}$

reduced. The auxiliary variable skip _n only drops below zero in approximately every sixth cycle, so that in the corresponding cycle a duty cycle dc _out of 1 results in accordance with the adjacent value of the second value range and the auxiliary variable skip _n is increased by one for the following cycle.

2 B shows an example of a time course of the resulting duty cycles dc _out over several clock cycles with a fixed target duty cycle dc _in of 0.995 and a maximum value dc _max of the first value range of 0.97. In the graphic above 2 B The target duty cycle dc _in (horizontal line at the value 0.995) and the duty cycle dc _out resulting within a respective cycle are shown. Since the target duty cycle dc _in of 0.995 is above the first value range, it cannot be set directly as a duty cycle for technical reasons.

reduziert und für den Folgetakt um eins erhöht, bleibt jedoch in der Regel negativ. Lediglich in etwa jedem sechsten Takt steigt die Hilfsvariable skip_n dabei über null, so dass in dem entsprechenden Takt ein Tastverhältnis dc_out von 0,97 entsprechend dem angrenzenden Maximalwert dc_max resultiert und die Hilfsvariable skip_n für den Folgetakt lediglich um den Quotienten $\frac{d{c}_{in}-d{c}_{max}}{1-d{c}_{max}}$

reduziert jedoch nicht erhöht wird.In the bottom graphic of 2 B the auxiliary variable skip _n is shown with the same X-axis. With reference to 1 It can be seen that the auxiliary variable skip _n is usually less than zero and therefore, when using the method according to the application, a duty cycle dc _out of 1, i.e. the adjacent value of the second value range, is often set. The auxiliary variable skip _n is increased by the quotient in every bar $\frac{d{c}_{in}-d{c}_{ma\mathrm{<figure-callout\; id="1"\; label="x"\; filenames="DE102022117139A1\_0010.png,DE102022117139A1\_0011.png"\; state="\{\{state\}\}">x</figure-callout>}}}{1-d{c}_{max}}$

reduced and increased by one for the following cycle, but usually remains negative. The auxiliary variable skip _n only rises above zero in approximately every sixth cycle, so that in the corresponding cycle a duty cycle dc _out of 0.97 results, corresponding to the adjacent maximum value dc _max , and the auxiliary variable skip _n for the following cycle only increases by the quotient $\frac{d{c}_{in}-d{c}_{ma\mathrm{<figure-callout\; id="1"\; label="x"\; filenames="DE102022117139A1\_0010.png,DE102022117139A1\_0011.png"\; state="\{\{state\}\}">x</figure-callout>}}}{1-d{c}_{max}}$

reduced but not increased.

3a shows a parameterized course of the resulting actual duty cycle (y-axis, “Resulting Duty Cycle”) depending on the set target duty cycle (x-axis, “Setpoint Duty Cycle”) when using a conventional method from the prior art in which the target duty cycle is applied directly as a control signal to the semiconductor switch of a power converter. It can be seen that target duty cycles less than 0.97 result in an actual duty cycle that is identical to the target duty cycle. However, at a target duty cycle above the maximum value dc _max of the first value range, here for example above dc _max = 0.97, the switch-off phase of the control signal is so short that the semiconductor switch effectively no longer switches off, so that at target duty cycles above 0 .97 effectively results in an actual duty cycle of 1. In addition, a dynamic transition of the target duty cycle from <0.97 to >0.97 results in a jump in the actual duty cycle. This is undesirable and can lead to disadvantages in the control of the power converter and possibly to undesirable compensation and even overcurrents.

3b shows a parameterized course of the resulting averaged actual duty cycle (y-axis, “Resulting averaged Duty Cycle”) depending on the set target duty cycle (x-axis, “Setpoint Duty Cycle”) when using a method according to the application. Due to the adaptive modification of the duty cycle at a target duty cycle greater than 0.97, the averaged actual duty cycle is largely identical to the target duty cycle for all values. It is understood that the actual duty cycle in 3b is averaged over several measures, compare also 4 .

The method according to the application therefore ensures, particularly with target duty cycles above 0.97, that no deviation occurs between the target duty cycle and the (averaged) actual duty cycle, so that the actual duty cycle corresponds to the desired target duty cycle. In the case of a dynamic variation of the target duty cycle, for example as part of a regulation of the input voltage of a DC/DC converter, a transition of the target duty cycle from <0.97 to >0.97 takes place without a jump in the actual duty cycle. In particular, in the case of a monotonic increase in the target duty cycle from a value <0.97 to a value of 1, this results in a likewise monotonically increasing course of the (averaged) actual duty cycle that is in particular proportional to the target duty cycle.

4a shows an example of the time course of the target duty cycle (solid line) and the resulting duty cycle (dotted line) when using a method according to the application. It can be seen that the duty cycle corresponds to the target duty cycle as long as the target duty cycle in the first value range is below the maximum value of the first value range of 0.97. As soon as the target duty cycle has left the first value range, the method according to the application takes corrective action and generates duty cycles that have either the value 0.97 or the value 1.

4b shows it 4a corresponding course of an actual duty cycle averaged over five cycles. It can be seen that the actual duty cycle follows the target duty cycle with slight deviations even at values above 0.97. This significantly improves the control of the power converter and, particularly during dynamic transitions of the target duty cycle from <0.97 to >0.97 or vice versa, compensating and overcurrents are significantly reduced.

It is understood that the 2 , 3 and 4 can be applied analogously and analogously to the other end of the value ranges, ie to target duty cycles with values between zero and the minimum value of the first value range. In addition, other window lengths are of course conceivable for displaying the averaged actual duty cycle.

Furthermore, it goes without saying that the duty cycles can be mathematically equivalently defined as "active high" or as "active low", where "active high" means that the value 1 represents the switched on state, while "active low" means that the Value 0 represents the switched on state. It follows from this that the description according to the application can be formulated in mirror symmetry from a mathematical point of view, so that the values 1 and 0 are essentially exchanged for one another without this changing the disclosed technical teaching.

QUOTES INCLUDED IN THE DESCRIPTION

This list of documents listed by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• EP 1662641 B1 [0007]

Claims (7)

Method for operating a power converter with a power electronic circuit which comprises at least one semiconductor switch, wherein an adjustable transmission ratio between voltages and / or currents at connections on a first side of the circuit and a second side of the circuit is generated by means of clocked control of the at least one semiconductor switch, wherein the control of the at least one semiconductor switch comprises a control signal with a clock frequency and an adjustable duty cycle, the duty cycle having a value in a first value range or in a second value range, the first value range comprising two extreme values and being between a minimum value greater than zero and one Maximum value extends less than one and the second value range includes the values zero and / or one, so that the control signal has a switch-on phase and a switch-off phase at a duty cycle in the first value range and exclusively a switch-on phase or exclusively an off phase at a duty cycle in the second value range, whereby this Duty cycle is set individually for each cycle depending on a target duty cycle, the set duty cycle corresponding to the target duty cycle if the target duty cycle has a value that is in the first or second value range, characterized in that an auxiliary variable with a third value range between minus one and one is formed and the at least one semiconductor switch is controlled with a control signal in the case of a target duty cycle which has a value between a value of the second value range and the adjacent extreme value of the first value range, which is dependent on the auxiliary variable either has a duty cycle with the extreme value of the first value range, which is closest to the target duty cycle, or has a duty cycle with the value of the second value range, which is closest to the target duty cycle, the duty cycle for the control signal being the same adjacent extreme value of the first value range is set if the auxiliary variable has a value greater than zero, and the duty cycle for the control signal is set with the adjacent value of the second value range if the auxiliary variable has a value less than or equal to zero, the auxiliary variable increasing by one is increased if it has a value less than or equal to zero, and the auxiliary variable is reduced in each cycle by a value which is the quotient of the difference between the target duty cycle and the adjacent extreme value of the first value range and the difference between that The value of the second value range adjacent to the target duty cycle and the extreme value adjacent thereto corresponds. Procedure according to Claim 1 , whereby for the control signal in the case of a target duty cycle which has a value between the maximum value of the first value range and one, the duty cycle is set with the maximum value of the first value range if the auxiliary variable has a value greater than zero, and the duty cycle of one is set if the auxiliary variable has a value less than or equal to zero. Procedure according to Claim 1 or 2 , whereby for the control signal in the case of a target duty cycle that has a value between zero and the minimum value of the first value range, the duty cycle is set with the minimum value of the first value range if the auxiliary variable has a value greater than zero, and the duty cycle of zero is set if the auxiliary variable has a value less than or equal to zero. Procedure according to one of the Claims 1 until 3 , whereby the power converter is designed as a step-down converter. Procedure according to one of the Claims 1 until 3 , whereby the power converter is designed as a step-up converter. Procedure according to one of the Claims 1 until 3 , whereby the power converter is connected to the inverter. Power converter with a control device which is used to carry out a method according to one of Claims 1 until 6 is set up.

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