DE102020213005A1 - power converter - Google Patents

Abstract

A power converter includes a network of switches including a first capacitor switch coupled to a first flying capacitor, a first switch for coupling a second flying capacitor to a first port, an inductor coupled to a ground switch. A driver drives the network of switches in two states. In the first state, the ground port is coupled to a second port through a first path that includes the first flying capacitor and the inductor, and the first port is coupled through a second path that includes the first switch, the second flying capacitor, and having the inductor is coupled to the second port. In the second state, ground is coupled to the second port via a third path including the ground switch and the inductor, and one of the first port and the ground port is coupled via a fourth path including the first flying capacitor, coupled to the second port while bypassing the inductor.

Description

Technical part

The present disclosure relates to a power converter and a method of operating the same. In particular, the present disclosure relates to a power converter that can be operated with a small output-to-input voltage conversion ratio, for example a conversion ratio Vout/Vin < 1/4.

background

Typical Voltage Regulator Modules (VRMs) used in industrial, server, networking, and computing applications are powered by a supply voltage (eg, 12V) that is much higher than the maximum input voltage of the load. For example, the power supply can be 12V and the input voltage of the load can be <1.8V for CPU, GPU, SoC or other memory module. There is therefore a need for efficient power conversion when the output-to-input voltage ratio V _OUT /V _IN is relatively small, for example less than ¼.

Conventional buck converters and three-level buck converters implement step-down voltage conversion by sinking (for a duty cycle D<1) a current pulse from the input terminal equal to the load current. As a result, the amplitude of the input current pulses is equal to the load current, leading to application noise and EMI problems. Polyphase converters distribute the load current across multiple inductors, increasing the duty cycle during which current is drawn from the input terminal. Thus, the level of the switched input current is reduced by the number of phases up to a given duty cycle. However, this approach requires the use of multiple coils, which increases the overall inductor core loss.

In addition, in conventional DC-DC converters, the inductor acts as a constant current source for short time intervals. Consequently, the inductor requires a significant time to respond to a sudden change in load current, thereby providing a limited transient load response.

It is an object of the disclosure to address one or more of the limitations noted above.

summary

According to a first aspect of the disclosure, there is provided a power converter for providing an output voltage with a desired conversion ratio, the power converter having a ground port, a first port and a second port, wherein when the power converter operates as a step-down converter , the first port receives an input voltage and the second port provides the output voltage, and when the power converter operates as a step-up converter, the second port receives an input voltage and the first port provides the output voltage; wherein the power converter includes a first flying capacitor coupled to a network of switches, an inductor coupled to the second port, and a driver; wherein the network of switches includes a first switch to couple the first flying capacitor to the first port; a second switch to couple the inductor to ground; wherein the drive device is configured to drive the network of switches with a sequence of states during a drive period, the sequence of states having a first state and a second state, wherein in the first state the ground port is coupled to the second port via a first path including the first flying capacitor and the inductor and the first port being decoupled from the second port, wherein in the second state the ground port is coupled to the second port via a second path including the second switch and comprises the inductor, and wherein the first port is coupled to the second port via a third path comprising the first flying capacitor while bypassing the inductor.

Optionally, the power converter further includes a second flying capacitor coupled to the second port via a first inductor switch, wherein the network of switches includes a capacitor switch between the first flying capacitor and the second flying capacitor.

Optionally, wherein in the first state the first path includes the first flying capacitor, the capacitor switch, the second flying capacitor and the inductor, and wherein in the second state the ground terminal is coupled to the second port via a ground path connecting the second switch, the second flying capacitor and the first inductor switch while bypassing the inductor.

Optionally, the network of switches includes a second capacitor switch between the first flying capacitor and the second flying capacitor and a ground switch to couple the second flying capacitor to ground.

Optionally, the inductor is coupled to the first flying capacitor through a second inductor switch, and the first flying capacitor is coupled to the second port through a third capacitor switch.

Optionally, wherein in the first state the ground port is coupled to the second port via another path that includes the ground switch, the second flying capacitor, the first inductor switch, and the inductor; and wherein in the second state the first port is coupled to the second port via a path comprising the capacitor switch, the second flying capacitor, the second capacitor switch, the first flying capacitor and the third capacitor switch while bypassing the inductor.

Optionally, the power converter further includes a third flying capacitor, the third flying capacitor having a first terminal coupled to the first flying capacitor through a first coupling switch and a second terminal coupled to the first flying capacitor through a second coupling switch is.

Optionally, the drive sequence includes a primary first state, a secondary first state, a primary second state, and a secondary second state.

Optionally, in the primary second state, the ground port is coupled to the second port via a first ground path having the second flying capacitor while bypassing the inductor, and the first port is coupled to the second port via a Path that has the first and third flying capacitors while bypassing the inductor.

Optionally, wherein in the secondary second state the ground port is coupled to the second port via the first ground path and a second ground path having the first and third flying capacitors while bypassing the inductor.

Optionally, in the primary and secondary first states, the ground port is coupled to the second port via a path comprising the first flying capacitor, the second flying capacitor, and the inductor.

Optionally, the driving sequence has a first additional state and a second additional state, wherein in the first additional state the first port is coupled to the second port via a path including the second and third flying capacitors and the inductor, and wherein in in the second additional state, the ground port is coupled to the second port via a path comprising the second and third flying capacitors and the inductor.

Optionally, the drive sequence has another first state in which the ground port is decoupled from the second port and the first port is coupled to the second port via a path that includes the inductor.

Optionally, the power converter further includes a current sensor for detecting an inductor current through the inductor, wherein the drive device is configured to open the second switch during the second state when it is detected that the inductor current has reached a threshold value. For example, the threshold may be a zero current value.

Optionally, the power converter is a step-down converter, where the first state is a magnetization state and the second state is a demagnetization state.

Optionally, the power converter is a step-up converter, where the first state is a demagnetization state and the second state is a magnetization state.

According to a second aspect of the disclosure, there is provided a method of converting power at a target conversion ratio, the method comprising providing a power converter having a ground port, a first port and a second port, wherein when the power converter operates as a step-down - operates, the first port receives an input voltage and the second port provides the output voltage, and when the power converter operates as a step-up converter, the second port receives an input voltage and the first port provides the output voltage; wherein the power converter includes a first flying capacitor coupled to a network of switches, an inductor coupled to the second port, and a driver; wherein the network of switches includes a first switch to couple the first flying capacitor to the first port; a second switch to couple the inductor to ground; driving the network of switches to a sequence of states during a driving period, the sequence of states having a first state and a second state, wherein in the first state the ground port is coupled to the second port via a first path that comprises the first flying capacitor and the inductor, and the first port is decoupled from the second port, wherein in the second state the ground port is coupled to the second port via a second path comprising the second switch and the inductor, and wherein the first port is coupled to the second port via a third path comprising the first flying capacitor while bypassing the inductor.

The options described in relation to the first aspect of the disclosure are also common to the second aspect of the disclosure.

According to a third aspect of the disclosure, there is provided a power converter for providing an output voltage with a desired conversion ratio, the power converter having a ground port, a first port and a second port, wherein when the power converter operates as a step-down converter , the first port receives an input voltage and the second port provides the output voltage, and when the power converter operates as a step-up converter, the second port receives an input voltage and the first port provides the output voltage, the power converter having a first on-the-fly a capacitor coupled to a network of switches, a second flying capacitor coupled to the network of switches, an inductor coupled to the second port, and a driver; the network of switches includes a first switch to couple the second flying capacitor to the first port; a ground switch to couple the inductor to ground; a first capacitor switch coupled to the first flying capacitor; wherein the drive device is configured to drive the network of switches with a sequence of states during a drive period, the sequence of states having a first state and a second state, wherein in the first state the ground port is coupled to the second port via a first path including the first flying capacitor and the inductor, and wherein the first port is coupled to the second port via a second path including the first switch, the second flying capacitor and the inductor, wherein in the second state the The ground port is coupled to the second port via a third path including the ground switch and the inductor, and one of the first port and the ground port is coupled to the second port via a fourth path including the first flying capacitor , while bypassing the inductor.

Optionally, in the second state, the first port is decoupled from the second port and the fourth path includes the second flying capacitor.

Optionally, in the second state, the ground port is coupled to the second port via a fifth path that includes the second flying capacitor while bypassing the inductor.

Optionally, the inductor has a first terminal coupled to the first flying capacitor via a first inductor switch and a second terminal coupled to the second port and the first flying capacitor coupled to the second port via a second capacitor switch .

Optionally, the second flying capacitor is coupled to the second port via a third capacitor switch.

Optionally, the power converter further includes a current sensor for detecting an inductor current through the inductor, wherein the drive device is configured to open the ground switch during the second state when it is detected that the inductor current has reached a threshold value. For example, the threshold may be a zero current value.

Optionally, the power converter is a buck converter, where the first state is a magnetization state and the second state is a demagnetization state.

Optionally, the power converter is a boost converter, where the first state is a demagnetization state and the second state is a magnetization state.

According to a fourth aspect of the disclosure, there is provided a method of converting power at a target conversion ratio, the method comprising providing a power converter having a ground port, a first port and a second port, wherein when the power converter operates as a step-down - or buck converter operates, the first port receives an input voltage and the second port provides the output voltage, and when the power converter operates as a step-up or boost converter, the second port receives an input voltage and the first port provides the output voltage, wherein the power converter further comprises a first flying capacitor coupled to a network of switches, a second flying capacitor coupled to the network of switches, an inductor coupled to the second port, and a driver; wherein the network of switches includes a first switch to couple the second flying capacitor to the first port; a ground switch to couple the inductor to ground; a first capacitor switch coupled to the first flying capacitor; driving the network of switches to a sequence of states during a driving period, the sequence of states having a first state and a second state, wherein in the first state the ground port is coupled to the second port via a first path that comprises the first flying capacitor and the inductor, and wherein the first port is coupled to the second port via a second path comprising the first switch, the second flying capacitor and the inductor, wherein in the second state the ground port is connected to the second port is coupled via a third path comprising the ground switch and the inductor, and wherein one of the first port and the ground port is coupled to the second port via a fourth path comprising the first flying capacitor while bypassing the inductor will.

Optionally, in the second state, the first port is decoupled from the second port and the fourth path includes the second flying capacitor.

Optionally, in the second state, the ground port is coupled to the second port via a fifth path that includes the second flying capacitor while bypassing the inductor.

The options described in relation to the third aspect of the disclosure are also common to the fourth aspect of the disclosure.

character list

• 1A ein Diagramm eines zweistufigen Buck- bzw. Abwärtswandlers ist;
• 1B ein Diagramm eines dreistufigen Abwärtswandlers ist;
• 1C ein Diagramm eines kombinierten Abwärtswandlers und kapazitiven Teilers ist;
• 1D ein Diagramm eines mehrstufigen Abwärtswandlers ist;
• 1E ein Diagramm eines anderen mehrstufigen Abwärtswandlers ist;
• 2 ein Ablaufdiagramm eines Verfahrens zum Vorsehen einer Spannung mit einem Eingangs-zu-Ausgangs-Umwandlungsverhältnis gemäß der Offenbarung ist;
• 3 ein Diagramm eines Leistungswandlers zum Implementieren des Verfahrens von 2 ist;
• 4A ein Diagramm eines Magnetisierungszustands zum Betreiben des Leistungswandlers von 3 ist;
• 4B ein Diagramm eines Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 3 ist;
• 4C ein Diagramm eines anderen Magnetisierungszustands zum Betreiben des Leistungswandlers von 3 ist;
• 4D ein Diagramm eines anderen Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 3 ist;
• 5 eine Darstellung einer Ansteuersequenz zum Betreiben des Leistungswandlers von 3 mit einem spezifischen Umwandlungsverhältnis ist;
• 6 ein Diagramm eines anderen Leistungswandlers zum Implementieren des Verfahrens von 2 ist;
• 7A ein Diagramm eines Magnetisierungszustands zum Betreiben des Leistungswandlers von 6 ist;
• 7B ein Diagramm eines Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 6 ist;
• 7C ein Diagramm eines anderen Magnetisierungszustands zum Betreiben des Leistungswandlers von 6 ist;
• 8 ein Diagramm eines anderen Leistungswandlers zum Implementieren des Verfahrens von 2 ist;
• 9A ein Diagramm eines Magnetisierungszustands zum Betreiben des Leistungswandlers von 8 ist;
• 9B ein Diagramm eines Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 8 ist;
• 10 ein Diagramm eines anderen Leistungswandlers zum Implementieren des Verfahrens von 2 ist;
• 11A ein Diagramm eines ersten Magnetisierungszustands zum Betreiben des Leistungswandlers von 10 ist;
• 11B ein Diagramm eines ersten Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 10 ist;
• 11C ein Diagramm eines zweiten Magnetisierungszustands zum Betreiben des Leistungswandlers von 10 ist;
• 11D ein Diagramm eines zweiten Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 10 ist;
• 12 eine Darstellung einer Ansteuersequenz zum Betreiben des Leistungswandlers von 10 ist;
• 13A ein Diagramm eines anderen Magnetisierungszustands zum Betreiben des Leistungswandlers von 10 ist;
• 13B ein Diagramm eines weiteren Magnetisierungszustands zum Betreiben des Leistungswandlers von 10 ist.
• 14 ein Ablaufdiagramm eines anderen Verfahrens zum Vorsehen einer Spannung mit einem Eingangs-zu-Ausgangs-Umwandlungsverhältnis gemäß der Offenbarung ist;
• 15 ein Diagramm eines Leistungswandlers zum Implementieren des Verfahrens von 14 ist;
• 16A ein Diagramm eines Magnetisierungszustands zum Betreiben des Leistungswandlers von 15 ist;
• 16B ein Diagramm eines Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 15 ist;
• 17 ein Diagramm eines anderen Leistungswandlers zum Implementieren des Verfahrens von 14 ist;
• 18A ein Diagramm eines Magnetisierungszustands zum Betreiben des Leistungswandlers von 17 ist;
• 18B ein Diagramm eines Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 17 ist.
• 19 ein Diagramm von 3 ist, das mit invertierten Eingangs- und Ausgangs-Ports dargestellt ist;
• 20A ein Diagramm eines Magnetisierungszustands zum Betreiben des Leistungswandlers von 19 ist;
• 20B ein Diagramm eines Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 19 ist;
• 21 ein Diagramm eines anderen Entmagnetisierungszustands zum Betreiben des Leistungswandlers von 19 ist.

The disclosure is described in more detail below by way of example and with reference to the accompanying drawings, in which:

• 1A Figure 12 is a diagram of a two stage buck converter;
• 1B Figure 12 is a diagram of a three stage buck converter;
• 1C Figure 12 is a diagram of a combined buck converter and capacitive divider;
• 1D Figure 12 is a diagram of a multi-level buck converter;
• 1E Figure 12 is a diagram of another multi-level buck converter;
• 2 Figure 12 is a flow chart of a method for providing a voltage with an input-to-output conversion ratio according to the disclosure;
• 3 a diagram of a power converter for implementing the method of FIG 2 is;
• 4A a diagram of a magnetization state for operating the power converter of FIG 3 is;
• 4B a diagram of a demagnetization state for operating the power converter of FIG 3 is;
• 4C a diagram of another magnetization state for operating the power converter of FIG 3 is;
• 4D a diagram of another degaussing state for operating the power converter of FIG 3 is;
• 5 a representation of a control sequence for operating the power converter of FIG 3 with a specific conversion ratio;
• 6 a diagram of another power converter for implementing the method of FIG 2 is;
• 7A a diagram of a magnetization state for operating the power converter of FIG 6 is;
• 7B a diagram of a demagnetization state for operating the power converter of FIG 6 is;
• 7C a diagram of another magnetization state for operating the power converter of FIG 6 is;
• 8th a diagram of another power converter for implementing the method of FIG 2 is;
• 9A a diagram of a magnetization state for operating the power converter of FIG 8th is;
• 9B a diagram of a demagnetization state for operating the power converter of FIG 8th is;
• 10 a diagram of another power converter for implementing the method of FIG 2 is;
• 11A a diagram of a first magnetization state for operating the power converter of FIG 10 is;
• 11B a diagram of a first degaussing state for operating the power converter of FIG 10 is;
• 11C a diagram of a second magnetization state for operating the power converter of FIG 10 is;
• 11D a diagram of a second degaussing state for operating the power converter of FIG 10 is;
• 12 a representation of a control sequence for operating the power converter of FIG 10 is;
• 13A a diagram of another magnetization state for operating the power converter of FIG 10 is;
• 13B a diagram of a further magnetization state for operating the power converter of FIG 10 is.
• 14 Figure 12 is a flowchart of another method of providing a voltage with an input-to-output conversion ratio in accordance with the disclosure;
• 15 a diagram of a power converter for implementing the method of FIG 14 is;
• 16A a diagram of a magnetization state for operating the power converter of FIG 15 is;
• 16B a diagram of a demagnetization state for operating the power converter of FIG 15 is;
• 17 a diagram of another power converter for implementing the method of FIG 14 is;
• 18A a diagram of a magnetization state for operating the power converter of FIG 17 is;
• 18B a diagram of a demagnetization state for operating the power converter of FIG 17 is.
• 19 a diagram of 3 is shown with the input and output ports inverted;
• 20A a diagram of a magnetization state for operating the power converter of FIG 19 is;
• 20B a diagram of a demagnetization state for operating the power converter of FIG 19 is;
• 21 a diagram of another degaussing state for operating the power converter of FIG 19 is.

Detailed description

the 1A and 1B show the topologies of conventional two- and three-stage buck converters. The two-stage buck converter provides an output current alternatively from the input terminal and the ground terminal. Consequently, the level of a pulsed input current I _IN (during an inductor magnetization) is equal to the load current I _OUT (zero otherwise): $$\frac{I_{IN}}{I_{OuT}}=1D\in \left[0.1\right]$$

For the three-stage buck converter, the flying capacitor CF can be _regulated to V _CF = V _IN /2, so that the magnetizing voltage across the inductor L is reduced towards V _L = V _IN /2 - V _OUT .

1C shows a combined step-down converter and capacitive voltage divider according to US8427113 . In this example, the flying capacitor _CF and the reservoir capacitor _CR are automatically charged to the same voltage V _CF = V _CR = V _IN /2. During the inductor magnetization state, the load current is supplied in parallel through the input terminal and the (charged) reservoir _{capacitor CR} , reducing the amplitude of the input current pulses (discontinuous current) to 1/2 the load current: $$\frac{I_{IN}}{I_{OuT}}=\frac{1}{2}D\in \left[0.1\right]$$

The above result describes a ratio of average currents during the period of inductor magnetization (an influence of an inductor current ripple is neglected). The relationship between input and output voltages is obtained by applying the volt-sec balance principle to the voltage of the inductor during the induction magnetization switch state DP and the inductor demagnetization switch state DV: $$\frac{V_{OuT}}{V_{IN}}=\frac{D}{2}{D}_P=D,D_V=1-DD\in \left[0.1\right]$$

From equation (3) a theoretical maximum voltage conversion ratio V _OUT /V _IN = 1/2 for D = 1 can be derived, where D is the duty cycle of the inductor magnetization state connecting the input to the output port of the converter. For _D =1, however, there is no time to redistribute the charge from the flying capacitor CF to the reservoir capacitor CR since this would require an infinite current causing a corresponding infinite I ² _R conduction loss. A more balanced current distribution is achieved by limiting the duty cycle to a value less than 1, for example D ≤ 3/4, resulting in a practical maximum voltage conversion ratio of V _OUT /V _IN = 3/8 for D = 3/4.

1D FIG. 12 shows a diagram of a multi-level hybrid buck converter, also known as a series capacitor buck converter in accordance with FIG US7230405 referred to as. In this example, while magnetizing (from the input terminal) one inductor, half the load current is provided through the second inductor (demagnetized from the ground terminal). As a result, the amplitude of the current pulses generated at the input is reduced. $$\frac{I_{IN}}{I_{OuT}}=\frac{1}{2}D\in \left[\mathrm{0.0.5}\right]$$

The flying capacitor can be regulated to V _CF = V _IN /2, so the relationship between input and output voltage follows equation (3). However, for a balanced inductor load current, the maximum possible duty cycle is reduced to D = 0.5: $$\frac{V_{OuT}}{V_{IN}}=\frac{D}{2}DP=D,DV=1-DD\in \left[\mathrm{0.0.5}\right]$$

This corresponds to a maximum voltage conversion ratio of V _OUT /V _IN = 1/4 for D = 0.5.

1E shows a derived topology of the converter from 1D , where the two flying capacitors C1 and C2 are both regulated to V _C1 = V _C2 = V _IN /2, further reducing the amplitude of the input current pulses down to: $$\frac{I_{IN}}{I_{OuT}}=\frac{1}{4}D\in \left[\mathrm{0.0.5}\right]$$

2 12 is a flowchart of a method for converting power at a target conversion ratio, in accordance with the disclosure.

In step 210, a power converter having a ground port, a first port, and a second port is provided. The power converter can operate as either a buck converter or a boost converter. When the power converter operates as a buck converter, the first port receives an input voltage and the second port provides the output voltage. When the power converter operates as a boost converter, the second port receives an input voltage and the first port provides the output voltage. The power converter includes a first flying capacitor coupled to a network of switches, an inductor coupled to the second port, and a driver. The network of switches includes a first switch for coupling the first flying capacitor to the first port; a second switch for coupling the inductor to ground.

In step 220, the network of switches is driven with a sequence of states including a first state and a second state. In the first state, the ground port is coupled to the second port via a first path that includes the first flying capacitor and the inductor, and the first port is decoupled from the second port. In the second state, the ground port is coupled to the second port via a second path including the second switch and the inductor, and the first port is coupled to the second port via a third path including the first flying capacitor , while bypassing the inductor. As a result, no current flows between the first port and the second port in the first state.

When the power converter operates as a buck converter, the first state is a magnetization state and the second state is a demagnetization state. Conversely, when the power converter operates as a boost converter, the first state is a demagnetization state and the second state is a magnetization state.

A current sensor can optionally be provided in order to detect an inductor current through the inductor. Then the second switch may be opened during the second state when the inductor current is detected to have reached a threshold.

This allows current flowing from the output to ground (negative inductor current) to be disabled when the output current is low.

Using the method of 2 allows to deliver an efficient power conversion, especially for a small step-down output-to-input voltage conversion ratio, for example for V _OUT /V _IN < ¼, or for large step-up voltage conversion ratios. By implementing a capacitive current path that bypasses the inductor, the losses due to the inductor DC resistance can be reduced, thereby improving converter efficiency and voltage regulation be improved. Additionally, the flying capacitor can act as additional output capacitance, improving response to a transient load current.

3 FIG. 3 is a diagram of a DC-DC converter 300 for implementing the method of FIG 2 . The DC-DC converter 300 includes an inductor L and a flying capacitor CF _coupled between a first port (input node 302) and a second port (output node 304) through a network of switches consisting of five switches S1, S2 , S3, S4, S5 is formed. An input capacitor Cin is provided between input node 302 and ground, and an output capacitor Cout is provided between output node 304 and ground. Capacitors Cin and Cout are connected to a fixed ground voltage and can be referred to as reservoir capacitors. The capacitor C _F has terminals provided with varying voltages and can be called a flying capacitor.

The flying capacitor C _F is coupled to the input node 302 through a first switch, input switch S1, and to ground through ground switch S4. Flying capacitor C _F has a first terminal coupled to node 306 and a second terminal coupled to node 308 . In addition, the second terminal of capacitor CF is coupled to output node ₃₀₄ via switch S3. Inductor L has a first terminal at node 310 and a second terminal coupled to output node 304 . The first inductor terminal is coupled to ground through switch S5 (which may be referred to as a _degauss switch) and to CF through first inductor switch S2 at node 306 . The second inductor terminal is coupled to output node 304 .

A driver 320 is provided for generating a plurality of control signals Ct1, Ct2, Ct3, Ct4, Ct5 to actuate the switches S1-S5, respectively. The control device 320 is designed to operate the DC-DC converter 300 with a sequence of states. The sequence of states may include a magnetization state for magnetizing the inductor and a demagnetization state for demagnetizing the inductor. The drive device may be configured to maintain the magnetization state and the demagnetization state for a predetermined duration during the drive period. For example, a magnetization state duty cycle and a demagnetization state duty cycle may be selected to achieve a desired transformation ratio.

4A shows the DC-DC converter of 3 , operating in a magnetization state DP in which switches S2 and S4 are closed while the remaining switches S1, S3 and S5 are open. The input node 302 is decoupled or separated from the output node 304 . Ground is coupled to output node 304 via a path that includes S4, _CF , S2, and inductor L.

4B shows the DC-DC converter of 3 , operating in a degaussing state DV in which switches S1, S3 and S5 are closed while the remaining switches S2 and S4 are open. The input node 302 is coupled to the output node 304 via an input path that includes _CF and S3 and bypasses the inductor L . Ground is coupled to output node 304 via a degaussing path that includes S5 and inductor L. FIG.

In operation, the DC-DC power converter draws from 3 no current from the input terminal during inductor magnetization (see 4A) . Current is sourced from the input terminal during the inductor degauss switching state (see Figure 4B).

A ratio of average input to output currents during duty cycle Dv of degauss state DV can be expressed as: $$\frac{I_{IN}}{I_{OuT}}=\frac{D}{\left(1+D\right)\left(1-D\right)}w\ddot{a}H\mathrm{right}en\mathrm{i.e}{D}_V=1-DD\in \left[0.1\right]$$

where D is the duty cycle of the magnetization state and Dv is the duty cycle of the demagnetization state. For a duty cycle D<~0.618 (small output to input voltage conversion ratio), the level of the input current pulses I _IN is less than the level of the load current I _OUT .

The flying capacitor is automatically charged to V _CF = V _IN - V _OUT and the relationship between input and output voltage is obtained by applying the volt-sec balance principle to the inductor voltage: $$\frac{V_{OuT}}{V_{IN}}=\frac{\mathrm{<figure-callout\; id="1"\; label="D"\; filenames="DE102020213005A1\_0024.png,DE102020213005A1\_0034.png"\; state="\{\{state\}\}">D</figure-callout>}}{1+D}{D}_P=D,D_V=1-DD\in \left[0.1\right]$$

Where D _P is the duty cycle of the magnetization state DP.

According to equation (8), the theoretical maximum converter voltage conversion ratio is V _OUT /V _IN = 1/2 for D = 1. However, for _D = 1, Dv = 0 and there is no time to redistribute the charge from the flying capacitor CF into the output capacitor C _OUT as this would require an infinite current causing a corresponding infinite I ² R conduction loss.

Current redistribution can be achieved by choosing a duty cycle less than 1, for example D ≤ 3/4. For D = 3/4, a practical maximum voltage conversion ratio of V _OUT /V _IN = 3/7 is achieved.

For applications requiring a voltage conversion ratio greater than V _OUT /V _IN = 3/7, the inductor magnetization state DP can be increased from 4A be replaced or used in combination with a modified magnetization state DP2.

4C shows the DC-DC converter of 3 , operating in a second magnetization state DP2 in which switches S1 and S2 are closed while the remaining switches S3, S4 and S5 are open. The input node 302 is coupled to the output node 304 via a magnetization path that includes S1, S2 and the inductor L. FIG. Ground is not coupled to output node 304 .

If the second magnetization state DP2 is introduced into the drive sequence at D > 0.5, the relationship between input and output voltage can be expressed as: $$\frac{V_{OuT}}{V_{IN}}=\frac{\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}{2-\mathrm{<figure-callout\; id="2"\; label="D\; D\; P"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}{D}_P{2}_{}=2D-\mathrm{1,}{D}_P=D_V=1-DD\in \left[\mathrm{0.5.1}\right]$$

Where D _P2 is the duty cycle of the second magnetization state DP2.

By increasing the duty cycle _DP2 , the converter operation approaches that of a conventional buck converter with an extended maximum duty cycle of D = 1, a maximum voltage conversion ratio of V _OUT /V _IN = 1, and the amplitude of the input current pulses approaches the level of the output current.

The efficiency of the DC-DC converter 300 can be improved for low output current by preventing reverse output current. This can be achieved using a modified degauss state DV'.

4D shows the DC-DC converter of 3 , operating in a second degaussing state DV' in which switches S1 and S3 are closed while the remaining switches S2, S4 and S5 are open. Input node 302 is coupled to output node 304 via an input path that includes S1, _CF , and S3. Ground is not coupled to output node 304 .

The DC-DC converter 300 can be equipped with a current sensor 330 (see 3 ) for detecting an inductor current IL through the inductor. Driver 320 may be configured to operate the converter in a so-called discontinuous conduction mode (DCM) in which the converter stops sourcing current until the output voltage has dropped below a threshold. In this example, driver 320 is configured to open degauss switch S5 during degauss state DV when inductor current IL is detected to have reached a zero value. This can be achieved using a zero crossing comparator circuit. Therefore, the driver 320 drives the converter circuit with the second degaussing state DV' after the inductor current falls below zero. during the In the modified degauss state DV', the current through the inductor is interrupted, but the current through the flying capacitor is still provided to the output port.

In diesem Beispiel steuert die Ansteuervorrichtung 320 den DC-DC-Wandler 300 mit dem Magnetisierungszustand PD (Wellenform 510) zwischen den Zeitpunkten t0 und t1 für eine Dauer Δ1 und dann mit dem Entmagnetisierungszustand DV (Wellenform 520) zwischen dem Zeitpunkt t1 und t2 für eine Dauer Δ2 an. Diese Sequenz wird dann über die Zeit wiederholt, um die erforderliche Ausgangsleistung zu liefern. Es ist offensichtlich, dass eine Verzögerung, die auch als Totzeit bezeichnet wird, zu den Zeitpunkten t1 und t2 eingeführt werden kann. 5 FIG. 12 shows a drive sequence for operating the DC-DC converter of FIG 3 with a conversion ratio $\frac{V_{O\mathrm{and}t}}{V_{in}}=\frac{1}{12}$

In this example, the driver 320 controls the DC-DC converter 300 with the magnetization state PD (waveform 510) between times t0 and t1 for a duration Δ1 and then with the demagnetization state DV (waveform 520) between times t1 and t2 for a duration Duration Δ2 on. This sequence is then repeated over time to provide the required output power. It is obvious that a delay, also called dead time, can be introduced at times t1 and t2.

For a voltage conversion ratio V _OUT /V _IN = 1/12, the magnetization duty cycle is DP = 1/11. As a result, the input current flows almost continuously (more than 90% duty cycle) and its level is less than 10% of the load current, as derived from equation (7). Therefore, the amplitude of the input current pulses is more than ten times lower than that of a conventional buck converter or a three-stage buck converter. At small voltage transformation ratios, the input current approaches continuous conduction at input current levels that scale with the voltage transformation ratio.

For small step-down voltage conversion ratios (large step-up voltage conversion ratios), there is a relatively long duty cycle during which current flows from the input terminal to the output terminal. This increased input current duty cycle reduces the input current level, thereby reducing the amplitude of the pulsed current and associated voltage ripples.

6 FIG. 12 is a diagram of another DC-DC converter 600 for implementing the method of FIG 2 . The DC-DC converter 600 includes an inductor L and two flying capacitors _CF1 and _CF2 coupled between a first port (input node 602) and a second port (output node 604) through a network of switches consisting of six switches S1-S6 are formed. An input capacitor Cin is provided between the input node 602 and ground, and an output capacitor Cout is provided between the output node 604 and ground.

The first flying capacitor C _F1 has a first terminal coupled to the input node 602 through switch S5 (which may be referred to as an input switch) and a second terminal coupled to ground through ground switch S3. The second flying capacitor _CF2 has a first terminal at node 606 and a second terminal at node 608. The first terminal is coupled to input node 602 through capacitor switch S1 and input switch S5. The second terminal is coupled to ground via switch S4. Inductor L has a first terminal coupled to second flying capacitor _CF2 at node 608 and a second terminal coupled to output node 604 . The first terminal of _CF2 is coupled to output node 604 via switch S2. The second terminal of the inductor is coupled to the second terminal of C _F1 via switch S6. Therefore, the inductor L and the first and second flying capacitors _CF1 , _CF2 are all connected to the output node 604, providing the option to share the output current across multiple parallel current paths.

A driver (not shown) is provided to generate six control signals Ct1-Ct6 to operate switches S1-S6, respectively. The control device is designed to operate the DC-DC converter 600 with a sequence of states. The sequence of states may include a magnetization state and a demagnetization state. The drive device may be configured to maintain the magnetization state and the demagnetization state for a predetermined duration during the drive period. For example, a magnetization state duty cycle and a demagnetization state duty cycle may be selected to achieve a desired transformation ratio.

7A shows the DC-DC converter of 6 , operating in a magnetization state DP in which switches S1 and S3 are closed while the remaining switches S2, S4, S5 and S6 are open. The input node 602 is decoupled or separated from the output node 604 . Ground is coupled to the output node 604 via a path that includes S3, _CF1 , S1, _CF2 and the inductor L. FIG.

7B shows the DC-DC converter of 6 , operating in a degaussing state DV in which switches S2, S4, S5 and S6 are closed while the remaining switches S1 and S3 are open. The input node 602 is coupled to the output node 604 via an input path comprising S5, _CF1 , S6 that bypasses the inductor L. Ground is coupled to the output node 604 via two paths: a ground path and a degaussing path. The ground path includes S4, _CF2 , S2 while L is bypassed. The degaussing path includes S4 and the inductor L.

In operation, converter 600 automatically charges the flying capacitors to V _CF2 = V _OUT and V _CF1 = V _IN - V _OUT during degauss state DV and then connects _CF1 and _CF2 in series during magnet state DP. The second flying capacitor increases the proportion of current that bypasses the inductor. The topology of converter 600 further reduces the amplitude of input current pulses, inductor current, and loss due to the inductor's DC resistance.

A ratio of average input to output currents during duty cycle Dv of degauss state DV can be expressed as: $$\frac{I_{IN}}{I_{OuT}}=\frac{D}{\left(1+2D\right)\left(1-D\right)}w\ddot{a}H\mathrm{right}en\mathrm{i.e}{D}_V=1-DD\in \left[0.1\right]$$

The relationship between input and output voltage is expressed as: $$\frac{V_{OuT}}{V_{IN}}=\frac{\mathrm{<figure-callout\; id="1"\; label="D"\; filenames="DE102020213005A1\_0024.png,DE102020213005A1\_0034.png"\; state="\{\{state\}\}">D</figure-callout>}}{1+2D}{D}_P=D,D_V=1-DD\in \left[0.1\right]$$

For a voltage conversion ratio V _OUT /V _IN = 1/12, the magnetization duty cycle is _DP = 1/10. The amplitude of the input current pulses I _IN , derived from equation (10), is only 5/54 of the load current I _OUT .

The theoretical maximum voltage conversion ratio derived from equation (11) is V _OUT /V _IN = 1/3 for D = 1. However, for D = 1, Dv = 0 and there is no time during the drive period to charge from the flying capacitors _CF1 and _CF2 into the output capacitor _COUT as this would require infinite current causing a corresponding infinite I ² R conduction loss. Current sharing can be achieved by limiting the duty cycle to a value less than 1, for example D ≤ 3/4. For D = 3/4 a practical maximum voltage conversion ratio of V _OUT /V _IN = 3/10 is achieved.

Higher output voltages can be achieved by inserting a modified magnetization state DP2 into the drive sequence.

7C shows the DC-DC converter of 6 , operating in a second magnetization state DP2 in which switches S1 and S5 are closed while the remaining switches S2, S3, S4 and S6 are open. The ground node is decoupled from the output node 604 . The input node 602 is coupled to the output node 604 via a path that includes S5, S1, _CF2 and the inductor L. FIG.

The second magnetization state DP2 introduces an inductor magnetization current from the input port through the second flying capacitor. Limiting the duty cycle to eg D ≤ 3/4 increases the practical maximum voltage conversion ratio to V _OUT /V _IN = 3/8 for D = 3/4. $$\frac{V_{OuT}}{V_{IN}}=\frac{D}{2}{\mathrm{<figure-callout\; id="2"\; label="D\; P"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}_P=2D-\mathrm{1,}{D}_P=D_V=1-DD\in \left[\mathrm{0.5.0.75}\right]$$

The topology of the converter from 6 improves conversion efficiency by minimizing conduction losses in the converter and the external components (inductor DCR, capacitor ESR), but also by reducing inductor core loss. In addition, the voltage drop from the flying capacitors also allows the use of switches, such as power FETs, with a reduced voltage rating. For example, the inductor degaussing switch S4 can be implemented with a reduced voltage rating. This improves the figure of merit of the switches (smaller internal transistor resistance Ron and smaller gate capacitance).

8th FIG. 8 is a diagram of another DC-DC converter 800 for implementing the method of FIG 2 . The converter 800 can be implemented with power switches with a relatively low voltage rating, for example a voltage rating close to half the input voltage. The DC-DC converter 800 includes an inductor L and two flying capacitors _CF1 and _CF2 coupled between a first port (input node 802) and a second port (output node 804) through a network of switches consisting of eight switches S1-S8 is formed. An input capacitor Cin is provided between input node 802 and ground, and an output capacitor Cout is provided between output node 804 and ground.

The first flying capacitor _CF1 has a first terminal at node 806 coupled to _CF2 through capacitor switch S3 and a second terminal at node 808 coupled to ground through ground switch S5. Inductor L has a first terminal at node 810 and a second terminal coupled to output node 804 . The first inductor terminal is coupled to ground through switch S8 (which may be referred to as a degauss switch) and to _CF1 through first inductor switch S6 at node 806 . The second inductor terminal is coupled to output node 804 and to _CF1 through second capacitor switch S7 at node 808 . The second flying capacitor _CF2 has a first terminal at node 812 coupled to the input terminal through input switch S1 and a second terminal at node 814 coupled to ground through ground switch S4. The first terminal of C _F2 is coupled to the first terminal of the inductor via the capacitor switch S2. A driver (not shown) is provided to generate eight control signals Ct1-Ct8 to operate switches S1-S8, respectively. The control device is designed to operate the DC-DC converter 800 with a sequence of states. The sequence of states may include a magnetization state and a demagnetization state. The drive device may be configured to maintain the magnetization state and the demagnetization state for a predetermined duration during the drive period. For example, a magnetization state duty cycle and a demagnetization state duty cycle may be selected to achieve a desired transformation ratio.

9A shows the DC-DC converter of 8th , operating in a magnetization state DP in which switches S2, S4, S5 and S6 are closed while the remaining switches S1, S3, S7 and S8 are open. The input node 802 is decoupled or separated from the output node 804 . Ground is coupled to the output node 804 via a first magnetization path including S5, _CF1 , S6 and the inductor L and a second magnetization path including S4, _CF2 , S2 and the inductor L. FIG.

9B shows the DC-DC converter of 8th , operating in a degaussing state DV in which switches S1, S3, S7 and S8 are closed while the remaining switches S2, S4, S5 and S6 are open. The input node 802 is coupled to the output node 804 via an input path that includes S1, _CF2 , S3, _CF1 and that bypasses the inductor L. Ground is coupled to output node 804 via a degaussing path that includes S8 and inductor L. FIG.

In operation, the flying capacitors _CF1 and _CF2 are alternately connected in series (during the demagnetization state DV) and in parallel (during the magnetization state DP). The flying capacitors _CF1 and _CF2 are automatically charged to V _CF1 = V _CF2 = (V _IN - V _OUT )/2.

A ratio of average input to output currents during duty cycle Dv of degauss state DV can be expressed as: $$\frac{I_{IN}}{I_{OuT}}=\frac{D}{\left(2+D\right)\left(1-D\right)}w\ddot{a}H\mathrm{right}en\mathrm{i.e}{D}_V=1-DD\in \left[0.1\right]$$

The relationship between input and output voltage is expressed as: $$\frac{V_{OuT}}{V_{IN}}=\frac{\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}{2+D}{D}_P=D,D_V=1-DD\in \left[0.1\right]$$

Infolgedessen skaliert der Pegel des Eingangsstroms mit dem Produkt des Spannungsumwandlungsverhältnisses mit 1/(1-D).By combining equations 13 and 14 $\frac{I_{IN}}{I_{OuT}}=\frac{V_{OuT}}{V_{IN}}=\frac{1}{\left(1-D\right)}.$

As a result, the level of the input current scales with the product of the voltage transformation ratio times 1/(1-D).

For a voltage conversion ratio V _OUT /V _IN = 1/12, the magnetization duty cycle is _DP = 2/11. The amplitude of the input current pulses IIN derived from equation (13) is only ~10% (11/108) of the load current _IOUT .

The theoretical maximum voltage conversion ratio derived from Equation (14) is V _OUT /V _IN = 1/3 for D = 1. For D = 1, however, there is no time during the drive period Dv = 0 to clear the charge from the flying capacitors _CF1 and C _F2 into the output capacitor COUT as this would require infinite current causing a corresponding infinite I ² R conduction loss. Current sharing can be achieved by limiting the duty cycle to a value less than 1, for example D ≤ 3/4. For D = 3/4, a practical maximum voltage conversion ratio of V _OUT /V _IN = 3/11 is achieved.

10 FIG. 10 is a diagram of another DC-DC converter 1000 for implementing the method of FIG 2 . The converter 1000 is designed to operate at very low voltage conversion ratios, for example for Vout/Vin < 1/7. For example, a typical conversion ratio may be Vout/Vin = 1/12. Converter 1000 is similar to converter 600 in which switch S5 has been replaced with a pre-converter stage. The pre-converter stage, also referred to as the first port stage or input stage, can be implemented as a series-parallel topology, Dickson topology, or any other capacitive voltage divider topology.

The DC-DC converter 1000 includes an inductor L and three flying capacitors _CF1 , _CF2 , and _CF3 coupled between a first port (input node 1002) and a second port (output node 1004) through a network of switches that is made up of nine switches S1-S9. An input capacitor Cin is provided between the input node 1002 and ground, and an output capacitor Cout is provided between the output node 1004 and ground.

An input stage is provided between the input node 1002 and an intermediate node 1014 and an output stage is provided between the intermediate node 1014 and the output node 1004 . The input stage consists of _CF3 and switches S1, S2, S3, S4. The third flying capacitor _CF3 has a first terminal at node 1010 coupled to the input node through input switch S1 and a second terminal at node 1012 coupled to ground through ground switch S4. The first terminal of C _F3 is coupled to the output stage via capacitor switch S2 provided between nodes 1010 and 1014 . Similarly, the second terminal of _CF3 is coupled to the output stage via capacitor switch S3 provided between nodes 1012 and 1014.

The output stage consists of _CF1 , _CF2 and switches S5, S6, S7, S8 and S9. The first flying capacitor _CF1 has a first terminal coupled to the second flying capacitor _CF2 through switch S5 and a second terminal coupled to ground through ground switch S7 and to output node 1004 through switch S9. The second flying capacitor _CF2 has a first terminal at node 1006 coupled to S5 and a second terminal at node 1008 coupled to ground through S8. Inductor L has a first terminal coupled to second flying capacitor _CF2 at node 1008 and a second terminal coupled to output node 1004 . The first terminal of _CF2 is coupled to output node 1004 via switch S6. A driver (not shown) is provided to generate nine control signals Ct1-Ct9 to operate switches S1-S9, respectively. The control device is designed to operate the DC-DC converter 1000 with a sequence of states. The sequence of states may include a magnetization state and a demagnetization state. The drive device may be configured to maintain the magnetization state and the demagnetization state for a predetermined duration during the drive period. For example, a magnetization state duty cycle and a demagnetization state duty cycle may be selected to achieve a desired transformation ratio.

11A shows the DC-DC converter of 10 , operating in a magnetization state D1 in which switches S5 and S7 are closed while switches S2, S4, S6, S8 and S9 are open, and at least one of S1 and S3 is also open. The input node is decoupled or separated from the output node. Ground is coupled to the output node via a path that includes S7, _CF1 , S5, _CF2 and the inductor L.

11B shows the DC-DC converter of 10 , operating in a degaussing state DV1 in which switches S1, S3, S6, S8 and S9 are closed while the remaining switches S2, S4, S5 and S7 are open. The input node is coupled to the output node via an input path comprising S1, _CF3 , S3, _CF1 , S9 that bypasses the inductor L. Ground is coupled to the output node via two paths: a ground path and a degaussing path. The ground path includes S8, _CF2 , S6 while L is bypassed. The degaussing path includes S8 and the inductor L.

11C shows the DC-DC converter of 10 , operating in a second magnetization state D2, in which switches S5 and S7 are closed while switches S1, S3, S6, S8 and S9 are open, and at least one of S2 and S4 is also open.

The input node is decoupled or separated from the output node. Ground is coupled to the output node via a path that includes S7, _CF1 , S5, _CF2 and the inductor L.

11D shows the DC-DC converter of 10 , operating in a degaussing state DV2 in which switches S2, S4, S6, S8 and S9 are closed while the remaining switches S1, S3, S5 and S7 are open. The input node is decoupled from the output node. The ground is coupled to the output node via three paths: a first ground path, a second ground path, and a degaussing path. The first ground path includes S4, _CF3 , S2, _CF1 , S9 and bypasses the inductor L. The second ground path includes S8, _CF2 , S6 while L is bypassed. The degaussing path includes S8 and the inductor L.

12 10 shows a drive sequence for operating the DC-DC converter 1000. The drive sequence has a drive period T=T1+T2, where T1 is the drive period of one cycle of states D1 and DV1, and T2, where T2 is the drive period of one cycle of states D2 and DV2 is. In this example, the driver drives the DC-DC converter 1000 with the magnetization state D1 (waveform 1210) between times t0 and t1 for a duration of Δ1, then with the demagnetization state DV1 (waveform 1220) between times t1 and t2 for a duration Δ2, then with the magnetization state D2 (waveform 1230) between times t2 and t3 for a duration Δ3, then with the demagnetization state DV2 (waveform 1240) between times t3 and t4 for a duration Δ4. This drive sequence D1/DV1/D2/DV2 is then repeated over time to provide the required output power.

In operation, the flying capacitors are automatically charged in the direction of V _CF3 = V _IN/ 2, V _CF2 = V _OUT and V _CF1 = V _IN /2 - V _OUT .

wobei Dx der Arbeitszyklus des Magnetisierungszustands D1 oder D2 ist und Dvx der Arbeitszyklus des Entmagnetisierungszustands DV1 oder DV2 ist.The relationship between input and load current levels follows equation (10). The relationship between input and output voltage can be expressed as: $$\frac{V_{OuT}}{V_{IN}}=\frac{\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}{2+4D}Dx=D,DVx=1-DD\in \left[0.1\right]$$

where Dx is the duty cycle of magnetization state D1 or D2 and Dvx is the duty cycle of demagnetization state DV1 or DV2.

dargestellt, in dem T1 = T2 = T/2, Δ1 = Δ3 = 3/4 T1 und Δ2 = Δ4 = 1/4 T1.The theoretical maximum voltage conversion ratio derived from equation (15) is V _OUT /V _IN = 1/4 for D = 1. For D = 1, Dvx = 0 and there is no time during the drive period to charge from the flying capacitors _CF1 and _CF2 into the output capacitor _COUT as this would require infinite current causing a corresponding infinite I ² R conduction loss. The charge on capacitor C _F3 is controlled by the ratio DV1/DV2. Current sharing can be achieved by limiting the duty cycle to a value less than 1, for example D ≤ 3/4. For D=3/4, a practical maximum voltage conversion ratio of V _OUT /V _IN = 3/20 is achieved. The control sequence of 12 is for a conversion ratio $\frac{V_{O\mathrm{and}t}}{V_{in}}=\frac{3}{20}$

shown where T1 = T2 = T/2, Δ1 = Δ3 = 3/4 T1 and Δ2 = Δ4 = 1/4 T1.

Higher output voltages can be achieved by using other states (in the case of a buck converter, additional magnetization states) in addition to switching states D1 and D2.

13A shows the DC-DC converter of 10 , operating in a magnetization state DP1 in which switches S1, S3, S5 are closed while the remaining switches S2, S4, S6, S7, S8 and S9 are open. The input node is coupled to the output node via a magnetization path that includes S1, _CF3 , S3, S5, _CF2 , and L. The ground is decoupled from the output node.

13B shows the DC-DC converter of 10 , operating in a magnetization state DP2 in which switches S2, S4 and S5 are closed while the remaining switches S1, S3, S6, S7, S8 and S9 are open. The input node is decoupled or separated from the output node. Ground is coupled to the output node via a path that includes S4, _CF3 , S2, S5, _CF2 and the inductor L.

These conditions introduce an inductor magnetizing current from the input port (through flying capacitor _CF2 ). By limiting the duty cycle to D ≤ 3/4, a higher practical maximum voltage conversion ratio can be achieved. For example, for D = 3/4 the ratio V _OUT /V _IN = 3/16. $$\frac{V_{OuT}}{V_{IN}}=\frac{D}{4}{\mathrm{<figure-callout\; id="2"\; label="D\; P"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}_P=2D-\mathrm{1,}{D}_P=D_V=1-DD\in \left[\mathrm{0.5.0.75}\right]$$

14 12 is a flowchart of another method for converting power at a target conversion ratio, in accordance with the disclosure.

In step 1410, a power converter having a ground port, a first port, and a second port is provided. The power converter can operate either as a step-down or buck converter or as a step-up or boost converter. When the power converter operates as a buck converter, the first port receives an input voltage and the second port provides the output voltage. When the power converter operates as a boost converter, the second port receives an input voltage and the first port provides the output voltage. The power converter includes a first flying capacitor coupled to a network of switches, a second flying capacitor coupled to the network of switches, an inductor coupled to the second port, and a driver. The network of switches includes a first switch for coupling the second flying capacitor to the first port; a ground switch for coupling the inductor to ground, and a first capacitor switch coupled to the first flying capacitor.

In step 1420, the network of switches is driven to a sequence of states during a drive period. The sequence of states includes a first state and a second state. In the first state, the ground port is coupled to the second port via a first path comprising the first flying capacitor and the inductor, and the first port is coupled via a second path comprising the first switch, the second flying capacitor and having the inductor is coupled to the second port. In the second state, the ground port is coupled to the second port through a third path that includes the ground switch and the inductor, and one of the first port and the ground port is through a fourth path that includes the first flying capacitor , while bypassing the inductor, coupled to the second port. As a result, in the first state, a reduced current flows between the first port and the second port. For example, when operating as a buck converter, a reduced current is drawn from the first port to the second port. Similarly, when operating as a boost converter, a reduced current is drawn from the second port to the first port.

When the power converter operates as a buck converter, the first state is a magnetization state and the second state is a demagnetization state. Conversely, when the power converter operates as a boost converter, the first state is a demagnetization state and the second state is a magnetization state.

15 FIG. 15 is a diagram of a DC-DC converter 1500 for implementing the method of FIG 14 . The DC-DC converter 1500 includes an inductor L and two flying capacitors _CF1 and _CF2 coupled between a first port (input node 1502) and a second port (output node 1504) through a network of switches consisting of seven switches S1-S7 is formed. An input capacitor Cin is provided between the input node 1502 and ground, and an output capacitor Cout is provided between the output node 1504 and ground.

The first flying capacitor C _F1 has a first terminal at node 1506 coupled to input node 1502 through capacitor switch S5 and a second terminal at node 1508 coupled to ground through ground switch S3. The second flying capacitor _CF2 has a first terminal at node 1510 coupled to the input node through switch S1 (also referred to as the input switch) and a second terminal at node 1512 coupled to ground through ground switch S4 . Inductor L has a first terminal at node 1512 and a second terminal coupled to output node 1504 . The first inductor terminal is coupled to _CF1 at node 1506 through inductor switch S6 and to _CF2 at node 1512. The first inductor terminal is also coupled to ground through switch S4. The second terminal of C _F1 is coupled to output node 1504 via switch S7. The first terminal of _CF2 is coupled to output node 1504 via switch S2. A driver (not shown) is provided to generate seven control signals Ct1-Ct7 to operate switches S1-S7, respectively. The control device is designed to operate the DC-DC converter 1500 with a sequence of states. The sequence of states may include a magnetization state and a demagnetization state. The drive device may be configured to maintain the magnetization state and the demagnetization state for a predetermined duration during the drive period. For example, a magnetization state duty cycle and a demagnetization state duty cycle may be selected to achieve a desired transformation ratio.

16A shows the DC-DC converter of 15 , operating in a magnetization state DP in which switches S1, S3 and S6 are closed while the remaining switches S2, S4, S5 and S7 are open. The input node 1502 is coupled to the output node 1504 via a first path or magnetization path that includes S1, _CF2 and the inductor L. FIG. The ground port is coupled to the output node 1504 via a second path or second magnetization path that includes S3, _CF1 , S6 and the inductor L. FIG.

16B shows the DC-DC converter of 15 , operating in a degaussing state DV in which switches S2, S4, S5 and S7 are closed while the remaining switches S1, S3 and S6 are open. The input node 1502 is coupled to the output node 1504 via a path that includes S5, _CF1 , S7 that bypasses the inductor L. FIG. Ground is via a path, also known as the _degauss path, which includes S4 and the inductor L, and via another path, also known as the ground path, which includes S4, CF2 and S2, which also bypasses the inductor L , coupled to output node 1504 .

In operation, the flying capacitors are automatically charged to V _CF2 = V _OUT and V _CF1 = V _IN - V _OUT . The relationship between input and output voltage follows equation (8).

As in the 16A and 16B As shown, a current is provided from the input terminal during both the magnetization state DP and the demagnetization state DV. As a result, converter 1500 implements a continuous input current over the drive period, and the input current is λ compared to converter 600 6 reduced especially for voltage conversion ratios near the maximum ratio of V _OUT /V _IN = ½. For this operating range, converter 1500 operates as a converter for DC voltages with an input current level close to half the load current.

17 17 is a diagram of another DC-DC converter 1700 for implementing the method of FIG 14 . The DC-DC converter 1700 includes an inductor L and two flying capacitors _CF1 and _CF2 coupled between a first port (input node 1702) and a second port (output node 1704) through a network of switches consisting of six switches S1-S6 is formed. An input capacitor Cin is provided between input node 1702 and ground, and an output capacitor Cout is provided between output node 1704 and ground.

The first flying capacitor _CF1 has a first terminal at node 1706 coupled to _CF2 through capacitor switch S5 and a second terminal at node 1708 coupled to ground through ground switch S3 and to the output node through switch S6 1704 is coupled.

The second flying capacitor _CF2 has a first terminal at node 1710 coupled to input node 1702 through first switch or input switch S1 and a second terminal at node 1712 coupled to ground through ground switch S4. The inductor L has a first inductor terminal coupled to ground through S4 and a second inductor terminal, coupled to output node 1704 . The first inductor terminal is coupled to _CF2 at node 1712 and to _CF1 through inductor switch S2 at node 1706. A driver (not shown) is provided to generate six control signals Ct1-Ct6 to respectively switch S1 - Press S6. The control device is designed to operate the DC-DC converter 1700 with a sequence of states. The sequence of states may include a magnetization state and a demagnetization state. The drive device may be configured to maintain the magnetization state and the demagnetization state for a predetermined duration during the drive period. For example, a magnetization state duty cycle and a demagnetization state duty cycle may be selected to achieve a desired transformation ratio.

18A shows the DC-DC converter of 17 , operating in a magnetization state DP in which switches S1, S2 and S3 are closed while the remaining switches S4, S5 and S6 are open. The input node 1702 is coupled to the output node 1704 via a magnetization path that includes S1, _CF2 and the inductor L. FIG. Ground is coupled to output node 1704 via a path that includes S3, _CF1 , S2, and inductor L. FIG.

18B shows the DC-DC converter of 17 , operating in a degaussing state DV in which switches S4, S5 and S6 are closed while the remaining switches S1, S2 and S3 are open. Input node 1702 is decoupled from output node 1704 . _{Ground is coupled to the output node 1704 via a degaussing path that includes S4 and the inductor L, and another path that includes S4, CF2, S5, CF1 ,} and S6 that bypasses the inductor L. FIG.

During magnetization state DP, converter 1700 typically provides half of the inductor magnetizing current from the input terminal (via flying capacitor _CF2 ) and the other half from the ground terminal (via flying capacitor _CF1 ). During the degauss condition, the flying capacitors are connected in series to provide additional output current from the ground terminal. This operation prevents the occurrence of current spikes from the input node that are typically generated when the input and output capacitors are connected directly through a flying capacitor.

The flying capacitors are automatically charged to V _CF2 = (V _IN + V _OUT )/2 and V _CF1 = (V _IN - V _OUT )/2.

A ratio of average input to output currents during duty cycle _DP of magnetization state DP can be expressed as: $$\frac{I_{IN}}{I_{OuT}}=\frac{\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}{2+D}w\ddot{a}H\mathrm{right}en\mathrm{i.e}{D}_P=DD\in \left[0.1\right]$$

The relationship between input and output voltage is: $$\frac{V_{OuT}}{V_{IN}}=\frac{\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}}{2+D}{D}_P=D,D_V=1-DD\in \left[0.1\right]$$

For a voltage conversion ratio V _OUT /V _IN = ¼, the duty cycle is D = 2/3. The amplitude of the input current pulses I _IN derived from equation (17) is only 3/8 of the load current I _OUT .

The theoretical maximum voltage conversion ratio derived from equation (18) is V _OUT /V _IN = 1/3 for D = 1. However, for D = 1, Dv = 0 and there is no time during the drive period to charge from the flying capacitors _CF1 and _CF2 into the output capacitor _COUT as this would require infinite current causing a corresponding infinite I ² R conduction loss. Current sharing can be achieved by limiting the duty cycle to a value less than 1, for example D ≤ 3/4. For D = 3/4, a practical maximum voltage conversion ratio of V _OUT /V _IN = 3/11 is achieved.

Therefore, for output to input voltage conversion ratios greater than V _OUT /V _IN = ¼, converter 1700 reduces the amplitude of the input current pulses and also reduces the voltage rating of the degauss switch to approximately half the maximum input voltage.

The converter 1700 can be modified by replacing the switch S6 with a fixed connection between the second terminal of _CF1 and the output node and by removing the ground connection of _CF1 via S3. In this case, the voltages across the flying capacitors would be expressed as V _CF2 = V _IN /2 and V _CF1 = V _IN /2 - V _OUT . However, in this scenario, the output current is reduced to ~50% of the inductor current during inductor magnetization, resulting in a slower transient load response and an increase in output current/voltage ripple, especially at high duty cycle. Converter 800 can also be modified in a similar manner.

The in relation to the 3 until 18 described DC-DC converters are configured to reduce the amplitude of the input current pulses compared to conventional converters. This reduces both power losses and power supply noise levels and associated EMI problems. Also, by implementing a capacitive path that bypasses the inductor, losses due to inductor DCR can be reduced, thereby improving converter efficiency, voltage regulation, and improving transient load current response. Further, if the inductor current is increased beyond an extended magnetization state, additional charge is stored in the flying capacitors. This charge is subsequently provided to the transducer output port during the subsequent degaussing condition. This further reduces the output voltage drop during a sudden increase in load current. In addition, the voltage across the flying capacitor(s) does not require regulation, reducing complexity in the control circuitry and the risk of interference with the converter's output voltage and current regulation circuits.

The in relation to the 3 until 18 The described DC-DC converters have been described as step-down or step-down converters, which are also referred to as buck converters. It is apparent that these converters can be operated in reverse (i.e. using the input as output and the output as input) as a boost converter to achieve boost conversion. In this case, the magnetization phase (demagnetization phase) in the down operation becomes a demagnetization phase (magnetization phase) in the up operation.

The transfer function of a conventional boost converter contains what is known as a zero in the right half-plane, as described in the paper entitled Right-Half-Plane Zero Elimination for Boost Converter Using Magnetic Coupling With Forward Energy Transfer, IEEE, 2019 by Poorali. The zero results from the fact that a converter provides the output current during inductor degaussing. This limits the bandwidth of a continuous conduction mode (CCM) control system. As a result, traditional boost converters implement higher output voltage ripple for fast dynamic applications.

19 shows the diagram of 3 , shown with inverted input and output ports.

20A and 20B show the magnetization state DP and the demagnetization state DV.

20A shows the DC-DC converter of 19 , operating in a magnetization state DP in which switches S1, S3 and S5 are closed while the remaining switches S2 and S4 are open. The input node is coupled to the output node via an input path that includes _CF and S3 and bypasses the inductor L. The input node is coupled to ground via a magnetization path that includes S5 and the inductor L.

20B shows the DC-DC converter of 19 , operating in a degaussing state DV in which switches S2 and S4 are closed while the remaining switches S1, S3 and S5 are open. The input node is decoupled or separated from the output node. The input node is coupled to ground via a degaussing path that includes S4, _CF , S2 and the inductor L.

In operation, the DC-DC power converter draws from 19 no current from the input terminal during inductor degaussing (see 20B) . Current is drawn from the input terminal during the inductor magnetization switching state (see 20A) . As above regarding the 20A and 20B As illustrated, the proposed topologies of the disclosure translate the provision of the converter output current into the switching state that magnetizes the inductor, effectively shifting the right-half-plane zero from the boost control transfer function to a higher frequency.

Compared to prior art transformerless converters, the converter topologies of the disclosure enable high voltage ratio boost conversion with improved power supply rejection and fast dynamic response.

The relationship between input and output voltage is obtained by applying the volt-sec balance principle to the inductor voltage: $$\frac{V_{OuT}}{V_{IN}}=\frac{2-\mathrm{<figure-callout\; id="1"\; label="D"\; filenames="DE102020213005A1\_0024.png,DE102020213005A1\_0034.png"\; state="\{\{state\}\}">D</figure-callout>}}{1-D}{D}_P=D,D_V=1-DD\in \left[0.1\right]$$

According to equation (19), the theoretical minimum converter voltage conversion ratio is V _OUT /V _IN = 2 for D = 0. However, for D = 0 there is no time to redistribute the charge from the flying capacitor CF to the output capacitor _{C OUT} (this would require an infinite current causing a corresponding infinite I ² R conduction loss). A more balanced current distribution can be achieved by limiting the duty cycle to eg D ≥ 1/4, resulting in a more realistic minimum voltage conversion ratio of V _OUT /V _IN = 7/3 for D = 1/4. For lower voltage transformation ratios, the switching state DV can be partially or completely replaced by a modified demagnetization state DV2.

21 shows the DC-DC converter of 19 , operating in a second degaussing state DV2 in which switches S1 and S2 are closed while the remaining switches S3, S4 and S5 are open. The input node is coupled to the output node via a degaussing path comprising S1, S2 and the inductor L. The ground is not coupled to the output node.

By introducing an increasing proportion of DV2 for duty cycles below D < 0.5, the relationship between input and output voltage becomes: $$\frac{V_{OuT}}{V_{IN}}=\frac{1+\mathrm{<figure-callout\; id="1"\; label="D"\; filenames="DE102020213005A1\_0024.png,DE102020213005A1\_0034.png"\; state="\{\{state\}\}">D</figure-callout>}}{1-D}{D}_P=D_V=D,\mathrm{<figure-callout\; id="2"\; label="D\; V"\; filenames="DE102020213005A1\_0029.png,DE102020213005A1\_0031.png"\; state="\{\{state\}\}">D</figure-callout>}V2=1-2DD\in \left[\mathrm{0.0.5}\right]$$

An increasing proportion of switching state DV2 during inductor degaussing makes the converter operation similar to that of a conventional boost converter with a minimum duty cycle of D=0 and a minimum voltage conversion ratio of V _OUT /V _IN > 1. This also has the disadvantage of reintroduction a larger influence from the zero in the right hemiplane.

Disabling negative inductor current at low output current to increase converter efficiency can be applied to boost derivatives of the proposed converter topologies by opening the degaussing current path within the degaussing state Dvx once the inductor current reaches zero.

Reducing the voltage rating of boost converter power switches to V _OUT /2 can be beneficial for the topologies of the 8th , 10 and 17 be achieved with reversed roles of the input and output ports.

It will be apparent to those skilled in the art that variations on the disclosed arrangements are possible without departing from the disclosure. Accordingly, the above description of the specific embodiment is exemplary only and not for the purpose of limitation. It will be apparent to those skilled in the art that minor modifications can be made to the operation described without substantial changes.

QUOTES INCLUDED IN DESCRIPTION

This list of documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• US8427113 [0039]
• US7230405 [0042]

Claims (11)

A power converter for providing an output voltage with a desired conversion ratio, the power converter having a ground port, a first port and a second port, wherein when the power converter operates as a buck converter, the first port receives an input voltage and the second port provides the output voltage, and when the power converter operates as a boost converter, the second port receives an input voltage and the first port provides the output voltage, the power converter comprising a first flying capacitor coupled to a network of switches, a second flying capacitor coupled to the network of switches, an inductor coupled to the second port, and a driving device; wherein the network of switches comprises a first switch for coupling the second flying capacitor to the first port; a ground switch for coupling the inductor to ground; a first capacitor switch coupled to the first flying capacitor; wherein the control device is designed to control the network of switches with a sequence of states during a control period, the sequence of states having a first state and a second state, wherein in the first state the ground port is coupled to the second port via a first path comprising the first flying capacitor and the inductor, and wherein the first port is coupled to the second flying capacitor via a second path comprising the first switch and comprises the inductor, is coupled to the second port, wherein in the second state the ground port is coupled to the second port via a third path comprising the ground switch and the inductor, and wherein one of the first port and the ground port is coupled via a fourth path comprising the first flying capacitor having while bypassing the inductor is coupled to the second port. The power converter according to claim 1 wherein in the second state the first port is decoupled from the second port and the fourth path includes the second flying capacitor. The power converter according to claim 1 or 2 wherein in the second state the ground port is coupled to the second port via a fifth path comprising the second flying capacitor while bypassing the inductor. The power converter of any preceding claim, wherein the inductor has a first terminal coupled to the first flying capacitor through a first inductor switch and a second terminal coupled to the second port, and the first flying capacitor through a second capacitor switch coupled to the second port. The power converter according to claim 4 , wherein the second flying capacitor is coupled to the second port via a third capacitor switch. The power converter of any preceding claim, further comprising a current sensor for sensing an inductor current through the inductor, wherein the driver is configured to open the ground switch during the second state when the inductor current is sensed to have reached a threshold. The power converter according to any one of Claims 1 until 6 , wherein the power converter is a buck converter, wherein the first state is a magnetization state and the second state is a demagnetization state. The power converter according to any one of Claims 1 until 6 , wherein the power converter is a boost converter, wherein the first state is a demagnetization state and the second state is a magnetization state. A method of converting power at a desired conversion ratio, the method comprising providing a power converter having a ground port, a first port and a second port, wherein when the power converter operates as a buck converter, the first port receives an input voltage and the second port receives the Provides output voltage and when the power converter as on buck converter operates, the second port receives an input voltage and the first port provides the output voltage, the power converter further comprising a first flying capacitor coupled to a network of switches, a second flying capacitor coupled to the network of switches, a an inductor coupled to the second port and having a drive device; wherein the network of switches comprises a first switch for coupling the second flying capacitor to the first port; a ground switch for coupling the inductor to ground; a first capacitor switch coupled to the first flying capacitor; Driving the network of switches with a sequence of states during a driving period, the sequence of states having a first state and a second state, wherein in the first state the ground port is connected via a first path connecting the first flying capacitor and the inductor having is coupled to the second port and wherein the first port is coupled to the second port via a second path comprising the first switch, the second flying capacitor and the inductor, wherein in the second state the ground port via a third path comprising the ground switch and the inductor coupled to the second port, and wherein one of the first port and the ground port is coupled to the second via a fourth path comprising the first flying capacitor while bypassing the inductor port is paired. The procedure according to claim 9 wherein in the second state the first port is decoupled from the second port and the fourth path includes the second flying capacitor. The procedure according to claim 9 wherein in the second state the ground port is coupled to the second port via a fifth path comprising the second flying capacitor while bypassing the inductor.

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