DE112016001188T5 - Construction of flexible power converters with control loops and switching networks - Google Patents

Abstract

An apparatus for processing electrical power includes a power converter having a path for current flow between first and second power converter terminals. During operation, the first and second power converter terminals are maintained at a first and a second voltage, respectively. A control loop and a switching network are arranged on the path. The first control loop includes a magnetic storage element and a first loop connection. The first loop connection is connected to the first switch mode connection. The switch network alternates between a first switch configuration and a second switch configuration. In the first switch configuration, the first charge storage element is charged at a first rate. In contrast, the first power storage element in the second configuration is discharged at a second rate. These rates are limited by the magnetic storage element.

Description

REFER TO RELATED APPLICATIONS

This application claims the benefit of US Provisional Patent Application No. 62 / 132,701, filed March 13, 2015. Its contents are incorporated by reference herein in their entirety.

AREA OF REVELATION

The disclosure relates to power supply devices and in particular power converters.

STATE OF THE ART

Many power converters include switches and one or more capacitors used, for example, to power portable electronic and consumer electronics. Switched converters regulate the output voltage or output current by switching energy storage elements (i.e., inductors and capacitors) into different configurations using a switch network. Switched capacitor power converters are switched power converters that primarily use capacitors to transfer energy. In such power converters, the number of capacitors and switches increases as the transformation ratio increases. Switches in the switch network are usually active devices that are implemented as transistors. The switch network may be integrated on a single or multiple monolithic semiconductor substrates or formed using separate devices.

Typically, DC-DC and DC converters perform voltage transformation and output regulation. This is usually done in a single stage power converter, such as a buck converter. However, it is possible to divide these two functions into two specialized stages, namely a transformation stage, for example a switching network, and a separate regulation stage, for example a control loop. The transformation stage transforms one voltage into another while the regulation stage ensures that the voltage and / or the current output from the transformation stage retains desired characteristics.

SHORT VERSION

In one aspect, the invention features a device for processing electrical power. Such a device includes a power converter having a current path between a first and a second power converter terminal that are maintained at a respective first and second voltage during operation thereof. The second voltage is lower than the first one. A first control circuit and a switching network are both on the current path. The switching network includes a first charge storage element and a first and a second switching power supply. The first control circuit includes a first magnetic storage element and a first control circuit connection. The current path includes the first loop connection, the first switch mode connection, and the second switch mode connection, wherein the first loop connection is connected to the first switch mode connection. The switching network alternates between a first and a second switch configuration. In the first, a first charge storage element is charged at a first rate, and in the second switch configuration, the first charge storage element is discharged at a second rate. The first magnetic storage element limits both rates. In some cases, the restriction is such that the rates are the same, while in other cases they are different.

Some embodiments also include a second loop located on the path. In these embodiments, the second control circuit includes a second loop connection, which also lies on the current path. This second loop connection is connected to the second switch mode connection.

In some embodiments, the switching network further includes a second charge storage element. By bringing the switching network into the first switch configuration, the second charge storage element is discharged at a first rate. By bringing the switching network into the second configuration, the second charge storage element is charged at a second rate. The first magnetic storage element limits both rates.

Embodiments comprising a second loop include those in which the second loop includes a second magnetic memory element and a switch connected to the second magnetic memory element, the switch being controllable to switch between at least two switching configurations. These embodiments include those in which the second control loop further includes a feedback loop for controlling the operation of the switch in response to a measured output of the power converter.

In other embodiments, the first magnetic storage element includes a filter. These include embodiments in which the filter has a resonant frequency.

Embodiments comprising two control loops include those having a third control loop. In some of these embodiments, the third loop is connected to the switching network and has an inductor coupled to an inductor and the second loop injects an inductor coupled to the inductor of the third loop. In others, the third loop is connected to the switching network, and both the second and third loop include inductors sharing one and the same inductor core. In embodiments having coupled inductors, the inductors may be coupled such that the product of voltage and current has the same sign or opposite sign at both inductors.

The invention can be realized with many types of switching networks. For example, in some embodiments, the switching network includes a reconfigurable switching network. As used herein, a reconfigurable switching network is one having a set of switch configurations {α ₁ , α ₂ , ... α _n }, where n> 2, and the switching network for all m, n is capable of between α to change _b and α _n .

In others it includes a polyphase switching network. In still others, it includes a multi-stage multi-phase switching network or a multi-stage switching network. Still other embodiments have switching networks that include a cascade multiplier.

The invention can also be implemented with many types of control circuits. These include bidirectional control loops, polyphase control loops, switched power converters, resonant power converters, a buck converter, a boost converter, a buck-boost converter, a linear regulator, a buck converter, a flyback converter, a forward converter, a half-bridge converter, a full-bridge converter Magnetic storage element and a magnetic filter.

In some embodiments, the switching network receives a charge at an input and outputs the charge at an output. In these embodiments, charge transport from input to output is performed in more than one switching cycle.

Embodiments incorporating a flyback converter include those including a quasi-resonant flyback converter, an active-clamp flyback converter, a nested flyback converter, or a dual-switch flyback converter.

Embodiments that feature a flow transducer include those that include a multi-resonance flow transducer, an active-clamp flow transducer, a nested flow transducer, or a dual-switch flow transducer.

Embodiments that include a half-bridge converter include those including an asymmetric half-bridge converter, a multi-resonance half-bridge converter, or an LLC resonance half-bridge converter.

The invention is not limited to DC applications. For example, in some embodiments, the switching network is an AC switching network. These include embodiments with a power factor correction circuit connected to the AC power grid. These include embodiments in which the power factor correction circuit is connected between the AC voltage switching network and the first control loop.

In some embodiments, the power converter changes switch configurations of the switching network at a frequency different from a frequency at which the switching configuration of the first and / or second control circuits is changed.

In other embodiments, the switching network includes an asymmetrical cascade multiplier having a plurality of DC nodes, each of which is available to provide power at a voltage that is a multiple of the first voltage.

Still other embodiments include an integrated power management circuit incorporating the first control loop. In these embodiments, the current path includes a current path section that extends beyond the integrated power management circuit and into the switching network.

Other embodiments include switches having different physical areas.

The embodiments also include those in which the switch widths of the switches are selected so that a time constant of the charge transfer between charge storage elements of the switching network is at least as large as a switching frequency at which the switching network changes state.

Yet another embodiment improves efficiency by having higher resistance switches. In these embodiments, the switching network is configured such that, at the switching network switching frequency, increasing the resistance of the switches reduces a loss associated with current flowing within the switching network.

The various components of the device need not be the same mass. In fact, one mass can float in relation to the other.

For example, in some embodiments, the first control loop receives a first voltage difference, and the second power converter terminal outputs a second voltage differential. The first voltage difference is a difference between a first voltage and a second voltage that is less than the first voltage; the second voltage difference is a difference between a third voltage and a fourth voltage that is less than the third voltage. In these embodiments, a difference between the fourth voltage and the second voltage is not equal to zero. In other embodiments, the first control loop receives a DC voltage difference, and the power converter receives an AC voltage differential. The DC voltage is a difference between a first voltage and a second voltage that is smaller than the first voltage; the AC voltage difference is a difference between a time varying voltage and a constant voltage. A difference between the constant voltage and the second voltage is not equal to zero.

In another aspect, the invention features a method of causing a power converter to process electrical power. Such a method includes connecting, on a current path between a first power converter terminal and a second power converter terminal, a first loop of a first loop to a first switching grid of a first switching network, setting the first switching network in a configuration that is charging the first grid first charge storage element of the first switching network allows, using energy stored by a magnetic storage element in the first loop in a magnetic field, a charging rate of a first charge storage element of the first switching network is limited, using the switch in the first switching network, the first switching network in a configuration becomes a discharging rate of the first charge storage element of the first switching network, and using the energy stored by the first magnetic storage element in the first control loop, a discharge rate d it is limited first charge storage element of the first switching network.

Some practices further include connecting a second loop of a second loop to a second switched grid of the first switching network and using the second loop to maintain the first power converter terminal at a second voltage, thereby maintaining the second power converter terminal at a second voltage is lower than the first voltage, for which switches are used in the first switching network.

Other practices include limiting a discharge rate of the first charge storage element during a restriction of a charge rate of a second charge storage element, and limiting a charge rate of the second charge storage element during a restriction of a discharge rate of the first charge storage element.

Still another practice involves controlling a switch connected to a magnetic storage element of the second control loop in response to a measured output of the power converter.

In some practices, the first magnetic storage element includes a filter. These include practices where this filter has a resonant frequency.

Practices in which a second loop is used include those that include a third loop connected to the switching network. The third loop includes an inductor, and the first loop includes an inductor coupled to the inductor of the third loop. The two inductors can be coupled positively or negatively.

Practices in which a second loop is used include those in which the second loop has an inductor core and an inductor in a third loop connected to the switching network has the same inductor core.

Some practices include limiting the rate of change in such a way that the first rate and the second rate are the same. Others include that the rate of change be limited in such a way that the first rate and the second rate are not equal.

For practices of the invention, a number of switching networks come into question. For example, practices of the invention include selecting a reconfigurable switching network as switching network, selecting a polyphase switching network, selecting a serial-parallel polyphase switching network, selecting a multi-stage polyphase switching network, selecting a cascade multiplier, or a multilevel switching network is selected.

A number of different control loops can be used in different practices. For example, practices of the invention include selecting a bidirectional, a polyphase, a switched power converter, a resonant power converter, a magnetic storage element, or a magnetic filter as the control loop.

Other practices include selecting an AC switching network as the switching network. These include practices that include controlling a power factor of an output of the AC switching network. These include practices that involve switching a power factor correction circuit between the AC switching network and the first control loop.

Still other practices include changing switching network switch configurations at a frequency different than a frequency at which the switching configuration of the first and / or second control circuits is changed.

In addition, a number of different control loops can be used for the first and / or second control loop. These include a bidirectional loop, a polyphase loop, a switched power converter, a resonant converter, a buck converter, a boost converter, a buck-boost converter, a linear regulator, a buck converter, a flyback converter, a forward converter, a half-bridge converter, a full bridge converter, a magnetic storage element and a magnetic filter.

Practices that rely on a flyback converter include those based on a quasi-resonant flyback converter, an active-clamp flyback converter, a nested flyback converter, or a dual-switch flyback converter. Flow converter based practices include those based on a multi-resonant forward converter, an active-clamp forward converter, a nested forward converter, or a dual-switch forward converter. Practices based on a half-bridge converter include those based on an asymmetric half-bridge converter, a multi-resonance half-bridge converter, or an LLC resonance half-bridge converter.

In another aspect, the invention features a non-transitory computer-readable medium in which is stored a data structure with which a program executable on a computer system operates. When operating such a program, the data structure effects at least a portion of an integrated circuit fabrication process. This integrated circuit includes circuitry described by the data structure. Such Circuitry includes a switching network configured for use with a power converter having a path for current flow between a first power converter terminal and a second power converter terminal. During power converter operation of the power converter, the first power converter terminal is held at a first voltage, and the second power converter terminal is maintained at a second voltage lower than the first voltage. The power converter includes a first control circuit and the aforementioned switching network, both of which are arranged on the path. The switching network includes switches and a first and a second switching power supply. Meanwhile, the first control circuit includes a first magnetic storage element and a first control circuit terminal. The rung includes the first loop terminal, the first switch mode terminal, and the second switch mode terminal. The first loop terminal is to be connected to the first switched mode terminal, and the switching network is configured to switch between a first and a second switch configuration. When the switching network assumes the first switch configuration, the first charge storage element is charged at a first rate. When the switching network assumes the second configuration, the first charge storage element is discharged at a second rate. The first magnetic storage element limits these rates.

The invention also includes a circuit arrangement described by the above-mentioned data structure. Such circuitry includes a switching network having first and second switching terminals and configured to, along with first and second control loops, at least one of which includes a magnetic storage element, on a current flow path between first and second power converter terminals of a power converter with its first and second power converter terminals being held at a respective first and second voltage, respectively, the second voltage being lower than the first voltage. The switching network is configured to switch between switching configurations during which a respective amount of charge in a charge storage element in the power converter changes at a rate that is limited by the magnetic storage element. The current path includes a first loop terminal associated with the first loop and connected to the first switch mode terminal.

These and other features of the invention will become apparent from the following detailed description and the accompanying drawings, in which:

DESCRIPTION OF THE FIGURES

1A shows a DC converter with a separate control circuit and a switching network;

1B a bidirectional version of 1A shows;

2 - 4 DC converters with alternative configurations of the control circuits and switching networks show;

5 a particular implementation of the in 4 shown power converter shows;

6A and 6B Show embodiments with multiple control loops;

7 shows an RC circuit;

8th shows a model of a DC converter with switched capacitors;

9A and 9B show a serial-parallel SC converter operating in a charging phase or a discharge phase;

10 shows a serial pumped symmetrical cascade multiplier with diodes;

11 shows a parallel pumped symmetrical cascade multiplier with diodes;

12 Charge pump signals;

13 shows a symmetrical serial pumped two-phase cascade multiplier with switches;

14 shows a symmetrical parallel pumped two-phase cascade multiplier with switches;

15 shows four different cascade multipliers along with corresponding half-wave versions;

16 shows an output impedance of a switched capacitor power converter as a function of frequency;

17 a particular implementation of the in 1B shown DC rectifier with an adiabatically charged full-wave switching network;

18 the in 17 illustrated DC rectifier during phase A shows;

19 the in 17 illustrated DC rectifier during phase B shows;

20 shows different waveforms associated with a 4: 1 adiabatically charged power converter;

21 shows adiabatic loading of serially connected stages;

22 a particular implementation of the in 21 shown power converter shows;

23 shows an AC voltage rectified using a reconfigurable stage with switched capacitors;

24 shows an architecture of an AC-DC converter;

25 a particular implementation of the in 24 shown AC-DC converter shows;

26 the in 25 shown AC-DC converter during the positive portion of the AC cycle;

27 the in 25 shown AC-DC converter during the negative portion of the AC cycle;

28 shows an AC-DC converter architecture with power factor correction;

29 and 30 certain implementations of the in 1A - 1B illustrated DC rectifier shows;

31 and 32 certain implementations of the in 3 show the illustrated DC converter;

33 and 34 special implementations of the in 2 show the illustrated DC converter;

35 and 36 special implementations of the in 4 show the illustrated DC converter; and

37 an implementation of a DC converter, which corresponds to the in 6B is similar, shown.

DETAILED DESCRIPTION

1A shows a power converter 10 with a switching network 12A connected to an input end with a voltage source 14 connected is. An input of a control loop 16A is then with an output of the switching network 12A connected. A consumer 18A is then with an output of the control loop 16A connected. Electricity flows between the power source 14 and the consumer 18A in the direction indicated by the arrows.

Embodiments described herein are based, at least in part, on the insight that in a multi-stage DC converter, the various components may be made substantially modular and may be mixed and combined in various ways. These components include switching networks and control circuits, the latter simply being made to operate as either a regulator or a magnetic filter by varying the duty cycle. This modularity simplifies the assembly of such power converters. Thus, the in 1A configuration shown is just one of several options, such as at least one switching network 12A with at least one control loop 16A can be configured. 1B shows a bidirectional version of 1A where current flows along a current flow path either from a voltage source 14 to a consumer 18A or by the consumer 18A to the voltage source 14 can flow as indicated by the arrows.

Two basic elements will be described in connection with the following embodiments: Switching networks 12A . 12B and control circuits 16A . 16B , Assuming that connected in series elements of the same type are combined, there are four basic building blocks. These are in 1A - 4 shown. The embodiments disclosed herein include at least one of the four basic building blocks disclosed in U.S. Pat 1A - 4 are shown. More complex power converters can be realized by combining the basic building blocks. In general, a controller, which is not shown for clarity, controls and coordinates the operation of the entire system.

Additional embodiments further contemplate the application of object-oriented programming concepts for the design of DC converters, through which "instantiation" of switching networks 12A . 12B and of control circuits 16A . 16B in different ways as long as its inputs and outputs continue to match in a manner that facilitates the modular composition of DC converters having different characteristics.

In many embodiments, the switching network 12A as an instance of a switched charge storage network of charge storage elements, for example capacitors. More suitable topologies of this type of networks include: chains, Dickson, serial-parallel, Fibonacci, and Doppler, all of which can be adiabatically charged and configured as polyphase networks. A switched charge storage network is also referred to as a switched capacitor network when the charge storage elements are capacitors. A particularly well-suited switched capacitor network is an adiabatically charged version of a full wave cascade multiplier. However, adiabatically charged versions can also be used.

During operation, the charge storage elements in a grid of switched charge storage devices are periodically charged and discharged. As used herein, adiabatic changing the charge on a capacitor means causing a change in the amount of charge stored in the capacitor by directing the charge through a non-capacitive element. A positive adiabatic charge change on the capacitor is considered to be adiabatic charging while a negative adiabatic charge change is considered to be adiabatic discharge. Examples of non-capacitive elements include inductors, magnetic storage elements, such as magnetic filters, resistors, and combinations thereof.

In some cases, a capacitor may be charged adiabatically for part of a time and adiabatically for the remainder of the time. Such capacitors are considered to be adiabatically charged. Likewise, in some cases a capacitor may be charged adiabatically for part of the time and adiabatic for the remainder of the time. Such capacitors are considered to be discharged adiabatically.

An adiabatic store includes a store that is never adiabatic, and adiabatic unloading involves unloading that is never adiabatic.

As used herein, an adiabatically charged switching network is a switching network 12A with at least one capacitor which is discharged both adiabatically charged and adiabatically. An adiabatically charged switching network is a switching network 12A which is not an adiabatically charged switching network.

The instance of the control loop 16A can be provided by a circuit arrangement which plays a role in somehow limiting the electrical characteristics of the system in any convenient way. For example, such a circuit could limit the property to any value or range of values, or limit it to a change at a particular rate, or limit it to a change in a particular direction. A common example would be a regulator that an output voltage or current limited to a particular value or range of values. A buck converter combined with a suitable feedback loop would be an attractive candidate for such a role because of its high efficiency and speed. Such a power converter is also recommended for its ability to be seamless from limiting an output voltage to any desired value by adapting its duty cycle to a limitation on a charge transfer rate within a switching network 12A to transition within a desired range and thus function effectively as a magnetic filter.

Other suitable control circuits 16A Include boost converters, boost / buck converters, flyback converters, forward transformers, half-bridge converters, full bridge converters, buk converters, resonant converters, and linear regulators. The flyback converter may be a quasi-resonant flyback converter, an active-clamp flyback converter, a nested flyback converter or a dual-switch flyback converter. Likewise, the flow transducer may be a multi-resonance flow transducer, an active-clamp flow transducer, a nested flow transducer, or a dual-switch flow transducer. The half-bridge converter may be an asymmetrical half-bridge converter, a multi-resonance half-bridge converter or an LLC resonance half-bridge converter.

In one embodiment, in 2 is shown represents a voltage source 14 an input for a first switching network 12A prepared as an instance of a switched capacitor network. The output of the first switching network 12A is a voltage that is lower than the input voltage connected to a control circuit 16A (eg, a down, an up, or a down / up converter). This control loop 16A provides a regulated input voltage to a second switching network 12B , for example, another switched-capacitor network. Then, a high voltage output of this second switching network 12B to a consumer 18A created.

An embodiment like the one in 2 can be configured to load the load depending on the direction of energy flow along the current flow path 18A regulates or the voltage source 14 regulated.

In another embodiment, in 3 is shown, becomes a low voltage source 14 with an input of a control loop 16A whose output is connected to an input of a switching network 12A is provided to make it amplify to a higher DC value. The output of the switching network is then sent to a consumer 18A provided.

An embodiment like that in 3 can be used to determine the voltage source depending on the direction of the energy flow along the current flow path 14 or the consumer 18A to regulate.

It will now be referred to 4 where another embodiment of a power converter 100 shown is the first, with its entrance 102 connected control loop 16A and a second, with its output 104 connected control loop 16B includes. Between the first and the second control loop 16A . 16B is a switching network 12A that has an entrance 202 and an exit 204 having. The switching network 12A includes charge storage elements 210 one by switch 212 are interconnected. These charge storage elements 210 are in a first and a second group 206 . 208 divided. As discussed above, each of the control loops 16A . 16B a down converter, which may be either configured to regulate a voltage or to act as a magnetic filter, a boost converter, a buck-boost converter, a flyback converter, a buk converter, a resonant converter or a linear regulator. The control circuits 16A . 16B can be operated at a duty cycle necessary to achieve a desired result. For example, in the case of a buck converter, the duty cycle may be adjusted so that the main switch of the buck converter maintains an infinitely extended connection with its magnetic storage element while the synchronous AC-DC converter accompanying it remains indefinitely open. Alternatively, one of the two control circuits 16A . 16B be replaced by a magnetic filter, eliminating the need for additional switch. Such a magnetic filter includes a magnetic storage element, such as an inductor, which provides resistance to rapid changes in current and thus adiabatic charging in the switching network 12A favored.

In some embodiments, the switching network 12A be a bidirectional switched capacitor network as it is in 5 is shown. The switched capacitor network in 5 has as a feature a first capacitor 20 and a parallel second capacitor 22 on. A first switch 24 selectively connects the first or the second capacitor 20 . 22 with a first control loop 16A , and a second switch 26 selectively connects the first or the second capacitor 20 . 22 with a second control loop 16B , Like the knobs that are in 4 can be shown, the first and second control loop 16A . 16B be operated with variable duty cycle. Alternatively, one of the control circuits 16A . 16B be replaced by a magnetic filter having an inductor, which offers rapid changes in the current resistance and thus an adiabatic charging of capacitors within the switching network 12A favored. Both the first and the second switch 24 . 26 can be operated at high frequency, allowing the adiabatic charging and discharging of the first and second capacitors 20 . 22 , is relieved.

In the 5 shown specific embodiment has a two-phase switching network 12A on. However, other types of switching networks may be used instead 12A be used.

In yet another embodiment, the in 6A are shown are a first, a second and a third control loop 16A . 16B . 16C which may be incorporated in one or more separate power management ICs at an output of a first switching network 12A provided to a first, a second and a third consumer 18A . 18B . 18C head for. For the third consumer 18C is a second switching network 12B between the third consumer 18C and the third control loop 16C providing a path similar to that in 2 is similar. Thus presents 6A an example of how the modular construction of control loops and switching networks facilitates the ability to mix and combine components to provide flexibility in the design of DC converters.

Additional flexibility can be achieved by coupling components that are located in mutually different modules. For example, was in 6B in the 6A the configuration shown in reverse: the first, the second and the third control loop 16A . 16B . 16C in 6A were in 6B through a first, a second and a third switching network 12A . 12B . 12C replaced; and the first and second switching networks 12A . 12B in 6A were in 6B through a fourth and a third control loop 16D . 16C replaced. However, the first and second consumers became 18A . 18B in 6A summarized to a first consumer 18A and a first and a second control loop 16A . 16B in the form of magnetic filters added to charge transfer within the first and second switching networks 12A . 12B to restrict. The first and the second control loop 16A . 16B are implemented by buck converters with appropriately selected duty cycles. In 6B have the first and the second control loop 16A . 16B each having an inductor with one and the same core, which are therefore coupled together. This provides a way to save space in the footprint of the circuit as a whole.

A switched capacitor (SC) DC converter includes a network of switches and capacitors. By having the network periodically pass through different topological states using these switches, one can transmit energy from an input to an output of the SC network. Some converters, called "charge pumps", can be used to generate high voltages in a FLASH and other reprogrammable memories.

7 shows a capacitor C initially charged to any value V _c (0). At t = 0, the switch S is closed. At this moment, a short rush of current flows, while the capacitor C is charged to its final value V _in . The charge rate can be described by a time constant τ = RC, which indicates how long it takes for the voltage to increase to or fall to its final value. The exact voltage v _c (t) and the exact current i _c (t) of the capacitor are given by the following equations: v _c (t) = v _c (0) + [V _in -v _c (0)] (1-e ^{-t / RC} ) (1.1) and

The energy loss caused while charging the capacitor can be found by calculating the energy consumed in the resistor R, as follows:

The equation can be further simplified by substituting the expression for i _c (t) from equation (1.2) into equation (1.3). The evaluation of the integral then yields E _loss (t) = 1/2 [V _in -v _c (0) ² C [1 ^{-e -t / RC} ]

If the transients then assume fixed values (ie, t → ∞), the total energy loss caused when charging the capacitor is independent of its resistance R. In this case, the amount of energy loss is the same E _loss (∞) = 1 / 2CΔv 2 / c.

A converter with switched capacitors can be modeled as an ideal transformer, as in 8th shown with a finite output resistance R _o , which takes into account the power loss caused when charging or discharging the power transfer transistors, as in 8th shown. This loss is usually delivered in the ON resistance of the MOSFETs and in the equivalent series resistance of the capacitors.

The output voltage of the converter with switched capacitors is indicated by

There are two extreme cases where the operation of converters can be simplified with switched capacitors and R _o can be easily found. These are referred to as the "slow down limit" and "high speed limit".

At the high speed limit (τ >> T _sw ), the charge and discharge currents are approximately constant, resulting in a triangular AC ripple on the capacitors. Thus, R _{o is} sensitive to the series resistance of the MOSFETs and capacitors, but is not a function of the operating frequency. In this case, R _{o of} the capacitor operating at the fast cut limit is a function of a parasitic resistance.

At the slow down limit, the switching period T _{sw is} much longer than the RC time constant τ of the power transfer capacitors. Under these conditions, systemic energy loss occurs regardless of the resistance of the capacitors and switches. This systemic energy loss arises in part because the root mean square (RMS) of the charging and discharging current is a function of the RC time constant. When the effective resistance R _{eff of} the charging path is decreased (ie, decreased RC), the RMS current becomes stronger and the total energy _loss on charging (E _loss = I _RMS ² R _eff = 1 / 2C × ΔV _C2 ) is independent is from R _eff . One solution to minimize this energy loss is to increase the size of the pumping capacitors in the switched capacitor network.

It is favorable if a switched-capacitor network has a common ground, a high transformation ratio, a low switch load, a low DC capacitor voltage and a low output resistance. These more suitable topologies include: ladder, Dickson, serial-parallel, Fibonacci, and Doppler.

A suitable capacitor is a series-parallel converter with switched capacitors. 9A and 9B show a series-parallel 2: 1 power converter with switched capacitors, which operates in a charge phase or a discharge phase. During the charge phase, the capacitors are connected in series. In the discharge phase, the capacitors are parallel. In the charge phase, the capacitor voltages v add _C1 and _C2 v to V _1, while in the discharge phase, v _C1 and _C2 v V _2, yield, that is, V ₂ = V _1/2.

mit einer Amplitude v_pump um 180 Grad phasenversetzt. Die Kopplungskondensatoren können entweder in Reihe oder parallel gepumpt werden.Other suitable topologies are cascade multiplier topologies, as in 10 and 11 shown. In both charge pumps, one source is at V ₁ and one consumer is at V ₂ . In these types of charge pumps, charge packets are pumped along a chain of diodes while the coupling capacitors are charged and discharged one after the other. As in 12 are shown, clock signals ν _clk and

with an amplitude v _pump 180 degrees out of phase. The coupling capacitors can be pumped either in series or in parallel.

It takes n clock cycles until the initial charge reaches the output. The charge on the last pump capacitor is n times greater than the charge on the first pump capacitor, and thus V ₂ for the power converters in both pump configurations is V ₁ + (n - 1) × v _pump .

Although the above topologies are suitable for boosting a voltage, they can also be used to lower a voltage by swapping the locations where the source and the consumer are located. In such cases, the diodes may be replaced by controlled switches such as MOSFETs and BJTs.

The above cascade multipliers are half-wave multipliers in which charge is transferred only during one phase of the clock signal. This causes an interrupted input current. Both of these cascade multipliers can be converted to full wave multipliers by connecting two half-wave multipliers in parallel and by operating the half-wave multipliers with a 180 degree phase shift. 13 shows a version of a balanced serial pumped full wave cascade multiplier while 14 shows a version of a symmetrical parallel pumped full wave cascade multiplier. Unlike the diodes in the semi-multiplier, the switches are in 13 and 14 bidirectional. As a result, in both of these cascade multipliers, power may flow either from the source to the consumer or from the consumer to the source. Asymmetric multipliers can also be converted to full wave multipliers.

15 shows four different down-conversion versions of full-wave multipliers along with their respective half-wave versions. Further, it is possible to combine N parallel phases and operate them with a phase shift of 180 degrees / N in order to reduce a ripple of an output voltage and to better control the output. The asymmetrical multipliers have a special property: they contain DC voltage nodes whose voltage levels are multiples of V ₂ . These DC nodes can serve as branch points for the supply or the withdrawal of electricity. They also provide suitable locations where reference can be made to V ₁ . This allows you to separate the masses.

The basic building blocks of the modular architecture, which in 1A - 4 can be connected either as independent units or as coupled units. In the situation where switching networks and control circuits are tightly coupled, it is possible to prevent and / or reduce the mechanism of systemic power loss of the switching networks through adiabatic charging. This generally includes the use of the control circuit to control the charging and discharging of the capacitors in the switching network. Furthermore, the output voltage of the control loop and thus of the entire power converter can be regulated in response to external stimuli. One approach to controlling the output voltage is to control the average DC current in a magnetic storage element as found in a magnetic filter.

An advantageous feature of the control loop is the limitation of the RMS current through the capacitors in the switching network in such a way that it remains below a certain limit. A loop achieves such a limitation using either resistive or magnetic memory elements. Unfortunately, resistive elements would consume power, so their use is less favorable. Therefore, embodiments described herein are based on a magnetic memory element with optional switches in the loop. The loop restricts the RMS current by forcing the capacitor current through the magnetic memory element in the loop where there is an average DC current. In these control circuits, which include switches, the switches are actuated to maintain an average DC current across the entire magnetic storage element. This can be achieved by varying the duty cycle of a switch in series with the magnetic storage element. In one embodiment, the duty cycle approaches zero, so that at least one switch is effectively always on. In the limiting case, at least one switch can be omitted altogether.

The control loop can limit both the RMS charging current and the RMS discharge current of at least one capacitor in the switching network. A single loop can regulate the flow into or out of the switching network by lowering and / or allowing the current to rise. Therefore, there are four basic configurations in 1A - 4 are shown. Assuming power flows from the source to the consumer, then in 1A the control loop 16A both the charging and the discharge of the switching network 12A sink in 3 can the control loop 16A both the charging and the discharge of the switching network 12A rise. In 4 can the control loop 16A the charging current of the switching network 12A rise, and the control loop 16B can the discharge current of the same switching network 12A fall and vice versa. In 2 can the control loop 16A both the loading and the Discharge current of the switching network 12B increase, while both the charging and the discharge of the switching network 12A can also sink. If both the switching networks 12A . 12B as well as the control circuits 16A . 16B allow a flow of current in both directions, then a bidirectional current flow (from the source to the consumer and from the consumer to the source) is possible.

One embodiment is based, at least in part, on adiabatic charging of full wave cascade multipliers. A particularly preferred switching network because of its superior fast switching limit impedance, the ease with which its voltage can be increased, and its low switch load is the cascade multiplier.

gepumpt. Wenn die Kopplungskondensatoren stattdessen mit einer getakteten Stromquelle

gepumpt werden, kann jedoch der RMS-Lade- und Entladestrom im Kopplungskondensator begrenzt werden. In diesem Fall werden die Kondensatoren zumindest zum Teil adiabatisch geladen, wodurch der Verlust von 1/2C × ΔVc², der mit einem Stromrichter mit geschalteten Kondensatoren assoziiert ist, wenn dieser an der Langsamschaltgrenze betrieben wird, verringert oder gar eliminiert wird. Dies hat die Wirkung, dass die Ausgangsimpedanz auf die Schnellschaltgrenzenimpedanz gesenkt wird. Wie von der schwarzgepunkteren Linie in 16 gezeigt wird, die einen adiabatischen Betrieb abbildet, würde bei einem vollständig adiabatischen Laden die Ausgangsimpedanz nicht länger eine Funktion der Schaltfrequenz sein.In cascade multipliers, the coupling capacitors typically become with a pulsed voltage source

pumped. If the coupling capacitors instead use a clocked power source

However, the RMS charge and discharge current in the coupling capacitor can be limited. In this case, the capacitors are at least partially adiabatically charged, thereby reducing or even eliminating the loss of 1 / 2C × ΔVc ² associated with a switched capacitor power converter operating at the slow down limit. This has the effect of lowering the output impedance to the high-speed limit impedance. As from the black-dotted line in 16 In the case of fully adiabatic charging, the output impedance would no longer be a function of the switching frequency.

If all else is equal, an adiabatically charged switched capacitor power converter can operate at a much lower switching frequency than a conventionally charged switched capacitor power converter, but with a higher efficiency. Conversely, an adiabatically charged switched capacitor power converter can operate at the same frequency and efficiency as a conventionally charged switched capacitor power converter, but with much smaller, for example, four to ten times smaller coupling capacitors.

werden durch vier Schalter und den Regelkreis 16A emuliert. Der Ausgangskondensator C_O wurde ebenfalls entfernt, damit V_X schwingen kann. In diesem Beispiel ist der Regelkreis 16A ein Aufwärtswandler, der sich wie eine konstante Quelle mit einer geringen Wechselstromwelligkeit verhält. Jeder Stromrichter, der bei der Betriebsfrequenz eine nicht-kapazitive Eingangsimpedanz aufweist, würde einen adiabatischen Betrieb zulassen. Auch wenn geschaltete Stromrichter wegen ihres hohen Wirkungsgrads attraktive Kandidaten sind, sind lineare Regler ebenfalls praktisch. 17 shows a buck converter that works with the in 1B architecture shown matches. In this embodiment, the switching network 12A using the control loop 16A adiabatically charged. The clocked power sources

are through four switches and the control loop 16A emulated. The output capacitor C _O was also removed to allow V _{X to} vibrate. In this example, the loop is 16A an up-converter that behaves like a constant source with a low AC ripple. Any power converter that has a non-capacitive input impedance at the operating frequency would allow adiabatic operation. Although switched converters are attractive candidates for their high efficiency, linear regulators are also practical.

In operation, by the action of closing the switches labeled "1", the capacitors C ₄ , C ₅ and C _{6 are} charged while the capacitors C ₁ , C ₂ and C _{3 are} discharged. Accordingly, the action of closing switches labeled "2" has the complementary effect. The first topological state (phase A) is in 18 shown where all switches labeled "1" are closed and all switches labeled "2" are open. Accordingly, the second topological state (phase B) is in 19 shown where all switches labeled "2" are closed and all switches labeled "1" are open.

In this embodiment, the control circuit limits 16A the RMS charge and discharge current of each capacitor. For example, the capacitor C ₃ during phase A through the magnetic filter element in the control loop 16A discharged while the capacitor C ₃ during phase B through the magnetic filter element in the control loop 16A is loaded, which clearly shows the adiabatic concept. Furthermore, all active components are implemented with switches so that the power converter can process power in both directions.

In 20 For example, a few example voltages and streams of nodes are shown. There is a slight amount of distortion of the rising and falling edges of the two currents shown (I _P1 and I _P2 ), but for the most part the currents are similar to two cycles that are 180 degrees out of phase. In general, adiabatic charging takes place in cascade multipliers only when at least one end of a switch stack is not loaded with a large capacitance, as in the case of this embodiment, where node V _{X is} from the loop 16A only unloaded.

During operation, different amounts of electricity flow through different switches. Therefore, it is useful to dimension the switches in such a way that they are suitable for the currents that will flow through them. For example, transport in 17 the switches that with the at V _P1 and V _P2 held nodes are connected, more power than the other switches. If all the switches were made equal in size, the remaining switches would be much larger than necessary. By making the other switches smaller than those connected to the nodes at V _P1 and V _P2 , one avoids unnecessarily large switches. Since each switch occupies a portion of the circuit, one can physically scale the entire circuit.

An additional advantage is that a capacitive loss increases as the area of a switch increases. Thus, matching the surface area of the switch to the current carried over it during operation is a twofold advantage. As a result, not only the total size of the base of the circuit is reduced, but also advantageously the effect of reducing a capacitive loss is achieved.

In the 17 shown switch at a certain switching frequency their states. To reduce a loss, it is desirable if the switching network 12A limited the RMS current through the switch at this switching frequency. One way to limit the RMS current is to choose the resistors of the switches properly. In particular, the resistors should be high enough that the RC time constant of the charge transfer between the capacitors is similar or longer than the switching frequency. How out 16 can be seen, by controlling the width "W" of the switch and thus its resistance and its size, the switching network 12A forced into the quick-shift limit region.

Unfortunately, using the resistor of the RMS current limiting switches increases resistive power losses and reduces overall efficiency. The control loop 16A however, it allows reducing the resistance of the switches while still working adiabatically. Therefore, the switches can be optimally sized for the highest efficiency without having to worry about limitations of the RMS current, as this is due to the loop 16A (or optionally a magnetic filter) is handled. The optimum size for each switch is chosen by balancing the resistive and capacitive losses in each switch at a given switching frequency and current.

The modular architecture with the in 1A - 4 may be extended to cover a wider range of applications, such as high DC, AC to DC, DOWN to V, and multiple output voltages. Each of these applications involves the separation of the transform, control, and possibly magnetic filter functions. An extension of the architecture may also include adiabatically charged switched capacitor power converters.

In some converters with switched capacitors, the number of capacitors and switches increases linearly with the transformation ratio. Thus, a large number of capacitors and switches are necessary when the transformation ratio is large. Alternatively, a large transformation ratio can be achieved by connecting numerous low-gain stages in series, as in FIG 21 shown. The transformation ratio of the entire switched capacitor stack (V _in / V _x ) is as follows:

The main advantage of the stacked row configuration is that the stress levels at the front stages are much higher than those at the rear stages. This usually requires stages with different rated voltages and sizes. However, the transformation ratio can be easily changed by bypassing one or more stages.

Adiabatic charging of a preceding series-connected switching network occurs only when the following switching network controls the charging and discharging currents of the preceding stage. Thus, it is preferable to use full-wave converters with switched capacitors in the front stages or to use stages with switched capacitors, for example the switched capacitor series-parallel single-phase converters.

22 shows a power converter with a first switching network 12A connected in series with a second switching network 12D connected with the in 21 architecture shown matches. Both the first and the second switching network 12A . 12D are two-phase cascade multipliers. In operation are switches, which are labeled "1" and "2", always in complementary states and are switches labeled "7" and "8", always in complementary states. Thus, in a first circuit state, all switches labeled "1" are open and all switches labeled "2" are closed. In a second circuit state, all switches labeled "1" are closed and all switches labeled "2" are open. In this embodiment, by closing the switches 1, the capacitors C ₁ , C ₂ , C _{3 are} charged while the capacitors C ₄ , C ₅ , C _{6 are} discharged, and the closing of the switches 2 has the complementary effect. Also, by closing the switches 7, the capacitors C ₇ , C ₈ , C _{9 are} charged while the capacitors C ₁₀ , C ₁₁ , C _{12 are} discharged, and the closing of the switches 8 has the complementary effect.

Overall, the power converter provides a 32: 1 lows, assuming that the first loop 16A is a buck converter with a nominal bucking ratio of 2: 1. Further, if the input voltage is 32 V and the output voltage is 1 V, then the switches in the first switching network 12A Block 8 volts while the switches in the second switching network 12D 2 volts must block.

The modular architecture with the basic building blocks in 1A - 4 can be configured so that an AC input voltage can be handled. One of the key attributes of switched capacitor power converters is their ability to efficiently operate over a large input range by reconfiguring the switched capacitor network. If you think of the wall AC voltage (ie 60 Hz & 120 V _RMS ) as a slow-moving DC voltage, then you should have a stage at the front end 13A with switched capacitor, the so-called AC switching network, to be able to develop the varying over time input voltage into a relatively stable DC voltage.

In 23 is shown over a single 60 Hz cycle over which the undeveloped DC voltage is applied a graph of a waveform of a 120 V _RMS -Wechselspannung. The AC voltage switching network 13A In addition to an inverting stage, different configurations (1/3, 1/2, 1/1) are available. It was also designed to keep the DC voltage below 60V. After the AC voltage has been deployed, an in 24 shown control loop 16A responsible for generating a final output voltage. It may also be necessary, another switching network between the AC voltage switching network 13A and the control loop 16A to place in order to further condition the tension. If this is the case, there are reservations about rows connected in rows because of the AC switching network 13A a switching network for special purposes. Some kind of magnetic or electrical insulation is also common in AC DC converters for safety reasons. Thus, in 24 the voltages: V _AC , V _DC and V _O intentionally defined so that a common ground is ignored.

25 shows an AC to DC converter, with the in 24 architecture shown matches. In this embodiment, the AC voltage switching network 13A a synchronous AC bridge rectifier followed by a reconfigurable two-phase step-down cascade multiplier with three mutually different conversion ratios (1/3, 1/2, 1/1) during the loop 16A is a synchronous buck converter. In operation, switches labeled "7" and "8" are always in complementary states. During the positive portion of the AC cycle (0 to π radians), all switches labeled "7" are closed, while all switches labeled "8" are open, as in 26 shown. Similarly, during the negative portion of the AC cycle (π to 2π rad), all switches labeled "8" are closed, while all switches labeled "7" are open, as in 27 shown.

In addition to the inversion function provided by switches 7 and 8, switches 1A-1E and switches 2A-2E can be selectively opened and closed as shown in Table 1 to provide the following three different conversion rates: 1 / 3, 1/2 and 1.

TABLE 1

The AC voltage switching network 13A is provided with a digital clock signal CLK. Also, a second signal CLKB is generated, which may simply be the complement of CLK (ie high when CLK is low and which is low when CLK is high) or which may be generated as non-overlapping complement. With a switching pattern established according to the first row of Table 1, the AC switching network provides 13A for a down ratio of one to three (1/3). With a switching pattern, which is established according to the second row of Table 1, provides the AC voltage switching network 13A for a down ratio of one to two (1/2). With a switching pattern established according to the first row of Table 1, the AC switching network provides 13A for a down ratio of one.

Most power supplies connected to a power outlet meet a specific power factor specification. The power factor is a dimensionless number between 0 and 1, which defines a ratio of the really flowing power to the apparent power. A common way to control the harmonic current and thus increase the power factor is to use an active power factor corrector as in 28 shown. A power factor corrector circuit 17A causes the input current to be in phase with the line voltage, thereby causing the reactive power consumption to be zero.

29 - 36 shows specific implementations of power converters that comply with the in 1A - 4 shown architectural diagram are compliant. In any implementation, one or more closed loops, which may include magnetic filters, may limit both the RMS charging current and the RMS discharging current of at least one capacitor in each switching network, such that all of these switching networks are adiabatically charged switching networks. When decoupling capacitors 9A or 9B However, the ability of the control circuit to limit the RMS charging and discharging current may be impaired. The capacitors 9A and 9B are optional, and to keep the output voltage reasonably constant, a capacitor Co is used. All levels share a common mass. However, this does not have to be the case. For example, if a loop 16A As a flyback converter is implemented, then the mass can be easily separated. Also a switching network 12A may have separate masses due to capacitive isolation. For simplicity, each switching network also has a single conversion ratio in each implementation. However, reconfigurable switching networks may be used instead that allow for power conversion at several mutually different conversion ratios.

In operation, switches labeled "1" and "2" are always in complementary states. Thus, in a first circuit state, all switches labeled "1" are open and all switches labeled "2" are closed. In a second circuit state, all switches labeled "1" are closed and all switches labeled "2" are open. Likewise, switches labeled "3" and "4" are in complementary states, switches labeled "5" and "6" are in complementary states, and switches labeled "7" and "8" are in complementary states. Typically, the control circuits operate at higher switching frequencies than the switching networks. However, there are no requirements with respect to the switching frequencies between and among the switching networks and control circuits.

29 shows a boost converter, which in 1A shown architecture corresponds. In this embodiment, the switching network 12A a two-phase cascade multiplier with a conversion ratio of 1: 3, during the loop 16A is a two-phase boost converter. In operation, by closing the switches 1 and opening the switch 2, the capacitors C ₃ and C _{4 are} charged, while the capacitors C ₁ and C _{2 are} discharged. Conversely, by opening the switches 1 and closing the switches 2, the capacitors C ₁ and C _{2 are} charged, while the capacitors C ₃ and C _{4 are} discharged.

30 shows a bidirectional buck converter, which the in 1B shown architecture corresponds. In this embodiment, the switching network 12A a two-phase step down cascade multiplier with a conversion ratio of 4: 1, during the loop 16A is a synchronous buck converter. In operation, by closing the switches 1 and opening the switch 2, the capacitors C ₁ , C ₂ and C _{3 are} charged, while the capacitors C ₄ , C ₅ and Ca are discharged. Conversely, by opening the switches 1 and closing the switches 2, the capacitors C ₄ , C ₅ and Ca are charged, while the capacitors C ₁ , C ₂ and C _{3 are} discharged. All active components are implemented with switches so that the power converter can process power in both directions.

31 shows a boost converter, with the in 3 architecture shown matches. In this embodiment, the control loop is 16A a boost converter while the switching network 12A is a serial-parallel two-phase SC step-up converter with a conversion ratio of 1: 2. In operation is through Close the switch 1, a capacitor C _{2 is} charged while a capacitor C _{1 is} discharged. The closing of the switch 2 has the complementary effect.

32 shows a bidirectional high-low power converter, with the in 3 architecture shown matches. In this embodiment, the control loop is 16A a synchronous buck-boost converter with four switches, while the switching network 12A is a two-phase boost cascade multiplier with a conversion ratio of 1: 4. In operation, by closing the switches 1, the capacitors C ₄ , C ₅ and Ca are charged, while the capacitors C ₁ , C ₂ and C _{3 are} discharged. The closing of the switch 2 has the complementary effect. All active components are implemented with switches so that the power converter can process power in both directions.

33 shows an inverting high-low power converter with the in 2 architecture shown matches. In this embodiment, the first switching network 12A a serial-parallel SC buck converter with a conversion ratio of 2: 1; the first control loop 16A is a buck-boost converter and the second switching network 12B is a serial-parallel SC boost converter with a conversion ratio of 1: 2. In operation, a capacitor C _{1 is} charged by closing the switch 1, while closing the switch 2, the capacitor C _{1 is} discharged. Similarly, by closing the switch 7, a capacitor C _{2 is} discharged, while closing the switch 8, the capacitor C _{2 is} charged.

34 shows a bidirectional inverting high-low power converter, with the in 2 architecture shown matches. In this embodiment, the first switching network 12A a serial-parallel two-phase SC buck converter with a conversion ratio of 2: 1; the first control loop 16A is a synchronous buck-boost converter and the second switching network 12B is a serial-parallel two-phase SC step-up converter with a conversion ratio of 1: 2. In operation, a capacitor C _{1 is} charged by closing the switches 1, while a capacitor C _{2 is} discharged. The closing of the switch 2 has the complementary effect. Similarly, closing the switches 7 charges a capacitor C ₄ while discharging a capacitor C ₃ . The closing of the switch 8 has the complementary effect. All active components are implemented with switches so that the power converter can process power in both directions.

35 shows a high-low power converter with the in 4 corresponds to the block diagram shown. In this embodiment, the first control loop is 16A an up-converter, is the first switching network 12A a serial-parallel two-phase SC step-up converter with a conversion ratio of 1: 2 and is the second loop 16B an up-converter. In operation, by closing the switches 1, the capacitors C ₁ and C _{2 are} charged, while at the same time the capacitors C ₃ and C _{4 are} discharged. The closing of the switch 2 has the complementary effect.

36 shows a bidirectional high-low power converter, with the in 4 corresponds to the block diagram shown. In this embodiment, the first control loop is 16A a synchronous boost converter, is the first switching network 12A a serial-parallel fractional two-phase SC step-up converter with a conversion ratio of 3: 2 and is the second loop 16B a synchronous buck converter. In operation, by closing the switches 1, the capacitors C ₃ and C _{4 are} charged, while at the same time the capacitors C ₁ and C _{2 are} discharged. The closing of the switch 2 has the complementary effect. All active components are implemented with switches so that the converter can process power in both directions. By adjusting the duty cycle of the second control loop 16B in such a way that the switch 6 remains closed for a long time, an inductor 12 an adiabatic charge transfer between capacitors in the first switching network 12A favor. In such an embodiment, the switches 5, 6 can be dispensed with, whereby the total surface area of the chip that is necessary to the second loop 16B to implement is reduced.

37 shows a buck converter that is substantially compliant with the architecture used in 6B was presented. In this embodiment, a fourth control circuit 16D coupled inductors L ₁ , L ₂ . The fourth loop 16D regulates in parallel the first and the second switching network 12A . 12B that work 90 ° out of phase. The object of restricting a charge transfer between the four capacitors Co of the first and the second switching network 12A . 12B share the first and the second loop 16A . 16B , which is also the coupled inductors 13 Share L ₄ . If the coupling factor of the coupled inductors 13 . 14 is properly adjusted, a ripple current can be reduced through these inductors. Thus, in 37 the possibility of coupled inductors L ₁ , L ₂ within a single component, that is the fourth control loop 16D , and already in 6B indicated possibility coupled inductors 13 . 14 via separate components, ie the first and the second control loop 16A . 16B represented.

Note that the topology of the loop may be any type of power converter capable of regulating the output voltage including, but not limited to, synchronous buck converters, three-level synchronous buck converters, SEPIC, magnetic filters and soft-switched or resonant inverters. Likewise, the switching networks can be realized with a number of different topologies with switched capacitors, depending on the desired voltage transformation and the permissible switch voltage.

In some implementations, a computer-accessible storage medium includes a database that represents one or more components of the power converter. For example, the database may contain data representing a switching network that has been optimized to favor low-loss operation of a charge pump.

Generally speaking, a computer-accessible storage medium may include any non-volatile storage medium accessible to a computer during use for issuing commands and / or data to the computer. For example, a computer-accessible storage medium may include storage media such as magnetic disks or optical disks and semiconductor memories.

In general, a database representing the system may be a database or other data structure that can be read by a program and used directly or indirectly to fabricate the hardware that makes up the system. For example, a database may be a behavioral description or a register-transfer-level (RTL) description of the hardware functions in a high-level design language (HDL) such as Verilog or VHDL. The description may be read by a synthesis tool that can construct the description to generate from a synthesis library a netlist comprising a list of gates. The netlist includes a set of gates that also represent the functions of the hardware that makes up the system. The netlist can then be placed and steered to produce a dataset describing geometric shapes to be applied to a mask. The mask may then be used in various semiconductor processing steps to produce one or more semiconductor circuits that conform to the system. Alternatively, in other examples, the database itself may be the netlist (with or without the synthesis library) or the record.

Having described one or more preferred embodiments, it will be apparent to those of ordinary skill in the art that other embodiments having these circuits, techniques, and concepts may be utilized. Thus, it is requested that the scope of the patent not be limited to the described embodiments, but rather be limited only by the spirit and scope of the appended claims.

Claims (63)

An apparatus for processing electrical power, the apparatus comprising a power converter having a path for a current flow between a first power converter terminal and a second power converter terminal, wherein during operation of the power converter, the first power converter terminal is maintained at a first voltage and the second power converter terminal at a second voltage which is lower than the first voltage, wherein the power converter comprises a first control circuit and a switching network, both of which are arranged on the path, wherein the switching network comprises switches, a first charge storage element and a first and a second switching power supply, wherein the first Control loop comprises a first magnetic memory element and a first loop terminal, wherein the current path comprises the first loop terminal, the first switching power supply and the second switching power supply, wherein the first loop connection to the first switching network wherein the switching network is adapted to switch between a first switch configuration and a second switch configuration, wherein when the switching network takes the first switch configuration, the first charge storage element is charged at a first rate, wherein when the switching network is the second switch configuration assumes the first charge storage element is discharged at a second rate, and wherein the first rate and the second rate are limited by the first magnetic storage element. 2. The apparatus of claim 1, further comprising a second control loop disposed on the path, wherein the second control loop comprises a second control loop connection, the flow path comprising the second control loop connection, and wherein the second control loop connection is connected to the second switchgear connection. The device of claim 1 or claim 2, wherein the switching network further comprises a second charge storage element, wherein when the switching network takes the first switch configuration, the second charge storage element is discharged at a first rate and wherein, when the switching network takes the second configuration, the second one Charge storage element is charged at a second rate, wherein the first and the second rate are both limited by the first magnetic storage element. The device of claim 2, wherein the second control circuit comprises a second magnetic memory element and a switch connected to the second magnetic memory element, wherein the switch can be controlled to switch between at least two switching configurations. The apparatus of claim 2, wherein the second control loop further comprises a feedback loop for controlling the operation of the switch in response to a measured output of the power converter. Apparatus according to claim 1 or claim 2, wherein the first magnetic storage element comprises a filter. Apparatus according to claim 1 or claim 2, wherein the first magnetic storage element comprises a filter and wherein the filter has a resonant frequency. The apparatus of claim 2, further comprising a third control circuit, wherein the third control circuit is connected to the switching network, wherein the third control circuit comprises an inductor, and wherein the second control circuit comprises an inductor, which is coupled to the inductor of the third control circuit. The device of claim 2, further comprising an inductor core and a third loop, the third loop being connected to the switching network, the inductor core being common to a third-loop inductor and a second-loop inductor. Apparatus according to claim 1 or claim 2, wherein the first rate and the second rate are equal. The apparatus of claim 1 or claim 2, wherein the switching network comprises a reconfigurable switching network, the reconfigurable switching network being one having a set of switch configurations {α ₁ , α ₂ , ... α _k }, wherein k> 2, and the Switching network is designed to switch between α _b and α _n for all m, n in the set of integers {1, 2 ... k}. Apparatus according to claim 1 or claim 2, wherein the switching network comprises a multi-phase switching network. Apparatus according to claim 1 or claim 2, wherein the switching network comprises a serial-parallel polyphase switching network. Apparatus according to claim 1 or claim 2, wherein the switching network comprises a multistage multiphase switching network. The device of claim 1 or claim 2, wherein the switching network comprises a switching network receiving a charge at an input and outputting a charge at an output, wherein charge transport from the input to the output is performed in n switching cycles, where n> 1. Apparatus according to claim 1 or claim 2, wherein the switching network comprises a multi-level switching network. The device of claim 2, wherein at least one of the first and second control circuits comprises a bidirectional control circuit. The device of claim 2, wherein at least one of the first and second control circuits comprises a multi-phase control circuit. The device of claim 2, wherein at least one of the first and second control circuits comprises a switched power converter. The device of claim 2, wherein at least one of the first and second control circuits comprises a resonant converter. The device of claim 2, wherein at least one of the first and second control circuits comprises a magnetic filter. Apparatus according to claim 1 or claim 2, wherein the switching network is configured as an AC voltage switching network. The device of claim 1 or claim 2, wherein the switching network is configured as an AC voltage switching network, the device further comprising a power factor correction circuit connected to the AC voltage switching network. The device of claim 1 or claim 2, wherein the switching network is configured as an AC switching network, the device further comprising a power factor correction circuit connected to the AC switching network, and wherein the power factor correction circuit is connected between the AC voltage switching network and the first control loop. Apparatus according to claim 1 or claim 2, wherein the power converter is adapted to change switch configurations of the switching network at a frequency different from a frequency at which the switching configuration of the first and / or the second control loop is changed. The apparatus of claim 1 or claim 2, wherein the switching network comprises a cascade multiplier, the cascade multiplier being an asymmetric cascade multiplier having a plurality of DC nodes, each capable of delivering power at a voltage that is a multiple of the first voltage. The apparatus of claim 2, further comprising a power management integrated circuit having multiple control loops built therein, the power path including a power path section extending out of the power management integrated circuit and into the switching network. The device of claim 1 or 2, wherein the switches comprise a first switch having a first area and a second switch having a second area, wherein the first area is greater than the second area. Apparatus according to claim 1 or 2, wherein the power converter is adapted to change switch configurations of the switching network at a switching frequency, wherein each of the switches has a switch width and wherein the switch widths of the switches are selected so that a time constant of a charge transfer between charge storage elements of the switching network at least is as big as the switching frequency. The device of claim 1 or 2, wherein the power converter is configured to change switch configurations of the switching network at a switching frequency, wherein the switching network is configured so that increasing a resistance of the switches at the frequency reduces losses associated therewith Electricity flows within the network. The device of claim 1 or 2, wherein the switching network is configured as an AC switching network, the first control circuit receiving a first voltage, the second power converter terminal outputting a second voltage difference, wherein the first voltage difference is a difference between a first voltage and a second voltage is as the first voltage, wherein the second voltage difference is a difference between a third voltage and a fourth voltage, which is smaller than the third voltage, and wherein a difference between the fourth voltage and the second voltage is not equal to zero. The apparatus of claim 1 or 2, wherein the switching network is configured as an alternating voltage switching network, wherein the first control circuit receives a DC voltage difference, wherein the power converter receives an AC voltage difference, wherein the DC voltage is a difference between a first voltage and a second voltage that is smaller than the first Voltage, wherein the AC difference is a difference between a time-varying voltage and a constant voltage, wherein a difference between the constant voltage and the second voltage is nonzero. A method for causing a power converter to process electrical power, the method comprising, on a current path for a current flow between a first power converter terminal and a second power converter terminal, a first control loop of a first control loop having a first control loop first switching power supply of a first switching network is connected, the first switching network is brought into a configuration that allows charging of the first charge storage element of the first switching network, using energy stored by a magnetic storage element in the first loop in a magnetic field, a charging rate of a first Charge storage element of the first switching network is limited, using the switch in the first switching network, the first switching network is brought into a configuration that allows a discharge of the first charge storage element of the first switching network, and using the energy stored by the first magnetic storage element in the first control loop, a discharge rate of the first charge storage element of the first switching network is limited. The method of claim 33, further comprising connecting a second loop of a second loop to a second switched grid of the first switching network and using the second loop maintaining the first power converter terminal at a second voltage, thereby maintaining the second power converter terminal at a second voltage. which is lower than the first voltage, for which switches are used in the first switching network. The method of claim 33, further comprising limiting a discharge rate of the first charge storage element during a restriction of a charge rate of a second charge storage element, and limiting a charge rate of the second charge storage element during a restriction of a discharge rate of the first charge storage element. The method of claim 34, further comprising controlling a switch connected to a magnetic storage element of the second control loop in response to a measured output of the power converter. The method of claim 33, wherein the first magnetic memory element comprises a filter. The method of claim 37, wherein the filter has a resonant frequency. The method of claim 34, further comprising a third control loop, wherein the third control loop is connected to the switching network, wherein the third control loop comprises an inductor, and wherein the second control loop comprises an inductor, which is coupled to the inductor of the third control loop. The method of claim 34, further comprising an inductor core and a third feedback loop, wherein the third feedback loop is connected to the switching network, wherein the inductor core is common to a third-loop inductor and a second-loop inductor. The method of claim 33, wherein the first rate and the second rate are equal. The method of claim 33, further comprising selecting a reconfigurable switching network as the switching network. The method of claim 33, further comprising selecting a multi-phase switching network as the switching network. The method of claim 33, further comprising selecting a serial-parallel polyphase switching network as the switching network. The method of claim 33, further comprising selecting a multistage multiphase switching network as the switching network. The method of claim 33, further comprising selecting a cascade multiplier as the switching network. The method of claim 33, further comprising selecting a multi-level switching network as the switching network. The method of claim 34, further comprising selecting a bidirectional closed loop as at least one of the first and second control loops. The method of claim 34, further comprising selecting a polyphase control loop as at least one of the first and second control loops. The method of claim 34, further comprising selecting a switched power converter as at least one of the first and second control loops. The method of claim 34, further comprising selecting a resonant converter as at least one of the first and second control loops. The method of claim 34, further comprising selecting a magnetic memory element as at least one of the first and second control loops. The method of claim 34, further comprising at least one of the first and second control loops being selected to include a magnetic filter. The method of claim 33, further comprising configuring the switching network as an AC voltage switching network. The method of claim 33, further comprising controlling a power factor of an output of the AC switching network. The method of claim 33, further comprising switching a power factor correction circuit between the AC switching network and the first control loop. The method of claim 34, further comprising changing switch configurations of the switching network at a frequency different than a frequency at which the switching configuration of the first and / or second control circuits is changed. A non-transitory computer-readable medium storing a data structure that is executable by a program executable on a computer system, wherein the data structure, when operative therewith, effects at least a portion of an integrated circuit fabrication process comprising a Includes circuitry described by the data structure, wherein the circuitry described by the data structure includes a switching network configured to operate with a power converter that includes a path for current flow between a first power converter terminal and a second power converter terminal operation of the power converter, the first power converter terminal is held at a first voltage and the second power converter terminal is maintained at a second voltage lower than the first voltage, the power converter having a first control circuit and the switching power both disposed on the path, the switching network comprising switches and first and second switched mode power connections, the first control circuit comprising a first magnetic memory element and a first closed loop terminal, the current path comprising the first closed loop terminal, the first switched mode terminal and the second switched mode terminal wherein the first loop connection is connected to the first switch mode power supply, wherein the switching network is configured to switch between a first switch configuration and a second switch configuration, wherein when the switch network adopts the first switch configuration, the first charge storage element is charged at a first rate wherein when the switching network adopts the second switch configuration, the first charge storage element is discharged at a second rate, and wherein the first rate and the second rate are limited by the first magnetic storage element. Circuitry described by the data structure of claim 58, wherein the circuitry comprises a switching network comprising first and second switching terminals, the switching network being arranged, together with a first and a second loop, at least one of which is a magnetic memory element including, disposed on a current flow path between a first and a second power converter terminal of a power converter, wherein the first and the second power converter terminal are held at a respective first and second voltage, wherein the second voltage is lower than the first voltage, wherein the switching network for is configured to switch between switch configurations, during which each changes an amount of charge in a charge storage element in the power converter at a rate that is limited by the magnetic storage element, wherein the current path, a first loop terminal, the m it is associated with the first control circuit and is connected to the first switching power supply, and a second control circuit connection, which is associated with the second control circuit and is connected to the second switching power supply has. Apparatus according to claim 1 or 2, further comprising a control device which controls both the first control circuit and the switching network. The apparatus of claim 1 or 2, wherein the switching network comprises first and second clock terminals for outputting out of phase clock signals, wherein the first clock signal is connected to a first set of capacitors and the second clock signal is connected to a second set of capacitors first and second capacitors from the first set are separated by a third capacitor from the second set, wherein a first switch connects the first capacitor to the third capacitor and a second switch connects the third capacitor to the second capacitor. The apparatus of claim 1 or 2, wherein the switching network comprises a cascade multiplier, wherein the cascade multiplier is an asymmetrical cascade multiplier having a plurality of DC nodes, each of which is available to supply a different reference voltage. The apparatus of claim 1 or 2, wherein the switching network comprises first and second clock terminals for outputting out of phase clock signals, the first clock signal being connected to a first set of series capacitors and a second set of series capacitors, the second set being parallel to the first A set, wherein the second clock signal is coupled to a third set of series capacitors and a fourth set of series capacitors, the third set being parallel to the fourth set, the device further comprising first and second switch arrays, the first switch set. Array connects the first and third sets of series capacitors and the second switch array connects the second and fourth sets of series capacitors. The device of claim 1 or claim 2, wherein the switching network is configured as an AC voltage switching network, the device further comprising a power factor correction circuit connected to the AC voltage switching network.

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