DE102017206710A1 - Verfahren und Vorrichtung für ein dynamisches, virtuelles System-on-Chip - Google Patents

Verfahren und Vorrichtung für ein dynamisches, virtuelles System-on-Chip Download PDF

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Publication number
DE102017206710A1
DE102017206710A1 DE102017206710.1A DE102017206710A DE102017206710A1 DE 102017206710 A1 DE102017206710 A1 DE 102017206710A1 DE 102017206710 A DE102017206710 A DE 102017206710A DE 102017206710 A1 DE102017206710 A1 DE 102017206710A1
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resource
chip
virtual
processor device
resources
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Pending
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DE102017206710.1A
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German (de)
English (en)
Inventor
Rajan Goyal
Muhammad Raghib Hussain
Richard E. Kessler
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Marvell Asia Pte Ltd
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Cavium LLC
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G06F9/45558—Hypervisor-specific management and integration aspects
    • G06F2009/4557—Distribution of virtual machine instances; Migration and load balancing

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)
DE102017206710.1A 2016-04-22 2017-04-20 Verfahren und Vorrichtung für ein dynamisches, virtuelles System-on-Chip Pending DE102017206710A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/136,330 US10235211B2 (en) 2016-04-22 2016-04-22 Method and apparatus for dynamic virtual system on chip
US15/136,330 2016-04-22

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DE102017206710A1 true DE102017206710A1 (de) 2017-10-26

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US (1) US10235211B2 (https=)
JP (2) JP2017199369A (https=)
KR (2) KR102362826B1 (https=)
CN (2) CN107436808B (https=)
DE (1) DE102017206710A1 (https=)
TW (4) TWI838190B (https=)

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KR102362826B1 (ko) 2022-02-11
JP2022123018A (ja) 2022-08-23
TWI800480B (zh) 2023-05-01
CN107436808B (zh) 2023-07-07
CN116820763A (zh) 2023-09-29
TW202424742A (zh) 2024-06-16
US20170308408A1 (en) 2017-10-26
JP7334396B2 (ja) 2023-08-29
TW201810035A (zh) 2018-03-16
TW202328915A (zh) 2023-07-16
JP2017199369A (ja) 2017-11-02
KR20220017985A (ko) 2022-02-14
CN107436808A (zh) 2017-12-05
KR20170121056A (ko) 2017-11-01
TWI838190B (zh) 2024-04-01
KR102516167B1 (ko) 2023-03-30
US10235211B2 (en) 2019-03-19
TWI872969B (zh) 2025-02-11
TW202516343A (zh) 2025-04-16

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