DE102016217789A1 - Method for producing electrical contacts on a component - Google Patents

Abstract

The present invention relates to a method for producing one or more electrical contacts on a component, comprising the following steps:
Provision of a component which has a front and a rear side, wherein an outer layer of a transparent, electrically conductive oxide (TCO) or a self-passivating metal or semiconductor is present on the front side and / or the rear side,
Applying a structured, electrically conductive seed layer on defined regions of the outer layer, wherein the application of the seed layer is not galvanic,
- Electrodeposition of at least one metal on the seed layer.

Description

The present invention relates to a method for producing electrical contacts (for example, in the form of electrical tracks) on a component, in particular an electrical component such as. a solar cell or a light emitting diode, or even a precursor of a printed circuit board. Furthermore, the present invention relates to devices obtainable by this method.

For the use of many components, it is necessary that electrical contacts, especially in the form of electrical conductors, are mounted on them. The electrical contacts serve, for example, to dissipate current from the component or to tap voltage from the component or to establish an electrical connection between electrical components that are present on the component. If the component is, for example, a solar cell, then the photocurrent generated by the photovoltaic effect in this semiconductor component can be dissipated via the electrical contacts. Alternatively, the component may be, for example, a precursor of a printed circuit board which is finally transferred into a printed circuit board (PCB) by the application of printed conductors.

In a known and conventional method, a paste containing silver particles is applied to the component and then treated at a temperature sufficiently high to effect sintering of the silver particles. For this, temperatures of at least 800 ° C may be required. For many components, however, such high temperatures are unacceptable.

A heterojunction solar cell, eg, a silicon heterojunction solar cell (SHJ solar cell), is an exemplary electrical device that is unsuitable for mounting electrical contacts at relatively high temperatures. The SHJ solar cell is a wafer-based crystalline silicon solar cell with an emitter and a back- or front-surface-field of amorphous silicon. Crystalline, in particular monocrystalline silicon, which is n- or p-doped (base doping), is used as the starting material. On both sides, first a very thin (about 1 to 10 nm) intrinsic (undoped) amorphous silicon layer is applied. This is followed on one side by the application of a very thin (about 10 to 50 nm), doped, amorphous silicon layer whose doping type (n- or p-type) is opposite to the base doping (amorphous emitter layer). On the other side, a thin (10 to 50 nm) amorphous silicon layer is applied whose doping type corresponds to that of the base doping (back or front surface field). Finally, a conductive transparent oxide (English: "Transparent Conductive Oxide" TCO) such. As indium tin oxide (ITO) of 50-100 nm thickness applied. Such a TCO layer usually has a sheet resistance of not more than 300 Ω at 25 ° C. Structure and mode of operation of heterojunction solar cells describe, for example De Wolf et al., Green, Vol. 2 (2012), pp. 7-24 ,

In order to avoid unwanted crystallization in the amorphous silicon layers of the SHJ solar cell, temperatures of more than 250 ° C should be avoided.

For other types of solar cells or other electrical components such as LEDs, the attachment of electrical contacts at the lowest possible temperature load is desirable.

By using sufficiently small silver nanoparticles, the sintering temperature of silver pastes can be lowered below 200 ° C. The disadvantage here, however, that the pastes can not be stored because the sintering process is slow even at room temperature and that silver nanoparticles represent a significant health risk. In addition, the costs of nanoparticles are significantly higher than for large particles or electrodeposited metals.

Also known is the use of pastes containing organic binders, e.g. temperature-crosslinking resins and silver particles in flake form. The resin forms a matrix which holds the flakes together and produces adhesion to the outer layer of the electrical component (eg, a layer of transparent electrically conductive oxide (TCO) such as ITO). However, this achieves a significantly lower conductivity than with thermally sintered pastes. As a result, more silver is needed and increases the shading of the solar cell front side by the tracks.

Alternatively, the tracks can be applied galvanically. This achieves a very good electrical conductivity of the conductor tracks. However, the surface must be printed with a mask made of Galvanolack as a negative of the conductor pattern. After the electrodeposition, the paint must be removed in a chemical bath. The necessity of this resist mask makes this process but because of the material consumption and the necessary wastewater purification very expensive. In addition, the adhesive strength of the electrodeposited metal layer on a TCO layer (i.e., a layer of a transparent, electrically conductive oxide such as ITO) is sometimes unsatisfactory.

In the case of particularly high-quality components, first of all a thin metal layer or a metal layer stack is applied to the workpiece over the entire surface. Then, for example, a photoresist is applied and patterned photolithographically in the form of a negative mask of the printed conductors to be produced. Alternatively, the negative mask is already structured (recordable by means of inkjet) applied. The non-varnished surface is galvanically reinforced with copper and the copper is optionally protected from oxidation by an additional layer of silver. Subsequently, the paint is removed in a chemical bath and etched the metal in the previously painted areas. A corresponding metallization process is used for example in US 8,399,287 described.

US 2014/0295614 describes a method for metallization of back contact solar cells. The vapor-deposited aluminum seed layer can be activated over the whole area by a zincate step. Subsequently, the application of a local barrier layer can take place. After the electrodeposition, the barrier layer must be removed and the activated aluminum seed layer etched.

Even with printed circuit boards, so-called printed circuit boards (PCB) made of plastic, it is not possible to print printed conductors made of sinterable metal particles due to the lack of thermal resistance of the carrier material. Due to the high cost, the lack of conductivity and the inability to solder for the coupling of the electrical components, interconnects made of silver flakes in a resin matrix are only possible in exceptional cases.

An object of the present invention is to provide electrical contacts such as e.g. electrical traces on a component via a process that minimizes thermal stress on the component, avoids the use of masks (e.g., resist masks), and is as efficient as possible.

• – Bereitstellung eines Bauteils, das eine Vorder- und eine Rückseite aufweist, wobei auf der Vorderseite und/oder der Rückseite eine Außenschicht aus einem transparenten, elektrisch leitfähigen Oxid (TCO) oder einem selbstpassivierenden Metall oder Halbleiter vorliegt,
• – Aufbringen einer strukturierten, elektrisch leitfähigen Keimschicht auf definierten Bereichen der Außenschicht, wobei das Aufbringen der Keimschicht nicht galvanisch erfolgt,
• – galvanische Abscheidung zumindest eines Metalls auf der Keimschicht.

The object is achieved by a method for producing one or more electrical contacts on a component, comprising the following steps:

• Provision of a component which has a front and a rear side, wherein an outer layer of a transparent, electrically conductive oxide (TCO) or a self-passivating metal or semiconductor is present on the front side and / or the rear side,
• Applying a structured, electrically conductive seed layer on defined regions of the outer layer, wherein the application of the seed layer is not galvanic,
• - Electrodeposition of at least one metal on the seed layer.

As will be described in more detail below, the method according to the invention uses a component with a specific outer layer (TCO layer or layer of self-passivating metal or semiconductor), on which a galvanic deposition of conventional metals such. Copper is not possible or at least strongly inhibited. If, however, a structured seed layer having good electrical conductivity is applied to the outer layer via a non-galvanic deposition (eg via a printing process), then this structured seed layer (but not the still exposed outer layer) can be galvanically coated very well and also the electrical contact resistance between the TCO layer or the layer of self-passivating metal or semiconductor and the seed layer applied thereon is still sufficiently low in order to effectively dissipate current from the component (eg a solar cell) via the electrodeposited metal layer.

Coatings made of a self-passivating metal or semiconductor form a thin oxide film at their surface even at room temperature. Due to the presence of this oxide film, the electrodeposition of a metal on the self-passivating metal or semiconductor is not possible or at least inhibited. Also on transparent, conductive oxides (TCOs) such as e.g. Indium tin oxide (ITO) can be the electrodeposition of common metals such as copper inhibited, especially at low applied voltage.

Coatings of TCOs or self-passivating metals or semiconductors thus represent surfaces on which a galvanic metal deposition may be inhibited. However, it has been found that these surfaces, which are to be galvanically coated, certainly have a relatively low electrical contact resistance to electrically conductive layers applied to them, which in turn can be readily electroplated. In the context of the present invention, this is used to selectively electroplate surfaces by applying to the poorly electroplated surface of a self-passivating metal or semiconductor or a TCO locally in defined areas (for example by a printing process) a surface to be coated well , This acts as a seed or seed layer for the subsequent galvanization step. A mask for the application of the structured, electrically conductive seed layer is not required. Also, their application can be carried out at relatively low temperatures, so that the thermal stress of the component (for example, an amorphous silicon layer in a silicon heterocell or the carrier material of a printed circuit board) is minimized.

In the subsequent electroplating step, the metal deposition takes place exclusively or at least predominantly on the structured seed layer. It is not necessary to apply a mask on the self-passivating metal or semiconductor or the TCO, since there is no galvanic deposition on these materials or at least inhibited. Thus, after the electroplating step, a structure, eg in the form of one or more strip conductors, is obtained, which enables effective electrical contacting of the electrical component or the formation of an effective circuit structure of a printed circuit board.

The electrical contacts are in the form of one or more tracks, for example. The electrical contacts serve, for example, to dissipate current from the component or to tap voltage from the component or to establish an electrical connection between electrical components that are present on the component.

As already explained above, the method according to the invention initially comprises the provision of a component which has a front and a rear side, wherein on the front and / or the back side an outer layer of a transparent, electrically conductive oxide (TCO) or a self-passivating metal or Semiconductor is present.

The device is, for example, an electrical device (e.g., an opto-electronic device or a semiconductor device) or a precursor thereof.

The component to which the electrical contacts are to be attached may also be the precursor of a printed circuit board. The precursor of the printed circuit board preferably contains a plastic (in particular an electrically non-conductive plastic), which may optionally be reinforced by fibers, and on this plastic is then preferably the outer layer of the transparent, electrically conductive oxide (TCO) or the self-passivating metal or semiconductors. The precursor of the printed circuit board may for example be a flexible film or alternatively a rigid plate.

A preferred electrical device is, for example, a solar cell, a diode (e.g., a light emitting diode), or a display, in particular a flat panel display, e.g. a liquid crystal screen "LCD".

In the case of a solar cell, the front side is the illuminated, i. the radiation source facing side of the component. With the method according to the invention, the electrical contacts can be applied, for example, on the front side or on the rear side (for example in the case of an exclusively back-contacted solar cell) or else on both sides of the component.

The electrical device to which the electrical contact is applied need not yet be in its final form, but usually already contains those components that are essential to its function (such as the realization of the photovoltaic effect). Alternatively, the component on which the electrical contact is applied can be a precursor of an electrical component and the other components that are required for the realization of its function are added only after the application of the electrical contact.

In the context of the present invention, a solar cell is understood to be a semiconductor component which exhibits a photovoltaic effect when exposed to radiation energy, generally sunlight.

Preferably, the solar cell is a silicon solar cell.

In a preferred embodiment, the component is a heterojunction solar cell, in particular a silicon heterojunction solar cell (SHJ solar cell) or a precursor thereof.

The solar cell can also be a solar cell contacted exclusively via its rear side. In these solar cells, the electrical contacts are present, for example, in the form of an interdigital structure.

The method according to the invention is of particular interest for crystalline silicon solar cell types which have a conductive layer on at least one of the two surfaces of a crystalline silicon substrate, which serves as the base material of the solar cell, whose conductivity must be further improved by metallically applied conductor tracks. These include, for example, solar cell types which have on at least one side of the crystalline silicon acting as the base material an optically transparent, electrically conductive coating which suppresses the recombination of electron-hole pairs on the correspondingly coated surface of the crystalline silicon wafer.

These include in particular silicon heterojunction solar cells (SHJ), in which the passivating layers consist of amorphous silicon. Alternatively, the surface can also consist of a through-tunable (and thus also perpendicular to the layer conductive) silicon dioxide layer, on which subsequently a conductive Polysilicon layer, a silicon carbide layer or a conductive metal oxide such as molybdenum oxide, tungsten oxide, nickel oxide or titanium oxide is applied. Since the conductivity of all these views parallel to the surface is very low, preferably a highly conductive TCO layer (eg an ITO layer) is preferably applied to the recombination-suppressing layer system. However, since even when a TCO layer is applied, the conductivity parallel to the surface is too low to be able to dissipate the current efficiently, metallic conductor tracks must additionally be applied to the surface.

For solar cells as a component, in particular for the above solar cell types such. a SHJ solar cell, the inventive method is ideal because it does not require a high-temperature step for sintering the deposited metal layers and can be dispensed with organic masks. SHJ solar cells are commercially available or can be prepared by methods known to those skilled in the art.

As mentioned above, certain electrical components such as SHJ solar cells, light-emitting diodes or LCDs (liquid crystal displays) often contain one or more layers of a transparent, electrically conductive oxide (TCO) as an electrode. In these cases, the TCO layer is therefore already an integral part of the electrical component. The substance class of TCOs and the use of TCO layers for semiconductor devices are known in the art, see for example Clark I. Bright, Chapter 7 ("Review of Transparent Conductive Oxides (TCO)") in 50 Years of Vacuum Coating Technology and the Growth of the Society of Vacuum Coaters, eds .: Donald M. Mattox and Vivienne Harwood Mattox, Society of Vacuum Coaters, 2007 (ISBN 978-1-878068-27-9) and A. Stadler, Materials, 2012, 5, pp. 661-683 , Frequently, the TCO layer already exists in these electrical components as the outermost layer ("outer layer") of the component. In these cases, it is possible in the context of the method according to the invention to apply the electrically conductive seed layer (eg in the form of one or more strip conductors) directly on this TCO outer layer of the electrical component.

Exemplary TCOs for the TCO outer layer are indium tin oxide ("ITO"), aluminum-doped zinc oxide (AZO), fluorine-doped tin oxide ("FTO"), boron-doped zinc oxide or hydrogen-doped indium oxide , TCO coatings can be obtained, for example, by physical or chemical vapor deposition.

The TCO layer at 25 ° C usually has a sheet resistance determined by the four-point method in the range of 10 Ω to 1000 Ω, more preferably 50 Ω to 300 Ω. The TCO layer preferably has this sheet resistance over its entire area. Although TCO layers have a relatively low sheet resistance, the electrodeposition of common metals such as copper on such TCO layers as e.g. an ITO layer compared to the deposition inhibited on nobler metal surfaces, especially at low applied voltage.

As an alternative to an outer layer of a transparent, electrically conductive oxide (i.e., a TCO layer), the device may comprise an outer layer of a self-passivating metal or semiconductor.

As is known to the person skilled in the art, self-passivating metals or semiconductors are metals or semiconductors which can spontaneously form a passivating, very thin oxide layer in air at room temperature (25 ° C.). Suitable self-passivating metals are in particular aluminum, titanium, nickel, chromium or zinc or an alloy of one of these metals. A preferred self-passivating semiconductor is silicon.

The application of a coating of a self-passivating metal or semiconductor on the component can be carried out by known methods. The outer layer of the self-passivating metal or semiconductor may be obtained, for example, by physical vapor deposition (e.g., sputtering, also referred to as sputtering), chemical vapor deposition (e.g., plasma assisted vapor deposition PECVD), or by attaching a film of the self-passivating metal or semiconductor. These coating methods only lead to a low thermal load of the component.

If the component is the precursor of a printed circuit board, for example, a prepreg may be provided on which a film of the self-passivating metal, preferably an aluminum foil, is applied (e.g., glued).

The front side and / or rear side of the component is preferably coated with at least 50% of its area, more preferably at least 80% of its area, or even over its entire area with the outer layer formed from the TCO or the self-passivating metal or semiconductor.

The outer layer of the component preferably has a thickness of ≦ 25 μm, more preferably ≦ 15 μm, even more preferably ≦ 1.0 μm or even less than 500 nm. If the component is an electrical It may even be preferred that the thickness of the outer layer is not more than 200 nm, more preferably not more than 100 nm, for example 5-100 nm or 5-50 nm, as a component, in particular a semiconductor component such as a solar cell or a diode , Preferably, the outer layer has over at least 90% of its area, more preferably over 95% of its area, the above-indicated layer thickness. The layer thickness can be determined by conventional methods, for example by microscopic measurement in cross section or cross section.

A layer of self-passivating metal or semiconductor automatically forms a thin layer of oxide on its surface in air. This passivating oxide layer prevents or at least inhibits galvanic metal deposition. Optionally, this spontaneous oxide formation may still be assisted by appropriate means (e.g., contacting an oxidizing medium such as ozone) to effect a more uniform formation of the thin oxide layer. It is also possible to chemically modify the passivating surface layer by suitable treatment (for example, formation of a passivating nitride or oxynitride surface layer). However, in view of a simple and efficient process design, it is preferred that the layer of self-passivating metal or semiconductor, apart from the oxide formation in air due to the self-passivation, optionally supported by treatment with ozone or UV illumination at temperatures below 200 ° C, is not subjected to any other chemical modification prior to application of the seed layer.

Preferably, the contact resistance (at 25 ° C) between the TCO layer or the layer of self-passivating metal or semiconductor and the seed layer applied thereon should be less than 50 mΩcm ² , more preferably less than 10 mΩcm ² , even more preferably less than 5 mΩcm ² or less than 1 mΩcm ² be. The contact resistance can be determined via the transfer line method (also referred to as transfer length method or transfer length measurement). In this method, the measurement of contact resistance is performed using a suitable test pattern.

As already explained above, in a further step of the method according to the invention, the application of a structured, electrically conductive seed layer takes place on defined regions of the outer layer, wherein the application of the seed layer is not galvanic.

This electrically conductive seed layer is applied via a non-galvanic process, but then serves as a substrate for a metal coating in a subsequent electrodeposition step. As is known to those skilled in the art, the term seed layer (alternatively seed layer) in electroplating refers to a thin layer which acts as a crystallization seed and adhesion basis for the electrodeposition of a metal.

Preferably, the application of the structured, electrically conductive seed layer takes place in the form of one or more tracks, i. the electrically conductive seed layer is already structured in its arrangement on the outer layer so that it corresponds to the arrangement of the electrical contacts to be formed.

As is well known to those skilled in the art, electrodeposition is a process in which the substrate to be coated is contacted with a plating bath, usually containing a salt of the metal to be deposited, and the metal on the substrate by application of an external power source is deposited. Since the electrodeposition is at least inhibited on a TCO layer or a layer of self-passivating metal or semiconductor, the application of the seed layer takes place via a non-galvanic deposition.

An application of the seed layer on defined regions of the outer layer takes place, for example, via a printing process, in particular screen printing, inkjet printing, flexographic printing or aerosol printing, a laser transfer process (also referred to as "laser induced forward transfer" (LIFT)) or electroless electrochemical deposition (eg zinc deposition by zincate method and / or deposition of chemical nickel). These coating methods are known to the person skilled in the art.

Components for a seed layer, which have a sufficiently high electrical conductivity and allow a galvanic metal deposition on the seed layer, are known in the art. As an electrically conductive component, the seed layer contains, for example, one or more metals (eg copper or a copper alloy, nickel or a nickel alloy, indium or an indium alloy, tin or a tin alloy or a noble metal such as silver or a silver alloy), one or more electrically conductive polymers ( for example, poly-3,4-ethylenedioxythiophene (PEDOT) or a mixture of PEDOT and polystyrene sulfonate (PEDOT: PSS)), one or more electrically conductive carbon materials (eg graphene, graphene oxide, carbon nanotubes, graphite, carbon black), or a mixture of at least two of these components.

The electrically conductive component of the seed layer may be in the form of particles (eg metal particles or carbon particles), for example. available. These electrically conductive particles may be embedded in an organic or inorganic carrier material, for example an organic polymer. The organic polymer may be a thermoplastic or, alternatively, a crosslinkable or, after curing, a crosslinked polymer. For example, the electrically conductive particles of the seed layer are present in a synthetic resin which hardens after the application of the seed layer via the printing process (for example by thermal treatment and / or UV treatment). Suitable organic or inorganic support materials for electrically conductive particles which can be used in a printing process are known to the person skilled in the art.

The seed layer can also be applied by a laser-transferred method ("LIFT"). The LIFT method is known in principle to the person skilled in the art. Here, the seed layer, preferably made of nickel, silver or copper (particularly preferably nickel), first applied to a flat transparent substrate, for example by means of physical vapor deposition PVD. The substrate is now brought into contact with the outer layer with the seed layer facing the outer layer of the component, or at least positioned at a distance of less than 1 mm from the outer layer of the component. Now, the seed layer is detached from the substrate by means of laser irradiation and transferred to the outer layer of the component workpiece.

The seed layer can also be applied by an electroless redox reaction or electroless electrochemical deposition. As is known to those skilled in the art, electroless plating is understood to be a plating process in which the reduction of the metal to be deposited (as opposed to a plating) occurs without the use of an external power source. Preferably, electroless plating deposits nickel (also referred to as "chemical nickel") and / or zinc (e.g., via the zincate process). In a preferred embodiment, the outer layer (preferably a self-passivating aluminum layer) is first treated in defined areas with a zincate solution to form a zinc layer, and then electroless deposition of the chemical nickel layer takes place on these areas provided with a zinc layer. Suitable electrolytic solutions for the electroless deposition of chemical nickel are known in the art. The electrons required to reduce the nickel ions can be generated directly in the electrolyte solution by a chemical reaction, for example by the reducing agent sodium hypophosphite. The electrolyte solution also contains a nickel salt, e.g. Nickel sulfate. The nickel deposition is autocatalytic. Since phosphorus also stores, you get a nickel-phosphorus alloy. The galvanizing of defined regions of the aluminum layer can be effected, for example, by applying the zincate solution with a stamp of defined geometry.

In the areas in which the seed layer is applied to the outer layer, it may be that as a result of this application (eg by a LIFT process or by electroless zinc and / or chemical nickel), the resulting from the self-passivation thin oxide layer was removed.

The structured seed layer is preferably produced without using a mask.

The seed layer preferably has a thickness of ≦ 20 μm, more preferably ≦ 8 μm, even more preferably ≦ 2 μm. The seed layer preferably has at least 80% of its area, more preferably over its entire area, the above-stated layer thickness. The layer thickness can be determined by common methods, e.g. by microscopic measurement in cross section or cross section.

As stated above, the electrodeposition of at least one metal on the seed layer takes place in a further step of the method according to the invention.

The electrodeposited metal is preferably copper or a copper alloy, nickel or a nickel alloy, or a noble metal such as silver or a silver alloy. The electrodeposited layers preferably have a layer thickness of 1-100 μm, preferably 1-20 μm, particularly preferably 2-15 μm. The layer thickness can be determined by common methods, e.g. by microscopic measurement in cross section or cross section.

For the electrodeposition, the seed layer is brought into contact with a galvanic bath containing a salt of the metal to be deposited. An auxiliary electrode is usually immersed in the electroplating bath, e.g. a copper anode ("sacrificial anode") or a titanium electrode. The counterelectrode is the electrically conductive seed layer. When a suitable negative (i.e., cathodic) electrical potential is applied to the seed layer, the metal ions are reduced and the metal deposits on the seed layer.

The galvanic deposition can be done by means of direct current or by means of pulse current. As will be described in more detail below, the selective deposition can be achieved by using a pulse current that changes sign of the metal on the seed layer can be further improved. A pulse current that changes sign has alternating negative (cathodic) and positive (anodic) current pulses.

As explained above, the electrodeposition of the metal on the TCO layer or the layer of the self-passivating metal or semiconductor is at least strongly inhibited. For the electrodeposition step, therefore, it is not necessary to protect those regions of the outer layer that are not covered by the structured seed layer by a mask. The areas of the TCO layer or the layer of the self-passivating metal or semiconductor which are still exposed after the application of the seed layer therefore remain unmasked even during the electrodeposition and can come into contact with the electroplating bath.

Although the galvanic deposition on the outer layer of the component is at least inhibited, it has been found in the present invention that when a negative electrical potential is applied, the current density at the surface of this outer layer can still be sufficiently high for the deposition of smaller metal crystallites (eg due to a very high degree of conductivity) small thickness of the passivating oxide layer or due to structural defects of this passivating oxide layer).

In a preferred embodiment, the electrodeposition of the metal takes place by means of pulse current. The pulse current method uses a time varying current, i. the seed layer is subjected to a time-varying potential.

In a particularly preferred embodiment, a pulse current is used which changes sign, i. which has alternating negative (cathodic) and positive (anodic) current pulses. As long as the seed layer is exposed to a negative potential (i.e., exposed to a cathodic current pulse), the metal is electrodeposited on this seed layer. To a lesser extent, metal deposition on the exposed (and therefore in contact with the galvanic electrolyte) regions of the TCO layer or the layer of self-passivating metal or semiconductor can also occur in this time interval. If the electrical potential changes its sign, so that the seed layer is now subjected to a positive potential, a dissolution of already deposited metal occurs. However, this dissolution is primarily at the expense of the small amount of metal deposited on the exposed outer layer of the device, while the dissolution of the metal deposited on the seed layer is not significantly significant.

1 shows in a microscope image in plan view of the surface of an outer layer of a self-passivating metal on which a strip-like seed layer and on this seed layer an electrodeposited metal coating are present, with no pulse current was used for the electrodeposition. Although the metal plating on the surface of the self-passivating metal is inhibited, but due to the small thickness or due to defects in the thin oxide film, there is still some degree of electrodeposition of metal crystallites on the outer layer. 2 shows in a microscope image in plan view of the surface of an outer layer of a self-passivating metal on which a strip-like seed layer and on this seed layer is a galvanically deposited metal coating. The galvanic deposition was carried out using pulse current with alternating cathodic and anodic current pulses. As 2 shows, the metal deposition takes place almost exclusively on the strip-like seed layer. Virtually no metal deposits are visible on the exposed outer layer.

With a suitable choice of the time intervals and the positive and negative voltages or currents, the seeds completely dissolve again in areas without seed layer, while in the areas with seed layer electrodeposited metal remains, which from a interval with negative voltage on the workpiece to the next steadily increases. Surprisingly, the parameter space suitable for this purpose is very large. The intervals in which the seed layer is subjected to a negative potential (ie the cathodic current pulses) can last up to 10 s, but preferably their duration is less than 500 ms, more preferably less than 100 ms, particularly preferably less than 10 ms , The intervals of positive potential at the seed layer opposite the electroplating bath (ie the anodic current pulses) are preferably shorter than the intervals of negative potential, more preferably less than half as long, most preferably less than a quarter as long. Preferably, a maximum current density amplitude of 1-60 A / cm ² , based on the surface of the seed layer, is given during the intervals in which the seed layer is subjected to a negative potential. In the case of a negative potential of the seed layer, the maximum current amplitude with respect to the electroplating bath is preferably to be selected to be at most as high as at a positive potential. Particularly preferably, the current amplitude is selected at half the negative potential of the seed layer as high as at the positive potential. Further preferred is the Current amplitude at positive potential selected so high that the maximum voltage amplitude limits the current.

For the maximum voltage amplitudes, the following is preferred: Anodic voltage amplitude (preferably> 2V, more preferably> 5V, particularly preferably> 9V) at the seed layer opposite the electroplating bath is preferably higher than the cathodic voltage amplitude (preferably <3V, more preferably <2V, even more preferably <1, 7V).

If the galvanic deposition of the metal is carried out by means of pulse current with alternating sign, it can come in the time interval in which the seed layer is subjected to a positive potential, not only to a resolution of metal already deposited, but also to an oxidation of the material of the outer layer in particular when the outer layer is a layer of a self-passivating metal or semiconductor such as aluminum or silicon. In areas where the exposed outer layer contacts the electroplating bath, the self-passivation outer layer can be increasingly oxidized. The oxidation progresses inwardly in the self-passivation layer from the surface, and finally, in this layer oxide areas can be obtained which extend over the entire thickness or height of the outer layer. If the outer layer is chosen to be thin enough, for example 5-100 nm or 5-50 nm, optically transparent oxide regions are formed. The optical transparency is particularly advantageous for solar cells, e.g. SHJ solar cells.

In a preferred embodiment, therefore, the component is a solar cell (in particular a SHJ solar cell), on the front and / or back of an outer layer of a self-passivating metal or semiconductor, preferably aluminum, titanium, nickel, chromium, zinc or silicon, is present Thickness 5-100 nm, more preferably 5-50 nm, and the electrodeposition by means of pulse current with alternating sign (ie with alternating cathodic and anodic current pulses). Preferably, the duration and amplitude of the cathodic and anodic current pulses are selected such that the self-passivating outer layer forms oxide regions which extend over the entire thickness or height of the outer layer. The layer of self-passivating metal or semiconductor is deposited, for example, by chemical or physical vapor deposition (e.g., CVD such as PECVD or sputtering). If the solar cell is an SHJ solar cell, the outer layer of self-passivating metal or semiconductor is present on the TCO layer on at least one of the two sides of the SHJ solar cell.

• – in der ersten Phase die aufsummierte Ladung, welche während der anodischen Pulse fließt, kleiner ist als die aufsummierte Ladung, welche während der kathodischen Pulse fließt, und
• – in der anschließenden zweiten Phase die aufsummierte Ladung, welche während der anodischen Pulse fließt, größer ist als die aufsummierte Ladung, welche während der kathodischen Pulse fließt, wobei zumindest die erste Phase dieser Pulsstrom-Behandlung während der galvanischen Abscheidung des Metalls stattfindet.

In a preferred embodiment, the seed layer and the exposed, not covered by the seed layer areas of the outer layer of an at least two-phase treatment with a pulse current subjected

• In the first phase, the accumulated charge which flows during the anodic pulses is smaller than the accumulated charge which flows during the cathodic pulses, and
• In the subsequent second phase, the summed charge which flows during the anodic pulses is greater than the summed charge which flows during the cathodic pulses, at least the first phase of this pulse current treatment taking place during the electrodeposition of the metal.

By using a pulse current treatment having two distinct sections (i.e., a first and second phase satisfying the above conditions), the selective deposition of the metal on the seed layer and the oxidation of the exposed areas of the outer layer can be further enhanced.

Optionally, both phases of this pulse current treatment can take place during the electrodeposition of the metal in the electroplating bath. Alternatively, it is also possible that the first phase of the pulse current treatment takes place during the electrodeposition of the metal in the electroplating bath, then the seed layer and the exposed areas of the outer layer are transferred from the electroplating bath into an anodizing bath and the second phase of the pulsed current treatment is carried out in the anodizing bath.

In order to further optimize the as complete as possible oxidation of the self-passivating metal or semiconductor in the exposed (ie not covered by the seed layer) regions of the outer layer, it may be preferable, after the electrodeposition of the metal (preferably using a pulse current with cathodic and Anodic pulses was carried out) or anodization of the self-passivating metal (eg aluminum) or semiconductor to perform in an anodizing. As is known to those skilled in the art, the anodization is an electrolytic process for producing or reinforcing oxide layers on metals or semiconductors. Suitable anodizing baths are known to those skilled in the art and include e.g. Sulfuric acid, oxalic acid, citric acid or chromic acid.

Preferably, the anodization is carried out using a pulse current with alternating cathodic and anodic pulses. There During the anodization in the anodic voltage application, a certain dissolution of the already electrodeposited metal takes place, the anodizing inevitably also contains metal ions, preferably the bath additional metal ions by adding a corresponding metal salt and / or using a counter electrode of the corresponding metal in the bath added. When the anodization is pulsed, the cathodic pulses can thus be used for the deposition of the metal. Preferably, in the anodization in the anodization bath, the accumulated charge that flows during the anodic pulses is greater than the accumulated charge that flows during the cathodic pulses.

In the electroplating bath, the galvanic metal layer grows on the seed layer and the anodic pulses prevent the parasitic deposition on the remaining outer layer in this phase. In the anodization bath, in the regions in which the outer layer does not have a seed layer with a galvanic layer deposited thereon, there is an increased conversion of the outer layer into a corresponding oxide layer. The charge flowing during the anodic pulses may be calculated from the integral of the current over time during which the device is subjected to anodic potential. Accordingly, the charge flowing during the cathodic pulses can be calculated from the integral of the current over the time the cathodic potential is applied to the device. With regard to the alternating sign of the discharged charge from the andodic to the cathodic current direction, the absolute value of the charge must be used in each case when comparing the discharged charges.

A preferred embodiment using the SHJ solar cell will be described with reference to FIGS 3a and 3b explained in more detail.

3a shows schematically in cross section a SHJ solar cell 1 , a thin outer layer 2 a self-passivating metal or semiconductor (eg Al, Ti or Si) and a structured seed layer 3 on defined areas of the self-passivation outer layer 2 is present. The outer layer 2 For example, it can be applied by PECVD and preferably has a thickness in the range of 5-100 nm, more preferably 5-50 nm. The self-passivating outer layer 1 lies on the TCO layer (not shown in FIG 1a ) of the SHJ solar cell. The construction of a SHJ solar cell 1 has already been described in more detail above and is therefore described in 3a not shown in detail. On the surface of the self-passivating outer layer 2 inevitably forms a very thin passivating oxide film (not shown). A suitable process (eg a printing process such as screen printing, inkjet printing or aerosol printing, a laser transfer process or an electroless electrochemical deposition) is applied to defined regions of the self-passivating outer layer 2 applied an electrically conductive seed layer 3 , As the electrically conductive component contains the seed layer 3 for example, one or more metals (eg, copper or a copper alloy, nickel or a nickel alloy, zinc or a zinc alloy, indium or an indium alloy, tin or a tin alloy, a noble metal such as silver or a silver alloy), one or more electrically conductive polymers (eg, poly -3,4-ethylenedioxythiophene (PEDOT) or a mixture of PEDOT and polystyrenesulfonate (PEDOT: PSS)), one or more electrically conductive carbon materials (eg graphene, graphene oxide, carbon nanotubes, graphite, carbon black) or a mixture of at least two of these components.

On the germ layer 3 then takes place the galvanic deposition of a metal 4 using a pulse current with cathodic (negative) and anodic (positive) current pulses. The structure thus obtained is described in 3b shown schematically. For the electrodeposition, the seed layer became 3 as well as the exposed areas of the outer layer 2 brought into contact with a galvanic bath. Due to the presence of the outer layer 2 The sensitive TCO layer of the SHJ solar cell is protected from the chemically aggressive electroplating bath. The germ layer 3 was subjected to an electric potential, which periodically changes its sign. The deposition of the metal 4 predominantly takes place only on the germ layer 3 because the galvanic metal deposition on the passivated surface of the outer layer 2 is inhibited. In the context of the present invention, however, it has been recognized that a small amount of metal deposition also occurs on the passivated surface of the outer layer 2 he follows. By using a pulse current of alternating sign, these parasitic metal deposits can be deposited on the exposed areas of the outer layer 2 mostly be dissolved again. In addition, it comes in the exposed and therefore in contact with the electroplating areas of the outer layer 2 to oxidation of the metal or semiconductor proceeding from outside to inside. Finally, oxide layers are formed in the outer layer 5 extending over the entire thickness of the outer layer 2 extend. The areas of the outer layer 2 that are below the germ layer 3 lie, remain metallic or semiconducting. As a result, a coating is obtained 7 which has a lateral structuring, in which oxidized areas 5 and metallic or semiconducting areas 6 alternate. The germ layer 3 lies on the metallic or semiconducting areas 6 the laterally structured coating 7 before and is from the electrodeposited metal layer 4 completely covered. Due to the small thickness, the oxide areas 5 transparent. Unnecessary shading effects that could reduce the efficiency of the solar cell are thereby avoided. Due to the self-passivation can be between the metallic or semiconducting areas 6 and the structured seed layer present thereon 3 a thin oxide layer is present, unless it has been removed process-related during the application of the seed layer in these areas. As mentioned above, the contact resistance is between the metallic or semiconductive region 6 and the seed layer applied thereto is relatively low, so that the current generated in the solar cell via the photovoltaic effect effectively across the metallic or semiconductive regions 6 , The seed layer and the electrodeposited metal layer can be dissipated. The method can be performed without using a mask. A significant thermal load of the component is avoided.

As an alternative to as complete as possible anodization of the exposed areas of the outer layer during and / or after the electrodeposition, it is also possible in the context of the present invention to remove these exposed areas of the outer layer after the electrodeposition of the metal by an etching treatment. In this case, recesses (i.e., solid-free regions) are created between the metallic or semiconductive regions covered by the seed layer. For example, it can be used to produce electrical contacts with an interdigital structure, as required for the back-side contact of solar cells.

Even with an etching treatment of the exposed regions of the outer layer to remove the self-passivating metal or semiconductor, it may be preferable to carry out the previously occurring electrodeposition using pulsed current with alternating sign in order to minimize parasitic metal deposits in the exposed regions of the outer layer. However, the duration and amplitude of the anodic and cathodic current pulses are preferably chosen such that oxidation of the outer layer is kept as low as possible (for example, only on the surface of the outer layer, but not deeper oxidation). As a result, the individual tracks remain electrically connected. This is advantageous because all the tracks in the electroplating process grow evenly without having to provide each individual track with an external contact.

In the etching treatment, after the electrodeposition of the metal on the seed layer, the exposed areas of the outer layer are treated with an etching bath. The outer layer is thereby removed in these areas. After the etching step remain on the component (eg the solar cell or the precursor of the circuit board) areas of self-passivating metal or semiconductor, on which a seed layer with electrodeposited metal coating are present and between these areas of self-passivating metal or semiconductor recesses (ie solid-free areas) available. Also in this case, a lateral structuring is produced in the outer layer.

The application of a workpiece to be galvanically coated in the galvanic bath with a potential with a periodically changing sign can be realized by measures which are known to the person skilled in the art. For example, this is indicated by the in 4 realized circuit: The operational amplifier OP1 controls with its output the push-pull stage, consisting of the npn (Darlington) transistor T1 and the pnp (Darlington) transistor T2 on. The differential amplifier OP2, which measures the voltage drop across the shunt resistor Rsh, is attenuated via an RC element (C1, R1, R2) fed back to the inverting output of OP1. If the selected amplitudes of the positive potential, predetermined by V +, and those of the negative potential, given by V-, are sufficiently large, the current is given by the voltage signal at the non-inverting input of OP1, since OP1 this signal with the voltage drop at Shunt resistor Rsh compares and drives the push-pull stage so that the voltage drop in Rsh caused by the current is equal to the signal voltage. The amplitudes of the signal voltage divided by the shunt resistor thus give the amplitudes of the current through the workpiece, unless the voltages V + and V- are limiting. Preferably, during the application of the workpiece with a negative potential, the voltage V + is chosen so high that the predetermined current is reached.

The present invention also relates to an apparatus obtainable by the method described above.

• – ein Bauteil mit einer Vorder- und einer Rückseite, wobei auf der Vorderseite und/oder der Rückseite des Bauteils eine lateral strukturierte Beschichtung vorliegt, die in definierten Abständen metallische oder halbleitende Bereiche aus einem selbstpassivierenden Metall oder Halbleiter aufweist,
• – eine elektrisch leitfähige Keimschicht, die auf den metallischen oder halbleitenden Bereichen der lateral strukturierten Beschichtung vorliegt,
• – eine galvanisch abgeschiedene Metallschicht, die die Keimschicht bedeckt, bevorzugt vollständig bedeckt.

The present invention also relates to a device containing

• A component having a front side and a rear side, wherein a laterally structured coating is present on the front side and / or the rear side of the component, which has metal or semiconductive regions of a self-passivating metal or semiconductor at defined intervals,
• An electrically conductive seed layer present on the metallic or semiconductive regions of the laterally structured coating,
• - A galvanically deposited metal layer that covers the seed layer, preferably completely covered.

The lateral structuring of the coating of the component results from the fact that the areas of self-passivating metal or semiconductor in the lateral direction, i. parallel to the surface of the front or back at defined intervals.

With regard to preferred components, reference may be made to the above statements. Thus, the device is, for example, an electrical device (e.g., an opto-electronic device or a semiconductor device, particularly a solar cell) or a precursor of a circuit board. A preferred electrical device is, for example, a solar cell, a diode (e.g., a light emitting diode), or a display, in particular a flat panel display, e.g. a liquid crystal screen "LCD". In the case of a solar cell, the front side is the illuminated, i. the radiation source facing side of the component. A particularly preferred solar cell is an SHJ solar cell.

In the laterally structured coating, oxidic regions may be present between the metallic or semiconducting regions. The oxidic regions preferably extend over the entire thickness or height of the laterally structured coating. The oxide region is formed by an oxide of the self-passivating metal or semiconductor (e.g., an alumina or a silica). In this case, metallic or semiconductive regions and oxide regions alternate in the lateral direction. As described above, the oxide regions may be generated during metal electrodeposition using a pulse current of alternating sign. In the areas of the outer layer on which the structured seed layer has been applied and which therefore do not come into contact with the electroplating bath, substantially no oxidation occurs and the metallic or semiconductive structure is retained in these areas.

As an alternative to the oxide regions, a recess (i.e., a solid-free region) may be present in the laterally structured coating between adjacent metallic or semiconducting regions. As already described above, these recesses result from an etching step, which is carried out after the electrodeposition of metal. Preferably, the recess extends over the entire thickness or height of the laterally structured coating. The recess thus has a depth which corresponds to the thickness of the coating.

If the component is an electrical component, such as an electronic component. a solar cell (preferably a SHJ solar cell), a diode (e.g., LED) or a screen (e.g., LCD), the laterally structured coating preferably has a thickness of not more than 200 nm, more preferably not more than 100 nm, e.g. 5-100 nm or 5-50 nm, on. The laterally structured coating preferably has the abovementioned layer thickness over at least 90% of its area, more preferably over 95% of its total area. The layer thickness can be determined by common methods, e.g. by microscopic measurement in cross section or cross section.

In the case of a solar cell, the metallic or semiconducting regions of the laterally structured coating may, for example, have a width in the range of 10 μm to 50 μm and may be present, for example, at intervals of 0.5 mm to 2.5 mm.

As already explained above, self-passivating metals or semiconductors are metals or semiconductors which spontaneously form a passivating, very thin oxide layer in air at room temperature (25 ° C.). Suitable self-passivating metals are in particular aluminum, titanium, nickel, chromium or zinc or an alloy of one of these metals. The self-passivating metal may be in elemental form or in the form of an alloy. A preferred self-passivating semiconductor is silicon. In the oxide regions there is an oxide of the self-passivating metal or semiconductor.

Preferably, the seed layer is present essentially only on the metallic or semiconducting regions, but not on the oxide regions. The surface of the oxidic regions is preferably substantially neither covered with the electrically conductive seed layer nor with the electrodeposited metal layer.

If the component is the precursor of a printed circuit board, the laterally structured coating preferably has a thickness of ≦ 25 μm, more preferably ≦ 10 μm, even more preferably ≦ 1.0 μm. The layer thickness can be determined by common methods, e.g. by microscopic measurement in cross section or cross section.

As stated above, the device contains an electrically conductive seed layer which is present on the metallic or semiconducting regions of the laterally structured coating.

With regard to suitable materials for the electrically conductive seed layer, reference may be made to the above statements. As an electrically conductive component, the seed layer contains, for example, one or more metals (eg copper or a copper alloy, nickel or a nickel alloy, indium or an indium alloy, tin or a tin alloy, a noble metal such as silver or a silver alloy), one or more electrically conductive polymers ( for example, poly-3,4-ethylenedioxythiophene (PEDOT) or a mixture of PEDOT and polystyrene sulfonate (PEDOT: PSS)), one or more electrically conductive carbon materials (eg graphene, graphene oxide, carbon nanotubes, graphite, carbon black) or a mixture of at least two of these components.

The electrically conductive component of the seed layer may be in the form of, for example, particles (e.g., metal particles or carbon particles). These electrically conductive particles may be embedded in an organic or inorganic carrier material, for example an organic polymer. The organic polymer may be a thermoplastic or, alternatively, a crosslinkable or, after curing, a crosslinked polymer. For example, the electroconductive particles of the seed layer are in a synthetic resin which cures after application of the seed layer via the printing process (e.g., by thermal treatment and / or UV treatment). Suitable organic or inorganic carrier materials which can be used in a printing process are known to the person skilled in the art. A seed layer of electrically conductive particles which are embedded in an organic or inorganic carrier material can be applied particularly advantageously via a printing process.

Alternatively, in a preferred embodiment it is also possible for the seed layer to be formed by a zinc layer (for example via a zincat treatment carried out locally) and a layer of chemical nickel applied to this zinc layer.

As a result of the self-passivation, a thin oxide layer can be present between the metallic or semiconductive regions of the laterally structured coating and the seed layer applied thereon. However, since this thin oxide layer may have been removed from the process during application of the seed layer (for example by a LIFT process) in these areas, it is also possible for the metallic or semiconducting areas and the seed layer applied thereto to directly adjoin one another.

The electrically conductive seed layer is preferably in the form of one or more tracks.

The seed layer preferably has a thickness of ≦ 20 μm, more preferably ≦ 8 μm, even more preferably ≦ 2 μm. The seed layer preferably has at least 80% of its area, more preferably over its entire area, the above-stated layer thickness. The layer thickness can be determined by common methods, e.g. by microscopic measurement in cross section or cross section.

As noted above, the device also includes a metal electrodeposited layer that covers the seed layer. Preferably, the seed layer is completely covered by the electrodeposited metal layer, thus also the flanks, which laterally delimit the seed layer. The complete covering of the seed layer with the electrodeposited metal is advantageous, since thereby the seed layer in the finished product from oxidation, moisture or other chemical Attack is effectively protected by the galvanic layer.

The electrodeposited metal is preferably copper or a copper alloy, nickel or a nickel alloy, or a noble metal such as silver or a silver alloy.

Preferably, the device is obtainable via the method described above.

• – ein Bauteil, das eine Vorder- und eine Rückseite aufweist, wobei die Vorderseite und/oder die Rückseite des Bauteils durch eine Beschichtung aus einem transparenten leitfähigen Oxid (TCO-Beschichtung) gebildet ist,
• – eine elektrisch leitfähige Keimschicht, die in definierten Bereichen auf der TCO-Beschichtung aufgebracht ist,
• – eine galvanisch abgeschiedene Metallschicht, die die Keimschicht bedeckt, bevorzugt vollständig bedeckt.

The present invention also relates to a device containing

• A component having a front and a back side, the front side and / or the back side of the component being formed by a coating of a transparent conductive oxide (TCO coating),
• An electrically conductive seed layer, which is applied to the TCO coating in defined regions,
• - A galvanically deposited metal layer that covers the seed layer, preferably completely covered.

With regard to the preferred properties of the TCO coating, the electrically conductive seed layer and the electrodeposited metal layer, reference may be made to the above statements.

The component is preferably an electrical component (for example an optoelectronic component or a semiconductor component, in particular a solar cell). A preferred electrical component is for example a solar cell, a diode (eg a light-emitting diode) or a screen, in particular a flat screen ("Flat Panel Display"), eg a liquid crystal screen "LCD". In the case of a solar cell, the front side is the illuminated side, ie the side of the component facing the radiation source. A particularly preferred solar cell is an SHJ solar cell.

Preferably, the surface of the TCO coating is not substantially covered by the electrodeposited metal layer.

The invention will be explained in more detail by the following examples.

Example 1: Application of electrical contacts on a carrier material made of plastic for producing a printed circuit board

As a component acts a plastic plate on the outer layer as a thin (1 micron) aluminum coating was applied. The aluminum coating was glued as a foil. If necessary, via-holes can be drilled to inner or other conductive tracks. Since aluminum is a self-passivating metal, a thin, passivating oxide film inevitably forms on the outer layer.

A silver particle-containing paste with a volatile solvent with the pattern of the desired printed conductors is applied to the aluminum layer by screen printing. The workpiece is then heated at 100 ° C for 5 minutes to expel the solvent from the paste. Thus, a structured, electrically conductive seed layer is obtained on defined regions of the outer layer.

In a sulfuric copper electrolytic bath with a Cu sacrificial anode, the patterned seed layer and the aluminum layer are exposed to a periodically varying potential (ie, use of a pulse current with cathodic (negative) and anodic (positive) current pulses). Under cathodic potential, a galvanic deposition of the copper takes place on the seed layer. To a lesser extent, copper crystallites also deposit on the passivated surface of the aluminum outer layer. Under anodic potential, there is to some extent a dissolution of the already deposited copper. However, this primarily concerns the copper deposited on the passivated aluminum surface, while the dissolution of copper in the area of the seed layer does not significantly affect the weight. The amplitude of the cathodic current density is 10A / dm ² . Here, the area for the current density refers to the area of the seed layer. The amplitude of the anodic current density is also 10 A / dm ² , but based on the total area.

In order to electrically separate the conductor tracks from one another after galvanic copper deposition, the plastic plate is wetted with concentrated hydrochloric acid as the etching medium over the entire area, so that the exposed areas of the aluminum layer (ie the areas of the aluminum layer not covered by the metal-coated seed layer) are removed by the etching medium , Although a part of the electrodeposited metal is also removed. By applying a correspondingly high layer thickness in the electroplating bath, however, this can be compensated and / or the etching medium HCl is chosen so that the electrodeposited copper layer is far less strongly etched than the aluminum surface.

Example 2 Application of Electrical Circuits on a Silicon Heterojunction Solar Cell (SHJ Solar Cell)

The component used is a conventional SHJ solar cell with an edge length of 156 mm × 156 mm. As an integral part, this SHJ solar cell already has an ITO layer on its front side. The ITO layer acts as the outer layer of the component on which the electrical conductors are to be applied. The ITO layer has a sheet resistance of 100 Ω over its entire area.

A galvanic deposition of copper on ITO at low applied voltages of less than 1V is clearly inhibited. This can be explained as follows:
ITO is a highly doped electron conductor, ie the conduction band is partially occupied by electrons, while there are virtually no holes in the valence band. The chemical potential of ITO is about -4.3 eV. The chemical potential of a copper electrolyte is significantly lower (about -5 eV to -6 eV). This results in the transfer of electrons from the ITO surface into the electrolyte when ITO contacts a copper electrolyte. This causes an electrical potential difference between ITO and electrolyte. Since the charge carrier density in the electrolyte is significantly higher than in the ITO, only a small part of the potential in the electrolyte drops over a distance of a few angstroms, while the majority of the potential in the ITO drops over a distance of 5-100 nm, depending on the doping. In the area of the potential drop in the ITO, there are practically no more electrons in the conduction band. The electron transfer through the ITO surface is thus strongly inhibited.

A silver-particle-containing paste with the pattern of the desired printed conductors is applied to the ITO layer by screen printing. Thus, a structured, electrically conductive seed layer obtained on defined areas of the ITO outer layer.

The solar cell is now wetted on the front wetted by a galvanic bath with a Kupferelelektrolyten moves while on the back of a metal loop contact. Since, in the example chosen, the phosphorus doped amorphous silicon layer of the SHJ solar cell is located on the front side, the solar cell is illuminated through the electrolyte bath so that the electric current can reach the front side of the solar cell when cathodic voltage is applied to the rear side.

The solar cells are now subjected to periodic alternating changes for about 5 min for 4 ms cathodically and for 1 ms anodically with voltage. For cathodic application, the current is limited to 500 mA, the voltage to 2V, with anodic application to 800 mA and 2V. This is regulated by an appropriate electronics, see 4 ,

On the structured seed layer formed by the silver paste, the electrodeposition of the copper takes place.

Example 3: Application of Electrical Circuits on a Bifacial Silicon Heterojunction Solar Cell

An SHJ solar cell is used which has an ITO layer on both its front and back surfaces. On both ITO layers, an aluminum outer layer with a thickness of about 20 nm is applied by sputtering.

On this component with an outer layer of aluminum (i.e., a self-passivating metal), a seed layer of nickel in the form of the electroplated grid is deposited by laser transfer. Thus, a structured, electrically conductive seed layer is obtained on defined regions of the aluminum outer layer. The structured nickel seed layer is applied to both the front and the back of the device.

The SHJ solar cell is now electrically contacted in the areas of the seed layer by means of stainless steel staples and immersed completely in a sulfuric acid electroplating bath containing a copper salt. The solar cell is then charged periodically for about 5 minutes periodically for 9 ms cathodically and for 1 ms anodic with voltage. With cathodic charging, a current of 800 mA flows when anodic application, a maximum current of 1600 mA and a maximum voltage V + of 10V is specified. This is explained by the above and in 4 illustrated circuit regulated.

First, the galvanic deposition of the copper takes place on the structured nickel seed layer. Finally, the pulse parameters are finally adjusted for complete oxidation of the aluminum layer: The amplitude of the andodic current is set to 5 A and the voltage to 10 V. The duration of the pulse is 5 ms. The amplitude of the cathodic voltage is set to 0.9 V and that of the current to 2 A. The duration of the anodic pulse is also 5 ms. With these paremeters, the sample is applied for 10 s in the electrolyte bath.

Selective on the nickel seed layer is electrodeposited copper. In the exposed, i. Not covered by the nickel seed layer areas, the aluminum outer layer is oxidized to produce alumina, which is transparent due to its small thickness.

Example 4 Production of Galvanic Wires on Silicon Substrates

It is used a textured silicon substrate of the layer thickness 180 microns. An insulating silicon oxide layer is applied to the silicon surface. Subsequently, an aluminum outer layer of thickness 1 .mu.m is applied by vapor deposition over the entire surface of the silicon oxide layer. This gives a component with an outer layer of self-passivating metal.

In defined areas, the aluminum outer layer is contacted via a sealing stamp with a zincate solution. In these areas, a zinc layer is formed. 5a shows an SEM image of this surface after the formation of the zinc layer. Subsequently, nickel (chemical nickel) is applied to the zinc layer via an electroless electrochemical deposition. The deposition of the chemical nickel takes place selectively on the zinc, but not on the aluminum outer layer. shows a SEM image of the surface after the electroless deposition of the nickel. Thus, on the aluminum outer layer, a structured seed layer is obtained, which is formed by a zinc layer and a nickel layer deposited on this zinc layer.

The component is brought into contact with a galvanic bath containing a Kupferelelektrolyten. Subsequently, voltage is applied periodically to cathodic and anodic. Copper is electrodeposited on the Zn / Ni seed layer. shows a SEM image of the surface after the electrodeposition of the copper. On the self-passivating aluminum outer layer no deposition of copper is recognizable. Subsequently, the component is brought into contact with a galvanic bath with silver electrolytes and using a pulse current with changing sign occurs the galvanic deposition of the silver on the copper layer.

Finally, an etch treatment removes the exposed aluminum outer layer exposing the underlying silicon oxide layer. The generated tracks are now electrically isolated from each other. 5d shows a micrograph of the surface after the final etching step.

On the dielectric silicon oxide layer of the component, therefore, there is a laterally structured coating which has metallic areas (made of aluminum) at defined intervals, which are separated from one another by recesses. The Zn / Ni seed layer is selective on the aluminum regions, which in turn is completely covered by galvanically deposited copper and silver, ie also on the flanks which bound the layer laterally.

Example 5: Al-Ni-Cu-Ag Printed Circuits on Monocrystalline Silicon Wafer

On a flat monocrystalline silicon wafer, an aluminum layer is vapor-deposited over its entire surface.

By means of screen printing, a zincate-based paste is printed locally, which is applied for 80 seconds and then rinsed off with water. The substrate is then immersed for 180 seconds in an electroless nickel-phosphorus electrolyte having a pH of 4.8. Only the areas coated with nickel-phosphorus, which were previously affected by the zincate-based paste, will be coated. On defined areas of the aluminum outer layer, a seed layer formed from zinc and chemical nickel is thus obtained.

This is followed by the electrodeposition of copper on this seed layer of zinc and chemical nickel. In this case, an acidic copper electrolyte based on copper sulfate with a pH of 2.8 is used. For the deposition, a potential of 1.2 V is applied. On the other hand, the negative potential leads to copper deposition on the nickel-phosphorus areas. Likewise, in the following silver electrodeposition from an alkaline silver electrolyte (pH 10.5), only the copper area is coated and the aluminum areas are protected by the applied potential of 1.1V.

Subsequently, an etching step is carried out in a dilute hydrochloric acid solution. In this case, the aluminum areas are preferably etched in addition to the electrodeposited conductor tracks. The aluminum etching rate is significantly higher than for substrates with comparable thick aluminum layers. The reason for this is the formation of a local element between aluminum and the electrodeposited Ni / Cu / Ag layer stack, resulting in faster dissolution (corrosion) of the aluminum.

Example 6: Two-sided strip conductors on printed circuit board substrate

Base substrate for this example is a printed circuit board precursor consisting of prepreg material (layer thickness 500 microns) which is coated on both sides with an aluminum foil (30 microns). On both sides, thin nickel layers are applied on defined areas of the aluminum outer layer by means of a laser transfer process. These are galvanically reinforced in an alkaline pyrophosphate-based copper bath (pH 8.0). After a layer thickness of 5 microns of copper has been deposited, the aluminum is removed in a dilute sodium hydroxide solution, which does not attack the nickel / copper regions. As soon as the aluminum foil has been etched through the entire layer thickness, the Al / Ni / Cu conductor tracks are electrically separated from one another.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• US 8399287 [0010]
• US 2014/0295614 [0011]

Cited non-patent literature

• De Wolf et al., Green, Vol. 2 (2012), pp. 7-24 [0004]
• Clark I. Bright, Chapter 7 ("Review of Transparent Conductive Oxides (TCO)") in 50 Years of Vacuum Coating Technology and the Growth of the Society of Vacuum Coaters, eds .: Donald M. Mattox and Vivienne Harwood Mattox, Society of Vacuum Coaters, 2007 (ISBN 978-1-878068-27-9) [0033]
• A. Stadler, Materials, 2012, 5, pp. 661-683 [0033]

Claims (15)

Method for producing one or more electrical contacts on a component, comprising the following steps: Provision of a component which has a front and a rear side, wherein an outer layer of a transparent, electrically conductive oxide (TCO) or a self-passivating metal or semiconductor is present on the front side and / or the rear side, Applying a structured, electrically conductive seed layer on defined regions of the outer layer, wherein the application of the seed layer is not galvanic, - Electrodeposition of at least one metal on the seed layer. The method of claim 1, wherein the component is an electrical component, in particular a solar cell or a light-emitting diode, or a precursor of a printed circuit board. The method of claim 2, wherein the solar cell is a heterojunction solar cell. A method according to any one of the preceding claims, wherein the TCO is an indium tin oxide (ITO), an aluminum-doped zinc oxide (AZO), a fluorine-doped tin oxide (FTO), a boron-doped zinc oxide or a hydrogen-doped indium oxide; and / or the self-passivating metal is aluminum, titanium, nickel, chromium or zinc or an alloy of one of these metals or the self-passivating semiconductor is silicon. A method according to any one of the preceding claims, wherein the outer layer of the self-passivating metal or semiconductor is obtained via a physical vapor deposition, a chemical vapor deposition or by attaching a film of the self-passivating metal or semiconductor; and / or wherein the outer layer of the component has a thickness of ≤ 25 microns. Method according to one of the preceding claims, wherein the application of the seed layer on defined regions of the outer layer via a printing process, in particular screen printing, inkjet printing, flexographic printing or aerosol printing, a laser transfer method or an electroless electrochemical deposition, in particular a zincate method, followed from the deposition of chemical nickel occurs. Method according to one of the preceding claims, wherein the electrically conductive seed layer one or more metals, in particular copper or a copper alloy, nickel or a nickel alloy, indium or an indium alloy, tin or a tin alloy or a noble metal such as silver or a silver alloy, one or more electrically conductive polymers, one or more electrically conductive carbon materials, in particular graphene, graphene oxide, carbon nanotubes, graphite or carbon black, or a mixture of at least two of these components; and / or wherein the seed layer has a thickness of ≤ 20 μm. Method according to one of the preceding claims, wherein the electrodeposited metal is copper or a copper alloy, nickel or a nickel alloy or a noble metal such as silver or a silver alloy. Method according to one of the preceding claims, wherein the electrodeposition of the metal by means of pulse current with cathodic and anodic pulses. Method according to one of the preceding claims, wherein after the electrodeposition of the metal nor anodization of the self-passivating metal or semiconductor takes place in an anodizing bath. Method according to one of the preceding claims, wherein after the electrodeposition exposed areas of the outer layer, which are not covered by the structured seed layer, are removed by an etching treatment. Device containing A component having a front side and a rear side, wherein a laterally structured coating is present on the front side and / or the rear side of the component, which has metal or semiconductive regions of a self-passivating metal or semiconductor at defined intervals, An electrically conductive seed layer present on the metallic or semiconductive regions of the laterally structured coating, - An electrodeposited metal layer that covers the seed layer. Apparatus according to claim 12, wherein in the laterally structured coating between the metallic or semiconducting regions in each case oxide regions or recesses are present, which preferably extend over the entire thickness of the coating. Apparatus according to claim 13, wherein the surface of the oxide regions is covered substantially neither with the electrically conductive seed layer nor with the electrodeposited metal layer. Device containing A component which has a front and a rear side, the front side and / or the rear side of the component being formed by a coating of a transparent conductive oxide (TCO coating), an electrically conductive seed layer which is located in defined regions the TCO coating is applied, - a galvanically deposited metal layer that covers the seed layer.

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