DE102012205251A1 - Method for processing disk-shaped semiconductor wafer utilized for producing semiconductor chips, involves applying adhesive to outer peripheral portion of wafer semiconductor, so that additional processing of wafer is performed - Google Patents

Abstract

The method involves attaching a protective tape on a front side (11a) of a semiconductor wafer (11). A backside (11b) of the wafer is sharpened in a central portion corresponding to a device region (17) to form a circular recess and an annular protrusion. The tape is removed from the wafer front side after the sharpening process. Heat-resistant adhesive is applied to an outer peripheral portion of the wafer in order to bond a substrate on the front side of the wafer after the removing process. An additional processing of the wafer is performed after performing the adhesive applying process.

Description

BACKGROUND OF THE INVENTION

Field of the invention

The present invention relates to a semiconductor wafer processing method which does not impair the operability of a semiconductor wafer having a reduced thickness.

State of the art

In a semiconductor device manufacturing process, separation lines called streets are arranged in a lattice pattern on a front side of a substantially disk-shaped semiconductor wafer to thereby divide a plurality of regions, in each of which regions, devices such as ICs and LSIs are formed. The semiconductor wafer is cut along the streets using a cutter, thereby to divide the semiconductor wafer into individual semiconductor chips (devices). Before cutting the semiconductor wafer along the streets, a back surface of the semiconductor wafer is ground to reduce the thickness of the semiconductor wafer to a predetermined thickness. In order to achieve a reduction in size and weight of electrical equipment in recent years, it has become necessary to further reduce the thickness of a wafer to, for example, about 50 μm. Such a thin wafer ground in this way is difficult to handle, and therefore there is a possibility of damaging the wafer during transportation or the like. To cope with this problem has been in the published Japanese patent JP 2007-19461 proposed a grinding method such that the back side of a wafer is ground only at a central portion corresponding to a device region formed at the front side of the wafer, thereby forming a circular recess at this central portion and thus an annular projection at the back side of the wafer at a peripheral portion corresponding to a circumferential boundary area surrounding the device area.

As another measure to facilitate the handling of such a thin wafer, the use of a substrate called a support plate in the Japanese patent is called JP 2004-207606 for example disclosed. Generally, the substrate is attached to a front side of a wafer, and a backside of the wafer is then ground by a grinder. Subsequently, the wafer is subjected to a predetermined processing as necessary, and the substrate is then removed from the wafer. The wafer is then cut by means of a cutting device to obtain individual devices.

As a recent three-dimensional arrangement technique, a stacking technique in which a plurality of semiconductor chips are stacked and through electrodes penetrated by the stacked semiconductor chips is recently formed to connect these semiconductor chips or a stacking technique in which a A plurality of semiconductor wafers is stacked and developed through-electrode, which penetrate through the stacked semiconductor wafer, are formed to connect these semiconductor wafers, developed.

Summary of the invention

The substrate is attached to the front side of the semiconductor wafer by means of an adhesion promoter and the device surface of the wafer is formed as a microscopic structure. Accordingly, after removing the substrate from the wafer, it is difficult to remove the adhesive remaining in this microscopic (uneven) structure. Further, the substrate to be used in grinding the wafer must have a high degree of flatness, and such a substrate having a high flatness is very expensive. Accordingly, a method of grinding the wafer without using such a substrate is desired.

On the other hand, in the three-dimensional mounting technique using through electrodes, it is necessary to manufacture a semiconductor wafer with through electrodes. The fabrication of a semiconductor wafer with through electrodes requires various processing, including forming the through electrodes, forming protrusions on the front side of the wafer, and forming a film on the back side of the wafer. However, the following problems may occur. In general, a semiconductor wafer for use in the three-dimensional arrangement has a thickness of 50 μm or less. Accordingly, as a measure against a sharp edge in the grinding of the wafer, the wafer must be subjected to edge trimming before grinding, which requires troublesome steps to be performed.

In the process of manufacturing a semiconductor wafer with through electrodes, it is necessary to perform a heat treatment such as a metal foil forming step comprising heating to about 450 ° C and a reflow step comprising heating to about 200 ° C. Accordingly, in the case that a substrate by means of an adhesion promoter to is attached to the front side of the wafer, the adhesive may remain on the device surface of the wafer after performing the above-mentioned heat treatment. Furthermore, the adhesive that can withstand such high temperatures is expensive.

It is therefore an object of the present invention to provide a semiconductor wafer processing method which can solve the above problems of the prior art.

According to one aspect of the present invention, a processing method for a semiconductor wafer having a device region in which a plurality of semiconductor devices are respectively formed in a plurality of regions divided by a plurality of intersecting separation lines formed on the front side of the semiconductor wafer and a peripheral parting area surrounding the device area, the machining method including a protective tape attaching step of attaching a protective tape / protective tape to the front side of the semiconductor wafer; a grinding step of grinding the back side of the semiconductor wafer in a central area corresponding to the device area to thereby form a circular recess and an annular protrusion including the peripheral boundary area surrounding the circular recess after performing the protective tape attaching step; a protective tape removing step of removing the protective tape from the front side of the semiconductor wafer after performing the grinding step; a substrate providing step of applying an adhesive agent to only an outer peripheral portion of the semiconductor wafer to bond a substrate to the front side of the semiconductor wafer after performing the protective tape removing step; and an additional processing step of performing additional processing on the semiconductor wafer after performing the substrate providing step.

Preferably, the semiconductor processing method according to the present invention further comprises a circular cutting step of circularly cutting the semiconductor wafer to thereby separate the device region from the peripheral boundary region after the additional processing step.

In the semiconductor wafer processing method according to the present invention, the protective tape is attached to the front side of the semiconductor wafer without using a substrate when the semiconductor wafer is ground to form the circular recess on the back side of the semiconductor wafer in its central area corresponding to the device area. Accordingly, an expensive substrate is not needed when grinding the semiconductor wafer, and the problem of the sharp edge after the grinding does not occur. Further, by providing the substrate on the semiconductor wafer, the adhesive is applied only to the outer peripheral portion of the semiconductor wafer to bond the substrate to the front surface of the semiconductor wafer. Accordingly, the adhesive does not remain in the device area even after the heat treatment. In addition, the amount of adhesive material to be used in providing the substrate to the semiconductor wafer can be reduced.

The above and other objects, features and advantages of the present invention and the manner of implementation thereof will become more apparent and the invention itself will be best understood by reading the following description and appended claims with reference to the accompanying drawings, some of which are preferred Embodiments of the invention show.

BRIEF DESCRIPTION OF THE DRAWINGS

1 Fig. 10 is a flowchart showing a semiconductor wafer processing method according to a first embodiment of the present invention;

2 FIG. 10 is a flowchart illustrating a continuation of the semiconductor wafer processing method of FIG 1 shows;

3 FIG. 12 is a perspective view of a semiconductor wafer when viewed from a front side; FIG.

4 Fig. 10 is a sectional view showing a state in which a protective tape is attached to the front side of the semiconductor wafer with through electrodes;

5 Fig. 15 is a perspective view showing a grinding apparatus for performing a grinding step;

6 Fig. 10 is a plan view for illustrating the grinding step;

7A Fig. 10 is a sectional view of the semiconductor wafer processed by performing the grinding step;

7B Fig. 10 is a sectional view showing a protective tape removing step;

8A Fig. 10 is a sectional view showing a continuation in which a substrate is provided on the front side of the semiconductor wafer;

8B Fig. 10 is a schematic plan view showing a bonding position;

8C Fig. 10 is a schematic plan view showing a modification of the bonding position;

9 FIG. 12 is a sectional view showing a modification of the bonding method disclosed in FIG 8A is shown;

10 Fig. 10 is a sectional view of the semiconductor wafer processed by performing a through-electrode projecting step;

11A Fig. 10 is a sectional view showing a state in which a substrate is provided on the front side of another semiconductor wafer without through electrodes;

11B Fig. 12 is a sectional view of the semiconductor wafer after the through-electrode has been formed in the semiconductor wafer and then the through-electrode projecting step is performed;

12A Fig. 10 is a sectional view illustrating a grinding step for an annular projection;

12B FIG. 12 is a sectional view of the semiconductor wafer processed by performing the annular projection grinding step; FIG.

13A Fig. 10 is a sectional view showing a state in which a second substrate is provided on the back side of the semiconductor wafer;

13B is a sectional view showing a state in which the in 13A shown wafer is inverted and the substrate is then removed;

13C Fig. 10 is a sectional view showing a circular cutting step for separating a device area from the second substrate;

14A Fig. 10 is a sectional view for illustrating a grinding step for the annular projection in a machining method according to a second embodiment;

14B Fig. 10 is a sectional view of the semiconductor wafer which has been processed by performing the abrasive step for the annular projection;

14C Fig. 10 is a sectional view showing a state in which a protective layer is provided on the back side of the semiconductor wafer;

14D is a sectional view showing a state in which the in 14C shown semiconductor wafer is inverted and the substrate is next cut in a circle to be removed;

14E Fig. 10 is a sectional view showing a state in which the substrate is removed and an additional front-side processing step is subsequently performed;

15A Fig. 10 is a sectional view showing a through-electrode projecting step in a semiconductor processing method according to a third embodiment of the present invention;

15B is a sectional view showing a state in which the in 15A shown semiconductor wafer is inverted, and then the substrate is cut circular to be removed;

15C Fig. 10 is a sectional view showing an additional front-side processing step; and

15D FIG. 10 is a sectional view showing a state in which the semiconductor wafer is cut in a circle to separate a device region. FIG.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Some preferred embodiments of the present invention will now be described in detail with reference to the drawings. Referring to 1 and 2 In the drawings, there is shown a series of flowcharts showing a semiconductor processing method according to a first preferred embodiment of the present invention. Referring to 3 becomes a semiconductor wafer 11 which is to be processed by the semiconductor wafer processing method according to the first preferred embodiment. As in 3 is shown, the semiconductor wafer 11 formed of a silicon wafer with a thickness of for example 700 microns. A variety of intersecting roads 13 is at the front 11a of the semiconductor wafer 11 thereby dividing a plurality of rectangular regions in which a plurality of devices such as ICs and LSIs are respectively formed. The front 11a of the semiconductor wafer 11 includes a facility area 17 in which the facilities 15 are formed, and a peripheral boundary area 19 of the furniture area 17 surrounds. The outer circumference of the semiconductor wafer 11 is with a score 21 as a mark for indicating the crystal orientation of the semiconductor wafer.

In the semiconductor wafer processing method according to the first preferred embodiment, step S10 of the flowchart shown in FIG 1 is first performed as a protective tape attaching step to a protective tape on the front side 11a of the semiconductor wafer 11 to fix. As in 4 shown, the semiconductor wafer 11 a plurality of through-electrodes 12 on and a protective tape 14 will be at the front 11a of the semiconductor wafer 11 attached. Subsequently, step S11 is performed, if necessary, around the entire backside 11b of the Habeiterwafers 11 to grind at a position marked with an arrow A in 4 is shown, whereby the thickness of the semiconductor wafer 11 reduced to 400 microns. However, this grinding step is not always necessary in the machining method of the present invention.

Subsequently, step S12 is performed as a grinding step to the rear side 11b of the semiconductor wafer in a central area corresponding to the device area 17 corresponds to grinding, whereby a circular recess and an annular projection surrounding the circular recess is formed. This grinding step will now be with reference to 5 and 6 described. As in 5 As shown, the semiconductor wafer is subjected to negative pressure on a chuck table 16 a grinding device held in the state in which the protective tape 14 at the front 11a of the semiconductor wafer 11 is fixed in contact with the surface of the clamping table 16 stands. The grinding device comprises a grinding unit 18 for grinding the back 11b of the semiconductor wafer 11 who is at the chuck table 16 is held. The grinding unit 18 includes a housing 20 , a spindle 22 rotatable in the housing 20 is housed a wheel 24 at the lower end of the spindle 22 is fixed, and a grinding wheel 26 Removable on the lower surface of the wheel 24 is attached. The grinding wheel 26 includes an annular base 28 and a variety of abrasive elements 30 attached to the lower surface of the annular base 28 are attached to along the outer circumference of the annular base 28 to be arranged.

In the grinding step S12, the chuck table becomes 16 at 300 rpm, for example, rotated in the direction shown by the arrow a and the grinding wheel 600 is with, for example, 6000 U / min in the by means of an arrow b in 5 and 6 turned direction shown. At the same time, a grinding unit feeding mechanism (not shown) is driven to drive the abrasive elements 30 of the grinding wheel 26 in contact with the back 11b of the semiconductor wafer 11 bring to. Furthermore, the grinding wheel 26 fed down by a predetermined amount at a predetermined feed rate. The result is the back 11b of the semiconductor wafer 11 at its central area corresponding to the furnishing area 17 ground to a circular recess 32 with a given depth (for example 50 μm for the thickness of the central portion, that of the circular recess 32 corresponds) form and as a result an annular projection 34 around the circular recess 32 , as in 7A shown to train. Accordingly, the circular projection becomes 34 formed as the remaining peripheral portion, the peripheral boundary area 19 equivalent.

The relationship between the semiconductor wafer 11 who is at the chuck table 16 is held, and the abrasive elements 30 of the grinding wheel 26 will now be referring to 6 described. The center P1 of the rotation of the clamping table 16 and the center P2 of rotation of the ring of abrasive elements 30 that ring on the annular base 28 of the grinding wheel 26 are arranged, deviate from each other, as in 6 shown off. Further, the outer diameter of the ring of the abrasive elements 30 set smaller than the diameter of the boundary circle 30 between the furnishing area 17 and the peripheral boundary area 19 of the semiconductor 11 , Further, the outer diameter of the ring of the abrasive elements 30 set larger than the radius of the limit circle 35 , Accordingly, the ring of the abrasive element extends 30 through the center P1 of the rotation of the clamping table 16 ,

After performing the abovementioned grinding step, step S13 is performed as a protective tape removal step to remove the protective tape 14 from the front 11a of the semiconductor wafer 11 to remove (remove). 7B Fig. 10 is a sectional view showing this protective tape removing step. Subsequently, step S14 is performed as a substrate providing step to form an adhesive only on an outer peripheral portion of the semiconductor wafer 11 provide, creating a substrate on the front 11a of the semiconductor wafer 11 is bonded. In particular, as in 8A and 8B shown is an adhesive 38 on the front side 11a of the semiconductor wafer 11 applied to only an outer peripheral portion thereof and a substrate 36 will be at the front 11a of the semiconductor wafer 11 intended. Preference is given to heat-resistant adhesive as the adhesive 38 used.

In this preferred embodiment, the substrate is 36 formed from a silicon wafer. As a modification, the substrate 36 be formed of glass. As a method of applying the adhesive 38 becomes the adhesive 38 continuous at the front 11a over the outer periphery of the semiconductor wafer 11 in this preferred embodiment, as in 8B shown, created. When a modification may be the adhesive 38 discreet at the front 11a over the outer periphery of the semiconductor wafer 11 , as in 8C shown to be applied, reducing the substrate 36 to the semiconductor wafer 11 is bonded.

Another modification is in 9 shown. As in 9 shown, becomes the substrate 36 first in close contact with the front 11a of the semiconductor wafer 11 brought and the adhesive 38 is next to the outer peripheral surfaces of the semiconductor wafer 11 and to the substrate 36 applied along a narrow contact portion thereof, whereby the substrate 36 by means of the adhesive 38 on the front side 11a of the semiconductor wafer 11 is bonded. Also in this case, the adhesive can 38 may be continuously applied over the outer periphery of the close contact portion or may be discretely applied over the outer periphery of the close contact portion.

After performing the substrate-providing step mentioned above, step S15 is performed as a through-electrode forming step to form through-electrodes in the manner of a semiconductor wafer to be processed, that is, the type to be used in each semiconductor wafer. For example, in the case that the semiconductor wafer becomes a semiconductor wafer 11A without through-electrode is as in 11A shown, a plurality of through-electrodes 12 in the semiconductor wafer 11A formed in the state in which the substrate 36 on the front side 11a of the semiconductor wafer 11A , as in 11B shown is provided.

Subsequently, step S16 is performed as a through-electrode projecting step, around the bottom surface of the circular recess 32 by dry etching, such as plasma etching or wet etching, such as chemical mechanical polishing (CMP), whereby the through electrodes 12 from the bottom surface of the circular recess 32 , as in 10 and 11B shown, stand out.

Subsequently, step S16 is performed as an additional recess processing step to perform additional processing including heat treatment and chemical treatment on the bottom surface of the circular recess 32 perform. For example, this additional processing step includes a metal foil forming step for forming a metal foil on the bottom surface of the circular recess 32 ,

Subsequently, step S18 is performed as an annular projection grinding step to remove the annular projection 34 of the semiconductor wafer 11 to grind. In this grinding step for the annular projection, the substrate becomes 36 held under vacuum on a chuck table of a grinder (not shown) and the annular projection 34 gets up to a position H1, which in 12A is ground, using a grinding wheel, whereby substantially the annular projection 34 Will get removed. 12B Fig. 10 shows a state in which the annular projection has been substantially removed by this annular projection grinding step.

Subsequently, step S19 is performed as a protection element providing step. As in 13A is shown, the protective element provision step by applying an adhesive 42 on the outer peripheral portion of the back 11b of the semiconductor wafer 11 and by bonding a protective element (second substrate) 40 through the adhesive 42 to the back 11b of the semiconductor wafer 11 created. Similar to the adhesive 38 For example, a heat-resistant adhesive is preferred as the adhesive 42 used. Furthermore, the adhesive may 42 continuous at the back 11b over the outer periphery of the semiconductor wafer 11 can be applied or it can be discreet at the back 11b over the outer periphery of the semiconductor wafer 11 be applied.

Subsequently, the in 13A shown state to the in 13B shown state inverted and the substrate 36 is from the front 11a of the semiconductor wafer 11 removed (step S20 as a substrate removal step). Subsequently, step S21 is performed as an additional front-side processing step for additional processing on the front side 11a of the semiconductor wafer 11 perform. This additional front-side processing step includes a bump-forming step and, for example, a reflow-soldering step. Subsequently, step S22 is performed as a circular cutting step. As in 13C is shown, the circular cutting step by circular cutting of the semiconductor wafer 11 along a circular line R1 by using a cutting knife or a laser beam, whereby a central portion of the semiconductor wafer 11 , the furniture area 17 corresponds, is obtained.

Referring next to 14A to 14E Fig. 13 shows a series of processing steps according to a second preferred embodiment after the additional recess processing step of step S17. 14A shows an annular projection grinding step similar to that in FIG 12A shown step and 14B shows a state similar to that in FIG 12B shown state after performing the grinding step for the annular projection. In the second preferred embodiment, an adhesive is used 46 on the outer peripheral portion of the back 11B of the semiconductor wafer 11 created and a protective element (protective layer) 44 gets through the adhesive 46 to the back 11b of the semiconductor wafer 11 , as in 14C shown, bonded.

Subsequently, the in 14C shown state towards the in 14D shown inverted state and the semiconductor wafer 11 is under suction by means of the protective element 44 held on a chuck table of a cutting device or a laser processing device. In this state, the substrate becomes 36 circular along a circular line R32 shown in FIG 14D , cut by using a cutting knife or a laser beam, thereby forming a central portion of the substrate 36 as indicated by an arrow A in 14D shown, removed. Subsequently, the protective element 44 from the back 11b of the semiconductor wafer 11 , as in 14E is shown removed and an additional front-side processing step comprising a bulge forming step and a reflow-soldering step are performed in this state.

Subsequently, though not shown, the semiconductor wafer becomes 11 circular along a circular line R3 as in a third embodiment (shown in FIG 15D ) by using a cutting knife or a laser beam, whereby a central portion of the semiconductor wafer 11 , the furniture area 17 is obtained from the state in which a peripheral portion of the substrate 36 on the semiconductor wafer 11 is provided.

Referring next to 15A to 15D Fig. 13 shows a series of processing steps according to a third preferred embodiment after the additional processing step of step S17. In the in 15A In the state shown, an additional recess processing step comprising a metal foil forming step is performed. Subsequently, the in 15A shown state towards the in 15B shown performed state without performing a grinding step for an annular projection. In this state, the substrate becomes 36 circular along a circular line R2, which in 15B is cut by using a cutting knife or a laser beam, thereby forming a central portion of the substrate 36 as indicated by an arrow A in 15B shown is removed. 15C shows a state after removal of the central portion of the substrates 36 , In the in 15C In the state shown, an additional front-side processing step comprising a bulge forming step and a backflow-soldering step is performed.

Subsequently, the semiconductor wafer becomes circular along a circular line R3 which is in 15D is cut by using a cutting knife or a laser beam, whereby a central portion of the semiconductor wafer 11 , the furniture area 17 corresponds to, in the state where a peripheral portion of the substrate 36 on the semiconductor wafer 11 is provided is obtained.

The central portion of the semiconductor wafer 11 , the furniture area 17 obtained by the processing methods according to the first to third above-mentioned embodiments, becomes along the dividing lines 13 cut by using a cutting knife or a laser to the individual semiconductor devices 15 to obtain.

The present invention is not limited to the details of the preferred embodiments described above. The scope of the invention is defined by the appended claims, and all changes and modifications that fall within the equivalence of the scope of the claims are therefore included in the invention.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• JP 2007-19461 [0002]
• JP 2004-207606 [0003]

Claims (2)

A processing method for a semiconductor wafer having a device region on which a plurality of semiconductor devices are respectively formed in a plurality of regions divided by a plurality of intersecting separation lines formed on the front side of the semiconductor wafer and a peripheral boundary region including the device region surrounds, the machining process comprising: a protective tape attaching step of attaching a protective tape to the front side of the semiconductor wafer; a grinding step of grinding the back surface of the semiconductor wafer in a central area corresponding to the device area to thereby form a circular recess and an annular protrusion including the peripheral boundary area surrounding the circular recess after performing the protective tape attaching step; a protective tape removing step of removing the protective tape from the front side of the semiconductor wafer after performing the grinding step; a substrate providing step of applying an adhesive to only one outer peripheral portion of the semiconductor wafer to bond a substrate to the front side of the semiconductor wafer after performing the protective tape removing step; and an additional processing step of performing additional processing on the semiconductor wafer after performing the substrate-providing step. The semiconductor wafer processing method according to claim 1, further comprising: a circular cutting step of circularly cutting the semiconductor wafer to thereby separate the device region from the peripheral boundary region after performing the additional processing step.

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