DE102011108080A1 - Group III nitride-based layer sequence, device and method of manufacture - Google Patents

Abstract

Group III nitride-based layer sequence (100), comprising at least one AlxGayIn1-x-yN-based seed layer (102) and an AlxGayIn1-x-yN layer (103) on a group IV substrate (101) with x <0.2 and x + y ≦ 1, wherein the AlxGayIn1-x-yN seed layer (102) is disposed on the substrate (101) and x> 0.2.

Description

The invention relates to a group III nitride-based layer sequence, as well as components produced therefrom and methods for their preparation.

Group III nitride-based layer sequences are well suited for a variety of applications such as light emitting diodes and high voltage and high frequency transistors due to the direct band gap. In addition, they are excellent for light emitters, photodetectors due to the theoretically very large adjustable bandgap from the UV range with 6.2 eV through aluminum nitride (AlN) over 3.4 eV through gallium nitride (GaN) to the IR range with 0.68 eV through indium nitride (InN) as well as photovoltaic cells suitable. The latter are currently largely realized on the basis of silicon and, more recently, chalcogenides and III-V semiconductors. The latter are usually arsenide or phosphide-based multiple solar cells, which achieve very high efficiencies at a relatively high price.

Group III nitrides have great advantages over conventional cells in terms of temperature stability, chemical resistance and radiation resistance. The latter is crucial for space applications. The growth of Group III nitrides on a variety of heterosubstrates such as sapphire or silicon carbide (SiC) has been known for years, and growth on silicon substrates is also becoming increasingly important due to scaling and price advantages. For this purpose, a group III nitride layer having an Al-containing seed layer of the AlGaN (SiC) or AlN (Si and SiC) type is usually applied to SiC and silicon (Si) in order to have a component layer, usually based on a thick layer GaN buffer to realize.

There are several reasons why this is not desirable for solar cells. Thus, a Si / AlN junction results in a high barrier and an insulating junction that is unsuitable for vertical current flow. Ager et al. [Joel W. Ager III, et al., Phys. Status Solidi C 6, S413 (2009) ] have shown that between p-Si and n-GaInN with In concentrations> 30% the band offset between the silicon valence band and the GaInN conduction band disappears, which leads to a nearly vanishing electrical resistance across the interface. Such a transition is very interesting for a large number of components, such as vertical diodes as switches or for LEDs, as well as for solar cells.

The main problem in the production of GaInN buffer layers is the growth, in particular on silicon substrates, where a reaction between gallium and the silicon leads to so-called meltback etching [see, for example, US Pat. B. Chapter IV by A. Dadgar in III-V Compound Semiconductor: Integration with Silicon-based Microelectronics, editors T. Li, M. Mastro, and A. Dadgar (CRC Press, Boca Raton, FL, 2010) .]. The meltback etching, which is particularly pronounced in processes which deposit the layers out of the gas phase, leads to a hole formation in silicon substrates and to the formation of silicon-nitrogen-rich precipitates, or a high and usually unwanted silicon doping of the growing layer by the triggered silicon. This is exemplary in shown where the silicon substrate ( 401 ) with GaInN ( 402 ) and the holes formed by meltback etching in the substrate ( 403 ) are partially filled again with GaInN. Overall, the growth with GaInN seed layer leads to a strong disorder of the subsequent layer. Regardless of the meltback etching, nucleation with this compound on a variety of substrates such as Si, germanium (Ge), diamond (C) or mixtures thereof is not ideal and leads to severe twisting and tilting of the crystallites which are in can be seen and adversely affect the layer and device properties.

The aim is for a low resistance with vertical power line, a low band offset of the semiconductor with the best possible crystal quality which is in principle feasible with InGaN on silicon [ Joel W. Ager III, et al., Phys. Status Solidi C 6, S413 (2009) ]. Here, the direct growth of GaN layers on silicon and the problem of meltback etching is known and represents an unsolved problem. It is also known that to avoid the meltback etching AlN based seed layers are used, but which have a high bandgap energy and therefore for vertical Current flow are unsuitable [see, for. B. Chapter IV by A. Dadgar in III-V Compound Semiconductor: Integration with Silicon-based Microelectronics, editors T. Li, M. Mastro, and A. Dadgar (CRC Press, Boca Raton, FL, 2010) .]

It is now the object of the present invention to solve the problem of occurring meltback etching, a low crystal quality and usually also high vertical resistance in conventional seed layers.

This object is achieved by a group III nitride-based layer sequence according to claim 1, as well as a device having a group III nitride-based layer sequence according to claim 7 and a method for producing a group III nitride-based layer sequence according to claim 8 Preferred embodiments of the invention can be found in the subclaims.

According to the invention, a group III nitride-based layer sequence is provided, at least comprising an Al _x Ga _y In _1-xy N-based seed layer ( 102 ) and an Al _x Ga _y In _1-xy N layer ( 103 ) on a Group IV substrate ( 101 ), where x <0.2 and x + y ≦ 1, where the Al _x Ga _y In _1-xy N seed layer ( 102 ) on the substrate ( 101 ) and x> 0.2.

The advantage of such a layer arrangement is that, compared to a layer sequence with a seed layer with Al <20%, an improved layer quality is achieved, in particular a reaction of gallium and silicon referred to in the literature as meltback etching is suppressed and the electrical resistance is suppressed via the group III nitride / silicon interface is very low. In this case, percentages of the group III elements always refer to their proportion within the group III elements, d. H. the sum of the group III element concentration is 100%.

In the following, the invention will be described with reference to the application in solar cells, but is not limited thereto, but in principle for all applications in which a vertical current flow is sought applicable.

In this case, the seed layer is the group III nitride layer, which is the transition from the substrate with either other symmetry, such as in the case of zinc blende structures with bidentate (110), fourfold (001) or threefold (111) symmetry of the surface atoms [ A. Dadgar et al., New Journal of Physics 9, 389 (2007) and Reiher, et al., Journal of Crystal Growth 312, 180 (2010) ] or hexagonal crystals, such as. B. SiC are known, realized with different lattice constant to the group III nitride buffer layer. For a high-quality crystal, the most uniform possible orientation of the growing layer should be. Since the growth usually starts from islands, therefore, these islands must be oriented as well as possible to each other so that they produce no or only a few new lattice defects when coalescing to a closed layer.

Ideal is an AlInN seed layer, so a gallium-free seed layer, but small gallium admixtures in the specified amount of up to 20% of the group III content are tolerable without a significant deterioration of the seed layer to achieve and further to the unwanted meltback sufficiently suppress etching.

Advantageous may be a gallium addition to lower the bandgap energy somewhat and thus allow better flow of current across the group III nitride-substrate interface. It is crucial that aluminum is contained in sufficient concentration to minimize the effects described above. So the Al concentration should be at least 20%, ideally over 30%. The remainder of the compound is advantageously composed of indium, which does not cause meltback etching. With this Al and In-rich AlGaInN material is also a very low band offset at the interface with the substrate, in particular from the silicon or germanium substrate to the group III nitride layer without meltback etching effects achieved at a high orientation of the crystallites. This is followed by a layer of GaInN of the desired concentration.

The additional AlInN / GaInN interface does not introduce any additional band offset when the composition is skilfully selected, and thus the additional layer has no significant negative impact on the overall structure's conductivity. On the contrary, it is even improved by the improved crystallographic properties.

However, depending on the structure, it may also be desirable to achieve a low band offset at the AlInN / GaInN interface, such as. B. to prevent unwanted minority carrier combination at the near the substrate located defect rich AlInN layer. Thus, for holes as a minority carrier, a small barrier in the valence band and, analogously for electrons as a minority carrier, a barrier in the conduction band, in particular for photovoltaic applications, is advantageous.

Minority carriers can be quasi-reflected by a barrier and diffused to the space charge zone instead of recombining in the region at or near the Si interface, which increases the efficiency. This can likewise be realized by an opposing field generated by a doping and by a piezoelectric field arising at the heterointerface AlInN / GaInN.

A further embodiment of the invention provides a layer sequence in which an AlGaInN seed layer has a bandgap energy which lies below the subsequent layer.

As a rule, the AlInN should aim for a higher In content compared to GaInN, since the AlInN has a slightly higher bandgap energy.

In photovoltaic cells, in which one seeks to unite multiple cells based on group III nitrides with a silicon-based cell, the actually serving as a seed layer AlInN can also serve as a photovoltaic cell, but then must be made correspondingly thick with over a hundred nanometers thick to have sufficient efficiency as a single cell in a multiple cell system.

In order to achieve the lowest possible vertical electrical resistance, an n-type group III nitride layer sequence arranged on a p-type substrate surface is advantageous. In the case of multiple solar cells, such a transition is necessary instead of an otherwise usual tunneling contact between the cells and is easier to realize with this method than delta-doped p- and n-conducting layers for a tunnel junction. This can be realized, for example, during growth, by introducing one or more of the group III elements in front of the group V element in seed layer growth, these group III elements produce a p-type doping in the surface layer of the substrate. In addition, a low Si diffusion into the group III nitride seed layer is also advantageous in this layer sequence, since this increases the n-type doping.

According to a further embodiment of the invention, a layer sequence is provided which is formed by the growth of a seed layer ( 102 ) in the system Al _x Ga _y In _1-xy N with y <0.2.

An embodiment of the invention provides that the layer sequence is used in a diode or a photovoltaic cell.

In a further embodiment of the invention, a component having a group III nitride-based layer sequence, at least comprising an Al _x Ga _y In _1-xy N-based seed layer (US Pat. 102 ) and an Al _x Ga _y In _1-xy N layer ( 103 ) on a Group IV substrate ( 101 ), which contains x <0.2, where the Al _x Ga _y In _1-xy N seed layer ( 102 ) on the substrate ( 101 ) and has at least x> 0.2.

• – Bereitstellung eines Gruppe-IV-Substrats (101)
• – Aufbringen einer Al_xGa_yIn_1-x-yN-basierten Keimschicht (102) mit x > 0.2 auf das Substrat (101),
• – Aufbringen mindestens einer weiteren Al_xGa_yIn_1-x-yN Schicht (103) mit x < 0.2 auf der Keimschicht (102).

According to a further embodiment of the invention, a method for producing a group III nitride-based layer sequence is provided, comprising at least the following steps:

• - providing a group IV substrate ( 101 )
• Application of an Al _x Ga _y In _1-xy N-based seed layer ( 102 ) with x> 0.2 on the substrate ( 101 )
• Applying at least one further Al _x Ga _y In _1-xy N layer ( 103 ) with x <0.2 on the seed layer ( 102 ).

Exemplary embodiments of the invention with reference to the following figures are shown and described in detail.

As an application example, the use of the layer sequence in a diode, in particular the use in a photovoltaic cell, will be described.

Show it:

1 FIG. 2: a schematic representation of a layer structure of a group III nitride-based layer sequence, FIG.

2 FIG. 2: the schematic course of the bandgap energy between group IV substrate and seed layer, FIG.

3 : the schematic course of the bandgap energy between group IV substrate and a seed layer with composition gradients and

4 : Shows the cross section of the layer structure of an InGaN layer in the transmission electron microscope.

A simple cell is in 1 shown. The substrate 101 is here either just an ideally p-type carrier or an n / p silicon cell, ideally with an upper to the layer 102 pointing p-type silicon layer. The layer 102 is then the AlGaInN layer according to the invention. The layer 101 but may also include substrate materials or thin layers on a carrier substrate in the SiGeC system. Specifically, SiGe compounds are of interest in a solar cell for better efficiency through a better matched bandgap.

Ideal is a seed layer in the system Al _x Ga _y In _1-xy N with x> 20. It also ideally has an In concentration between 40-50% or 0.4 <1 - x - y <0.5 and if ternary, ie without Ga admixture realized (y = 0), a corresponding Al concentration of 60-50% (0.5 ≤ x ≤ 0.6), which may contain up to a small proportion Ga of up to 20% (y ≤ 0.2).

Such a layer may be made by metalorganic vapor phase epitaxy (MOCVD, MOVPE) or other semiconductor deposition techniques such as molecular beam epitaxy MBE, hydride vapor phase epitaxy (HVPE) or sputtering, and here the process is described in terms of the MOVPE methods currently in use for the group III nitrides , For this purpose, an ideally previously deoxidized and hydrogen-terminated silicon substrate is placed in the MOVPE reactor and heated to about 670 ° C under hydrogen or nitrogen carrier gas.

The coating process then takes place ideally at a pressure of about 100 mbar, after the carrier gas has been switched to nitrogen, starting with the introduction of trimethylaluminum (TMAI), optionally also trimethyl-indium (TMIn) and optionally an n-type dopant, such as silicon or germanium, e.g. B. by SiH ₄ - or GeH ₄ supply to the reactor for about 10 s, followed by ammonia. It is then grown for about 10 minutes a layer of AlInN, which is about 10 nm thick is. The dopant in the AlInN layer can also be connected to the ammonia in the reactor, this is possible with identical results.

Also, a prior coating of the substrate with Si or Ge or combinations thereof is conceivable. Thus, a p-layer can also be grown epitaxially or the surface and / or contact properties can be improved by the growth of a layer of Si, Ge or SiGe.

After the growth of the AlInN layer, the supply of TMAl and TMIn is terminated and trimethyl gallium (TMGa) and TMIn are passed to the layer with a dopant, usually an n-dopant, in the reactor 103 and subsequent layers to grow. However, it is also possible to introduce a p-dopant in order to realize a lower n-AlInN / p-GalnN cell. In this case, the layer should 102 be at least 50 nm thick.

To adjust the composition, the In supply can remain in the period of the growth interruption in order to obtain the most existing in-enrichment layer on the surface of the layer and thus to keep the incorporation constant. As a rule, no InN grows in this procedure because it has too high a vapor pressure, which means it is unstable.

For the realization of a solar cell on n-silicon, an n-type silicon substrate is inserted into a coating system, such as molecular beam epitaxy (MBE) or metalorganic vapor phase epitaxy (MOVPE, MOCVD). This was ideally first wet-chemically deoxidized and hydrogen terminated by hydrofluoric acid etching; However, this can also be done by heating in the reactor.

The substrate is then heated and growth of the seed layer started by introducing the Group III precursors. These do not necessarily have to be initiated simultaneously, depending on the process control, for example, aluminum can be introduced beforehand since this diffuses well into the silicon and produces a p-type surface layer desired in this example. However, the early introduction of indium may also be beneficial to achieve in-enrichment. This is important in order to achieve a homogeneous AlInN concentration of the seed layer from the outset.

Therefore, a process can provide either the simultaneous initiation of the elements, the successive switching on or z. For example, an Al initiation for p-layer formation followed by sole introduction of indium for enrichment, followed by opening of the aluminum source and generally the nitrogen feedstock. The seed layer is then grown ideally 10 to 20 nm thick.

In principle, a 1 nm thick AlInN layer is sufficient, but a layer thickness of more than 5 nm is advantageous. Ideally, the layer is closed, so that the subsequent GaInN layer can not come into contact with the substrate, as in crater formation in the seed layer or island growth of the Case could be. This covering of the substrate, which is as closed as possible, essentially requires the desired layer thickness.

The seed layer is ideally n-type doped, which is generally very well achieved by means of silicon or germanium. This can be a in 2 schematically shown course of the bandgap energy E over the coordinate x, which in this case from the substrate to the group III nitride layer runs to achieve a layer sequence, which ensures a low resistance across the group IV / group III nitride interface. Here E _c , the conduction band, E _F the Fermi level and E _V the valence band in the group-IV substrate 201 and the subsequent germ layer 202 ,

The subsequent GaInN layer is then grown at nearly the same temperature. Here, the advantage lies in the procedure that AlInN has a higher incorporation than GaInN and the higher In content in AlInN compared to GaInN, the bandgap energies are comparable.

In the realization of a vertical diode, z. B. for power devices, in an advantageous embodiment, an AlGaInN seed layer 102 with a bandgap energy below that of the next layer 103 used. This allows no additional energy barriers interfering with the charge carrier transport to be present in the buffer structure.

Also useful is a graded transition from AlInN to GaInN, which allows a gradual change in conduction and valence band energies, thus minimizing the series resistance. This is schematically in the example in 3 also shown here, the bandgap energy E is plotted against the coordinate x, which in this case runs from the substrate to the group III nitride layer. Starting from the silicon substrate 301 becomes an AlInN layer 302 grown, which then via AlGaInN 303 to GaInN 304 is graded. The In content decreases and the band gap energy increases overall.

Enhancement of the gradient can also be achieved by slightly increasing the temperature during growth or reducing the in-feed.

An increasing Ga content offers the possibility of realizing an increasing lattice constant of the material and thus also advantageously producing a slightly compressive bias, which counteracts the formation of cracks during the growth of thick layers. After this buffer, the material of choice for the device follows: thus, a gradient up to GaN may be useful for realizing a vertically contacted high voltage switch with a high quality GaN n / p diode, but also a GaInN based high current switch is included Configuration feasible.

4 shows the cross section of the layer structure of a directly on silicon 401 grown InGaN layer 402 in the transmission electron microscope. Clearly, the holes are here 403 in the region of the silicon substrate, which are triggered by the meltback etching. The number of these holes can be significantly reduced or eliminated by the method according to the invention, which leads to an improved layer quality.

Components according to the invention can also be other than the examples listed here and can be produced with all methods for semiconductor deposition. Thus, in particular, an n-Si or n-Ge / AlGaInN transition makes sense for some components or can also lead to low series resistances given suitable bandgap energy of the group III nitride. In principle, no epitaxial growth is assumed in the production of the layers, even if this is generally advantageous for the device properties.

In addition, the layers may also contain low concentrations of other group V elements. So z. For example, the growth of AlInN starting from an AlInAs layer that is converted to AlInN by nitridation is also a useful way to obtain the devices of this invention.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited non-patent literature

• Ager et al. [Joel W. Ager III, et al., Phys. Status Solidi C 6, S413 (2009) [0004]
• Chapter IV by A. Dadgar in III-V Compound Semiconductor: Integration with Silicon-based Microelectronics, editors T. Li, M. Mastro, and A. Dadgar (CRC Press, Boca Raton, FL, 2010). [0005]
• Joel W. Ager III, et al., Phys. Status Solidi C 6, S413 (2009) [0006]
• Chapter IV by A. Dadgar in III-V Compound Semiconductor: Integration with Silicon-based Microelectronics, Editors T. Li, M. Mastro, and A. Dadgar (CRC Press, Boca Raton, FL, 2010). [0006]
• Dadgar et al., New Journal of Physics 9, 389 (2007) [0012]
• Reiher, et al., Journal of Crystal Growth 312, 180 (2010). [0012]

Claims (8)

Group III nitride-based layer sequence ( 100 ), at least comprising an Al _x Ga _y In _1-xy N-based seed layer ( 102 ) and an Al _x Ga _y In _1-xy N layer ( 103 ) on a Group IV substrate ( 101 ) with x <0.2 and x + y ≦ 1, where the Al _x Ga _y In _1-xy N seed layer ( 102 ) on the substrate ( 101 ) and x> 0.2. Layer sequence according to claim 1, characterized by a group III nitride layer sequence, which is arranged on a p-type substrate surface. Layer sequence according to Claim 1 or 2, characterized by an AlGaInN seed layer ( 102 ) with a bandgap energy below the next layer ( 103 ) lies. Layer sequence according to one of the preceding claims, characterized by the growth of a seed layer ( 102 ) in the system Al _x Ga _y In _1-xy N with y <0.2. Layer sequence according to one of the preceding claims, characterized by the use of these in a diode. Layer sequence according to one of the preceding claims, characterized by the use of these in a photovoltaic cell. Component with a Group III Nitride-Based Layer Sequence ( 100 ), at least comprising an Al _x Ga _y In _1-xy N-based seed layer ( 102 ) and an Al _x Ga _y In _1-xy N layer ( 103 ) on a Group IV substrate ( 101 ), which contains x <0.2, where the Al _x Ga _y In _1-xy N seed layer ( 102 ) on the substrate ( 101 ) and has at least x> 0.2. Process for producing a group III nitride-based layer sequence ( 100 ), comprising at least the following steps: - providing a group IV substrate ( 101 ) - Producing an oxide-free group IV substrate surface - Application of an Al _x Ga _y In _1-xy N-based seed layer ( 102 ) with x> 0.2 on the substrate ( 101 ) and - applying at least one further Al _x Ga _y In _1-xy N layer ( 103 ) with x <0.2 on the seed layer ( 102 ).

Images