DE102008014113B4 - Power semiconductor module in pressure contact design - Google Patents
Power semiconductor module in pressure contact design Download PDFInfo
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- DE102008014113B4 DE102008014113B4 DE102008014113.5A DE102008014113A DE102008014113B4 DE 102008014113 B4 DE102008014113 B4 DE 102008014113B4 DE 102008014113 A DE102008014113 A DE 102008014113A DE 102008014113 B4 DE102008014113 B4 DE 102008014113B4
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
- H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
Leistungshalbleitermodul (1) in Druckkontaktausführung zur Anordnung auf einem Kühlbauteil (2), mit mindestens einem Substrat (5), mindestens einem hierauf angeordneten Leistungshalbleiterbauelement (60), einem Gehäuse (3) und nach außen führenden Last- (80, 42, 44) und Steueranschlusselementen und mit einer Druckeinrichtung (70), wobei das Substrat (5) einen Grundkörper (52) aufweist und auf dessen erster dem Inneren des Leistungshalbleitermoduls zugewandten Hauptfläche Leiterbahnen (54) mit Lastpotential angeordnet sind, wobei mindestens ein Lastanschlusselement als Metallformkörper mit mindestens einem ersten Kontaktelement (804, 404), einem bandartigen Abschnitt (802) und mit von diesem ausgehenden zweiten Kontaktelementen (820, 822, 824) ausgebildet ist, der bandartige Abschnitt parallel zur Substratoberfläche und von dieser beabstandet angeordnet ist und die zweiten Kontaktelemente von dem bandartigen Abschnitt zum Substrat (5) reichen und dieses schaltungsgerecht kontaktieren, und wobei die zweiten Kontaktelemente (820, 822, 824) als materialeinstückig mit dem bandartigen Abschnitt ausgebildete freigestellte Kontaktnasen (824) ausgebildet sind, wobei schlitzartige Ausnehmungen zur Freistellung der Kontaktnasen in Stromrichtung oder unter einem Winkel von maximal 15° angeordnet sind, um einen im Wesentlichen unterbrechungsfreien Stromfluss zu gewährleisten, wobei die bandartigen Abschnitte (802, 422, 442) der Lastanschlusselemente (80, 42, 44) einen Stapel bilden und wobei die bandartigen Abschnitte (802, 422, 442) der einzelnen Lastanschlusselemente (80, 42, 44) jeweils eine isolierende Zwischenlage (46) aufweisen.Power semiconductor module (1) in pressure contact design for arrangement on a cooling component (2), with at least one substrate (5), at least one power semiconductor component (60) arranged thereon, a housing (3) and load (80, 42, 44) leading to the outside and control connection elements and with a printing device (70), the substrate (5) having a base body (52) and conductor tracks (54) with load potential being arranged on its first main surface facing the interior of the power semiconductor module, with at least one load connection element as a molded metal body with at least one first contact element (804, 404), a band-like section (802) and with second contact elements (820, 822, 824) extending therefrom, the band-like section is arranged parallel to and spaced from the substrate surface and the second contact elements from the band-like Extend section to the substrate (5) and contact this circuit-appropriate, u nd wherein the second contact elements (820, 822, 824) are designed as exposed contact lugs (824) formed in one piece with the strip-like section, slot-like recesses for exposing the contact lugs being arranged in the direction of flow or at an angle of a maximum of 15 ° to provide a To ensure a substantially uninterrupted flow of current, the ribbon-like sections (802, 422, 442) of the load connection elements (80, 42, 44) forming a stack and the ribbon-like sections (802, 422, 442) of the individual load connection elements (80, 42, 44 ) each have an insulating intermediate layer (46).
Description
Die Erfindung beschreibt ein gehaustes Leistungshalbleitermodul in Druckkontaktausführung mit Last- und Hilfsanschlusselementen zur Anordnung auf einem Kühlbauteil.The invention describes a housed power semiconductor module in pressure contact design with load and auxiliary connection elements for placement on a cooling component.
Einen Ausgangspunkt der Erfindung bilden Leistungshalbleitermodule wie sie beispielhaft aus der
Ebenfalls bekannt sind Druck kontaktierte Leistungshalbleitermodule, wie sie aus der
Mittels einer derartigen Druckeinrichtung wird das Substrat auf ein Kühlbauteil gedrückt und somit der Wärmeübergang zwischen dem Substrat und dem Kühlbauteil dauerhaft sicher hergestellt. Das elastische Kissenelement dient hierbei der Aufrechterhaltung konstanter Druckverhältnisse bei unterschiedlichen thermischen Belastungen und über den gesamten Lebenszyklus des Leistungshalbleitermoduls.By means of such a pressure device, the substrate is pressed onto a cooling component and thus the heat transfer between the substrate and the cooling component is made permanently secure. The elastic cushion element serves to maintain constant pressure conditions at different thermal loads and over the entire life cycle of the power semiconductor module.
Aus der
Aus der
Aus der
Die
Nachteilig an den Leistungshalbleitermodulen nach dem bisher genannten Stand der Technik ist, dass die von den Lastanschlusselementen ausgehenden Kontaktelemente durch ein Stanz-Biege-Verfahren einstückig aus dem Material des Lastanschlusselements ausgestaltet werden. Dadurch werden das Materialvolumen und damit einhergehend die Stromtragefähigkeit des Lastanschlusselements vermindert.A disadvantage of the power semiconductor modules according to the previously mentioned prior art is that the outgoing of the load connection elements contact elements are designed by a punch-bending process in one piece from the material of the load connection element. As a result, the material volume and, concomitantly, the current carrying capacity of the load connection element are reduced.
Diese Verminderung der Stromtragefähigkeit wird insbesondere dann erheblich, wenn der Stanz- und Biegevorgang zur Anordnung der Kontaktelemente den mittleren Flächenbereich des Lastanschlusselements betrifft (siehe den Stand der Technik in
Der Erfindung liegt die Aufgabe zugrunde ein Leistungshalbleitermodul in Druckkontaktausführung mit Lastanschlusselementen und ihnen zugeordneten Kontaktelementen zum Substrat vorzustellen, wobei die Stromtragefähigkeit mindestens eines Lastanschlusselements verbessert wird und die Ausbildung der Kontaktelemente einer einfachen und kostengünstigen Herstellung zugänglich ist.The invention has for its object to present a power semiconductor module in pressure contact design with load connection elements and their associated contact elements to the substrate, the current carrying capacity of at least one load connection element is improved and the formation of the contact elements of a simple and inexpensive production is accessible.
Die Aufgabe wird erfindungsgemäß gelost durch die Maßnahmen der Merkmale des Anspruchs 1. Eine bevorzugte Ausführungsform ist im Unteranspruch beschriebenThe object is achieved by the measures of the features of
Der erfinderische Gedanke geht aus von einer Anordnung eines Leistungshalbleitermoduls in Druckkontaktausführung auf einem Kühlbauteil mit mindestens einem Substrat, mindestens zwei hierauf angeordneten Leistungshalbleiterbauelementen, beispielhaft Leistungstransistoren, einem Gehäuse und nach außen führenden Last- und Steueranschlusselementen. Das Substrat selbst weist einen Grundkörper und auf dessen erster, dem Inneren des Leistungshalbleitermoduls zugewandten Hautfläche Leiterbahnen mit Lastpotential auf. Weiterhin weist das Substrat vorzugsweise auch mindestens eine Leiterbahn mit Steuerpotential zu Ansteuerung der Leistungshalbleiterbauelemente auf.The inventive concept is based on an arrangement of a power semiconductor module in pressure contact design on a cooling component having at least one substrate, at least two power semiconductor components arranged thereon, power transistors by way of example, a housing and load and control connection elements leading to the outside. The substrate itself has a main body and on its first, the interior of the power semiconductor module facing skin surface tracks with load potential. Furthermore, the substrate preferably also has at least one conductor track with control potential for driving the power semiconductor components.
Das Leistungshalbleitermodul weist weiterhin Lastanschlusselemente jeweils ausgebildet als Metallformkörper mit einem ersten Kontaktelement, einem bandartigen Abschnitt und mit einer Mehrzahl von diesem ausgehenden zweiten Kontaktelementen auf. Die jeweiligen bandartige Abschnitte sind parallel zur Substratoberfläche und von dieser beabstandet angeordnet. Die zweiten Kontaktelemente, die von dem bandartigen Abschnitt ausgehen reichen zum Substrat und bilden dort schaltungsgerecht die Kontaktierung der Lastanschlüsse aus. Vorzugsweise kontaktieren sie hierzu auf dem Substrat die Leiterbahnen mit Lastpotential, alternativ auch direkt die Leistungshalbleiterbauelemente.The power semiconductor module further has load connection elements each formed as a metal molded body with a first contact element, a band-like portion and a plurality of this outgoing second contact elements. The respective ribbon-like portions are arranged parallel to the substrate surface and spaced therefrom. The second contact elements, which extend from the band-like portion extend to the substrate and there form the circuit of contacting the load terminals. For this purpose, they preferably contact the printed conductors with load potential on the substrate, alternatively alternatively directly the power semiconductor components.
Erfindungsgemäß ist hierbei mindestens ein Lastanschlusselement derart ausgestaltet, dass die Kontaktelemente in Richtung des Substrates als freigestellte Kontaktnasen ohne Materialunterbrechung in Stromflussrichtung ausgestaltet sind. Hierbei ist von Vorteil, dass durch die in Längsrichtung des Stromflusses unterbrechungsfreie Ausgestaltung der Kontaktelemente die Stromtragefähigkeit des Lastanschlusselements nicht nachteilig verringert wird und somit die gesamte Leistungsfähigkeit des Leistungshalbleitermoduls gegenüber dem Stand der Technik erhöht wird. Weiterhin ist von Vorteil, dass die Kontaktnasen durch ihre gewölbte Überspannung größere Kontaktflächen zu den Leiterbahnen des Substrats und somit in Verbindung mit der Druckeinrichtung größere Toleranzen hinsichtlich der sicheren Kontaktierung aufweisen. Somit ist die die Fertigung der erfindungsgemäßen Kontaktelemente einer einfachen und kostengünstigen Herstellung zugänglich.According to the invention, in this case at least one load connection element is configured in such a way that the contact elements in the direction of the substrate are designed as release contact lugs without material interruption in the current flow direction. In this case, it is advantageous that the current carrying capability of the load connection element is not adversely reduced by the design of the contact elements in the longitudinal direction of the current flow and thus the overall performance of the power semiconductor module is increased over the prior art. Furthermore, it is advantageous that the contact lugs have greater contact surfaces with respect to the conductor tracks of the substrate and thus in conjunction with the printing device greater tolerances with respect to the secure contact by their curved overvoltage. Thus, the manufacture of the contact elements according to the invention a simple and inexpensive production is accessible.
Weiterhin bilden die Lastanschlusselemente einen Stapel, wobei hierbei zwischen jeweils benachbarten Lastanschlusselementen im Bereich der jeweiligen bandartigen Abschnitte eine isolierende Zwischenlage angeordnet ist.Furthermore, the load connection elements form a stack, wherein in this case an insulating intermediate layer is arranged between respectively adjacent load connection elements in the region of the respective strip-like sections.
Die erfinderische Lösung wird an Hand der Ausführungsbeispiele der
Die Lastanschlusselemente (
Die Druckeinrichtung (
Die dem Substrat zugewandten Endflächen (
Claims (2)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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DE102008014113.5A DE102008014113B4 (en) | 2008-03-13 | 2008-03-13 | Power semiconductor module in pressure contact design |
EP09002485A EP2101352A3 (en) | 2008-03-13 | 2009-02-21 | Semiconductor module with pressure contact configuration |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE102008014113.5A DE102008014113B4 (en) | 2008-03-13 | 2008-03-13 | Power semiconductor module in pressure contact design |
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DE102008014113A1 DE102008014113A1 (en) | 2009-11-05 |
DE102008014113B4 true DE102008014113B4 (en) | 2014-04-03 |
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DE102008014113.5A Active DE102008014113B4 (en) | 2008-03-13 | 2008-03-13 | Power semiconductor module in pressure contact design |
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Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4237632A1 (en) * | 1992-11-07 | 1994-05-11 | Export Contor Ausenhandelsgese | Circuit arrangement |
DE19719703A1 (en) * | 1997-05-09 | 1998-11-12 | Eupec Gmbh & Co Kg | Power semiconductor module with ceramic substrate |
DE19903875A1 (en) * | 1999-02-01 | 2000-08-10 | Semikron Elektronik Gmbh | Inverter in pressure contact |
DE10127947C1 (en) * | 2001-08-22 | 2002-10-17 | Semikron Elektronik Gmbh | Circuit device for power semiconductor module has intermediate circuit board with DC and AC terminals coupled to conductor paths of substrate incorporated in base body |
DE10221085A1 (en) * | 2002-05-11 | 2003-11-20 | Bosch Gmbh Robert | Connection device for contacting a semiconductor component |
EP1367643A2 (en) * | 2002-05-15 | 2003-12-03 | Tyco Electronics AMP GmbH | Electronic module |
DE10355925A1 (en) * | 2003-11-29 | 2005-06-30 | Semikron Elektronik Gmbh | Power semiconductor module and method of its manufacture |
DE102004035267B3 (en) * | 2004-07-21 | 2006-02-09 | Forschungszentrum Karlsruhe Gmbh | Shaped body, process for its preparation and its use |
DE102005030247A1 (en) * | 2005-06-29 | 2007-01-11 | Semikron Elektronik Gmbh & Co. Kg | Housing of power semiconductor module with outwards coupling members contains insulating substrate, whose main surface away from base plate, carries mutually insulated coupling tracks |
DE102006006423A1 (en) * | 2006-02-13 | 2007-08-23 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module and associated manufacturing method |
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2008
- 2008-03-13 DE DE102008014113.5A patent/DE102008014113B4/en active Active
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2009
- 2009-02-21 EP EP09002485A patent/EP2101352A3/en not_active Withdrawn
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4237632A1 (en) * | 1992-11-07 | 1994-05-11 | Export Contor Ausenhandelsgese | Circuit arrangement |
DE19719703A1 (en) * | 1997-05-09 | 1998-11-12 | Eupec Gmbh & Co Kg | Power semiconductor module with ceramic substrate |
DE19903875A1 (en) * | 1999-02-01 | 2000-08-10 | Semikron Elektronik Gmbh | Inverter in pressure contact |
DE10127947C1 (en) * | 2001-08-22 | 2002-10-17 | Semikron Elektronik Gmbh | Circuit device for power semiconductor module has intermediate circuit board with DC and AC terminals coupled to conductor paths of substrate incorporated in base body |
DE10221085A1 (en) * | 2002-05-11 | 2003-11-20 | Bosch Gmbh Robert | Connection device for contacting a semiconductor component |
EP1367643A2 (en) * | 2002-05-15 | 2003-12-03 | Tyco Electronics AMP GmbH | Electronic module |
DE10355925A1 (en) * | 2003-11-29 | 2005-06-30 | Semikron Elektronik Gmbh | Power semiconductor module and method of its manufacture |
DE102004035267B3 (en) * | 2004-07-21 | 2006-02-09 | Forschungszentrum Karlsruhe Gmbh | Shaped body, process for its preparation and its use |
DE102005030247A1 (en) * | 2005-06-29 | 2007-01-11 | Semikron Elektronik Gmbh & Co. Kg | Housing of power semiconductor module with outwards coupling members contains insulating substrate, whose main surface away from base plate, carries mutually insulated coupling tracks |
DE102006006423A1 (en) * | 2006-02-13 | 2007-08-23 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module and associated manufacturing method |
Also Published As
Publication number | Publication date |
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DE102008014113A1 (en) | 2009-11-05 |
EP2101352A3 (en) | 2011-04-20 |
EP2101352A2 (en) | 2009-09-16 |
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