DE102005060876A1 - Sensor and production process has connected carrier and sensor substrates with metal-free sensor region arranged over a recess in the carrier substrate - Google Patents

Abstract

A sensor (10) comprises a carrier substrate (20) and a sensor substrate (30) having a sensor region (31) and a mounting region (32) connected to the carrier substrate. At least part of the sensor region is arranged opposite a recess (21) in the carrier substrate and the sensor substrate is free of metal, at least in the sensor region. An independent claim is also included for a production process for the sensor above.

Description

State of technology

The invention relates to a sensor arrangement according to the preamble of the main claim. From the German patent application DE 10 2004 011 203 A1 a method for mounting semiconductor chips and a corresponding semiconductor device is known, wherein a sensor substrate is mounted on a carrier substrate. In this structure, bonding wires for realizing, for example, a pressure sensor is dispensed with. The soldering points of the flip-chip connection are protected by a passivation means (underfill) in the region of the connection of the sensor substrate to the carrier substrate. As a result, no open metal is exposed to the attack of corrosive media. Due to the so-called free-floating structure of the sensor substrate at least in the sensor area, mechanical stresses introduced by the mounting can be avoided. The disadvantage here is that the media resistance of a conventionally used passivation can not be guaranteed to a sufficient extent over the entire service life. Integrated circuits usually have a metallization. For sensors that are exposed to an external (aggressive) medium, a relatively corrosion-resistant metallization, for example of gold, could be used to avoid the known disadvantages. However, such metallizations are generally not compatible with other semiconductor fabrication processes because minimal contaminants could destroy the function of such devices.

advantages the invention

The inventive sensor arrangement with a carrier substrate and a sensor substrate and the method for producing a inventive sensor arrangement has in contrast the advantage of having greater media resistance the sensor arrangement as a whole and in particular of the sensor substrate or the sensor area can be achieved. This is in particular on a metallization during dispensed with the semiconductor process for the preparation of the sensor substrate. This makes it possible a bigger temperature budget for the Processing of the sensor substrate to use. In particular it thereby possible in the essential at the end of Processing of the Sensorubstrats- to realize a passivation layer on the entire outside of the sensor substrate - an oxide layer and / or a nitride layer provided. This can be used in conjunction with flip-chip technology a sensor can be realized that is extremely corrosion resistant. Is preferred in particular according to the invention, that the sensor substrate between the sensor area and the mounting area electrically conductive Having contacting tracks, wherein the electrically conductive contacting tracks are provided as doped regions within the sensor substrate. Because of the absence of metallic contact paths between the sensor area and the mounting area of the sensor substrate it is possible a silicon nitride layer for passivation of the sensor substrate or at least for the passivation of the sensor region of the sensor substrate to use, wherein such a silicon nitride layer by means of a LPCVD process (Low Pressure Chemical Vapor Deposition) applied is. Such a layer offers the advantage of being complete or almost complete can be applied defect-free. As a result, the sensor substrate in particular the sensor region of the sensor arrangement according to the invention extremely resistant towards external media. Furthermore, such a silicon nitride layer is under a comparatively huge Tensile stress of, for example, about 1000 megapascals. This is it is possible in combination with one above or below the silicon nitride layer applied thermal oxide, in particular silicon oxide, which for example, under a compressive stress of about 300 megapascals, an approximate create stress-free layer for passivation of the sensor area. The thickness of such a passivation layer can be controlled to +/- 5% become.

It is according to the invention preferred that the mounting area on only one side of the Sensor area is arranged. This is the passivating or in front of an optionally aggressive medium by means of a Passivierungsmittels (a so-called underfill) to be protected mounting area of the sensor substrate comparatively small and compact, so that the Passivation is comparatively easy to achieve and on the other hand also comparatively permanently preserved. The only On one side of the sensor area provided mounting area brings However, it is with that for provided a crossing-free design of the contacting tracks must be if they are intended as a doping. This is According to the invention in a simple Way feasible by the fact that the contacting tracks at least partly by a sensor structure, for example a membrane structure, pass through. Alternatively, the connecting cables be provided such that the connections for the bridge supply lines and the connections for the Messabgriffe entangled are arranged.

According to the invention, it is preferred that the sensor region has a sensor structure, in particular a pressure sensor membrane. This makes it possible according to the invention, in particular, a sensor accessible to media sensor in the sensor integration. A typical example is a pressure sensor in which at least on one side of a membrane, the pressure must be applied through a medium whose pressure is to be measured.

It is according to the invention further preferred that at least the sensor area, preferably the whole Sensor substrate, by means of a silicon nitride layer and additionally by means of is provided passivated a silicon oxide layer. hereby is it still possible the passivation of the sensor area within the sensor substrate to improve.

According to the invention is still preferred that the sensor substrate oxidized at least in the sensor area is provided, in particular on a side facing away from the carrier substrate is provided oxidized. This is also an improved passivation the back the sensor substrate possible, which allows more degrees of freedom in the process.

Further is preferred according to the invention, that the contacting tracks of the sensor substrate by means of a Flip-chip connection technology contacted to the carrier substrate are. This causes a great strength the connection between the carrier substrate and the sensor substrate at the same time good Passivierungsmöglichkeit through a passivation agent and comparatively low process costs.

One Another object of the present invention is a method for producing a sensor arrangement according to the invention, wherein in a first step, the sensor substrate is structured and wherein in a second step, the sensor substrate for passivation is oxidized at least in the sensor area. Under an oxidation is in this context in particular a thermal oxidation Understood. By such an oxidation step, usually Temperatures in the range between 500 ° C and 1000 ° C requires, it is particular possible, the material of the sensor substrate, in particular a silicon material, resistant to basic media.

Further it is preferred that for passivation of the sensor substrate at least in the sensor area one by means of an LPCVD method (Low Pressure Chemical Vapor Deposition) applied applied silicon nitride layer becomes. This can further improve the passivation and thereby extension the operating time of the sensor arrangement can be achieved.

drawings

embodiments The invention are illustrated in the drawing and in the following description explained in more detail.

Show it

1 a schematic representation of a sensor arrangement according to the invention in a perspective view,

2 a schematic side view of a conventionally used sensor array,

3 a schematic side view of a sensor arrangement according to the invention,

4 to 8th schematic sectional views of precursor structures of a sensor substrate of the sensor arrangement according to the invention,

9 a schematic representation of the arrangement of contacting paths in a square pressure sensor membrane and in a conventional sensor arrangement,

10 a schematic representation of contacting tracks in a square diaphragm according to the sensor arrangement according to the invention,

11 a schematic representation of Kontaktierungsbahnen in a rectangular membrane and a conventional sensor array and

12 a schematic representation of the contacting tracks in a rectangular diaphragm and a sensor arrangement according to the invention.

In 1 is a schematic perspective view of a sensor arrangement according to the invention 10 with a carrier substrate 20 and a sensor substrate 30 shown. The sensor substrate 30 includes a sensor area 31 and a mounting area 32 , In the assembly area 32 is the sensor substrate 30 with the carrier substrate 20 connected. For this purpose, a connecting and contacting material is shown schematically 25 or a connecting means 25 as used in the flip-chip technique for connecting substrates or for mounting semiconductor devices on printed circuit boards or the like. The connecting means 25 is particularly provided as a plurality of so-called flip-chip solder bumps. In the assembly area 32 is also a passivating agent 34 provided, which the connecting means 25 protects against the influences of a medium, not shown, which in the sensor area 31 Access to the sensor substrate and in particular to a sensor structure 33 within the sensor area 31 Has. The sensor structure 33 is according to the invention in particular especially as a pressure sensor membrane 33 intended. However, it may in the sensor arrangement according to the invention 10 also a different sensor structure 33 act as a pressure sensor membrane. For example, it may be a structure for determining a level or the like. The sensor area 31 of the sensor substrate 30 is, so to speak, free floating relative to the carrier substrate 20 arranged. This makes it possible, mechanical stress forces, which by the mounting of the sensor substrate 30 on the carrier substrate 20 inevitably (for example due to different temperature coefficients and the like) on the sensor substrate 30 to be kept as far as possible from the sensor structure, so that it can be operated independently of such material stresses, which leads to an improvement of the sensor properties of this sensor structure. The sensor substrate 30 thus indicates a carrier substrate 20 facing side 30a and a carrier substrate 20 opposite side 30b on. According to the invention, it is in particular such that the main extension plane of the carrier substrate and the main extension plane of the sensor substrate 30 essentially parallel to each other. In an area on the carrier substrate 20 which is the sensor substrate 30 and in particular a part of the sensor area 31 of the sensor substrate 30 opposite, has the carrier substrate 10 a recess 21 on which is intended, a stop edge 22 for the passivating agent 34 to build. It is such that after the attachment of the sensor substrate 30 on the carrier substrate 20 by means of the bonding agent 25 the passivating agent 34 exactly in the area between the connection means 25 is to bring. Because of a possible capillary action in the space between the carrier substrate 20 and the sensor substrate 30 It can do this without the presence of a stop edge 22 happen that the passivating agent 34 uncontrolled also in the sensor area 31 enters and there is a connection between the carrier substrate 20 and the sensor substrate 30 produces what should be avoided as possible due to the desired decoupling of mechanical stress stress for the sensor structure. According to the invention, the passivating agent 34 for example, an epoxy resin, so that it is at the stop edge 22 can be an epoxy resin stop edge.

In 2 is a sectional view of a conventionally known sensor arrangement is shown, wherein also a decoupling between a sensor structure 33 in a sensor area 31 by the mounting of the sensor substrate 30 in a mounting area 32 he follows. Also in the known sensor arrangement is the mounting area 32 via a connecting means 25 with the carrier substrate 20 connected, wherein the connecting means 25 by means of a passivating agent 34 is passivated. In the known sensor arrangement, it is disadvantageous that conventionally used contacting tracks 350 are provided of metal, which is an electrical contact between parts of the sensor area 31 and within the assembly area 32 arranged connecting points, via which a contact with the carrier substrate 20 he follows.

In 3 is a sensor arrangement according to the invention 10 shown, wherein the sensor substrate 30 turn the sensor area 31 , the assembly area 32 and the sensor structure 33 having, as a rule, below or above a pressure sensor membrane 33 provided sensor structure 33 a cavity 33a in the sensor area 31 is available. Pressure fluctuations can then by means of a piezoresistive element 33b be detected as the actual sensor element. For this purpose, an electrical contacting of these piezoresistive areas 33b with connection points within the mounting area 32 necessary, this electrical contacting according to the invention by means of electrically conductive contacting tracks 35 takes place, these contacting tracks 35 as doped regions within the sensor substrate 30 are provided. The contacting tracks 35 In this case, for example, they can be realized by a positive doping or a negative doping within a surrounding oppositely doped substrate material. The decisive factor is essentially that a sufficiently low-resistance, electrically conductive contact between the locations of the sensor structure 33 (in the example the piezoresistive elements 33b ) and contact points (also Bondlands 35a called) within the assembly area 32 via which an attachment and electrical contacting of the sensor substrate 30 to the carrier substrate 20 takes place. For contacting between the contacting tracks 35 and the carrier substrate 20 is again the fastener 25 provided, which by means of the passivating agent 34 before influences in the area, for example, between the carrier substrate 20 and the carrier substrate 20 facing side 30a of the sensor substrate 30 is available. To passivate the entire sensor substrate 30 to get this, this has a passivation layer 38 on. According to the invention, this passivation layer comprises in particular a silicon nitride layer which is applied by means of an LPCVD (Low Pressure Chemical Vapor Deposition) method. According to the invention, it can furthermore be provided that the passivation layer 38 in addition to the silicon nitride layer or alternatively to the silicon nitride layer has a silicon oxide layer, which is in particular a protection of the sensor substrate before alkaline reacting media. In 3 is merely indicated that even within the carrier substrate 20 one or a plurality of conductor tracks is provided to the elektri signals of the sensor substrate 30 forward. Furthermore, it can be provided that within the sensor substrate 30 and / or within the carrier substrate 20 an evaluation circuit (not shown) for the evaluation of the sensor structure 33 provided signals is provided. In the embodiment of the sensor arrangement according to the invention 10 has the sensor substrate 30 for the contacting tracks 35 no use of a metal before, the contacting tracks are therefore provided metal-free. This makes it possible, after the micromechanical structuring of the sensor structure 33 within the sensor substrate 30 To perform high-temperature processes, such as thermal oxidation or the like, which would not be possible in the presence of metals. For example, it is also possible for the carrier substrate 20 opposite side 30b of the sensor substrate 30 to oxidize and thus more resistant to basic media in particular.

In the 4 to 8th are precursor structures for such an embodiment of a sensor substrate 30 shown. In 4 is the sensor substrate 30 with a silicon oxide layer 37 shown on which a silicon nitride layer 36 is applied ( 5 ). Subsequently, a backside process for introducing a recess takes place 39 on the carrier substrate 20 opposite side 30b of the sensor substrate 30 ( 6 ). Subsequently, as the last step before the completion of the sensor substrate 30 a thermal oxidation of the sensor substrate 30 , whereby in the previously exposed areas of the recess 39 a passivating oxide layer 37 is newly formed ( 7 ). In 8th is only the newly formed oxide layer 37 in the area of the later to be applied lanyard 25 (dashed lines indicated) of the mounting area 32 away ( 8th ). Overall results at least in the sensor area 31 of the sensor substrate 30 a continuous passivation by means of a passivation layer 38 , which in the example, at least in the largest areas of the sensor area 31 from the silicon nitride layer 36 and the silicon oxide layer 37 composed.

In 9 is the track guidance in a conventional sensor arrangement in the case of a square diaphragm 33 shown schematically. High-impedance piezoresistors 33b are over a positive voltage supply 51 , a negative voltage supply 52 , a positive voltage tap 53 and a negative voltage tap 54 connected in a known manner (for formation) of a Wheatstone bridge circuit.

In 10 is an embodiment of a wiring for the sensor arrangement according to the invention 10 in the case also a square membrane 33 also shown in the case of high-resistance piezoresistors 33b the contacting tracks 35 as doped areas for the most part also within the membrane area 33 are arranged. Again, the voltage taps 51 to 54 according to the 9 provided, ie on one side of the sensor area 31 of the sensor substrate 30 , Around the sensor area 31 and the (contactable) mounting area 32 To separate, all bondlands must 35a (see. 3 ) on one side of the sensor substrate 30 lie. The contacting tracks 35 must be conducted accordingly.

In 11 For a conventional, ie known sensor arrangement by means of metallic interconnects, the wiring arrangement for the case of a rectangular membrane is shown. In turn, the piezoresistive elements are indicated 33b , which are provided high impedance. The metallic interconnects are crossed over at least at one point, which is the case with the contacting paths according to the invention 35 as doped areas is not possible.

In 12 For example, in the case of a rectangular diaphragm, an arrangement scheme of the contacting tracks is shown 35 for the sensor arrangement according to the invention 10 shown. Again, the piezoresistive areas 33b as hochomige areas schematically recognizable. Furthermore, the four leads 51 to 54 shown.

In the area of Bondlands 35a For example, metallization, such as aluminum metallization, may be necessary. This is the only area of the contacting tracks 35 , which is mandatory to metallize. Since the bondland dimensions are in the range of 100 microns in diameter, a metallization by means of shadow mask is possible. Thereby it is also possible that the metallization under the Bondlands 35a can also consist of other materials such as aluminum, aluminum silicon (AlSi), AlSiCu, CrAu or TiAu. Further optimization can be achieved by the metallization of Bondlands 35a in an electroplating process.

In the in the 10 and 12 shown examples of wiring of the terminals according to the invention 51 to 54 to the piezo areas 33b It is so that this wiring is done without crossing. Since according to the invention, for example, sensors are detectable via a bridge detuning, at least two lines for the supply voltage and two measuring lines are necessary. A crossing-free arrangement of the wiring according to the invention is possible when alternating connections for the supply line and connections for the test leads. The membrane 33 is in this invention as Area used for wiring. It is favorable if the lines carrying a supply voltage are made wider, which reduces their resistance values and thus the total resistance relative to the piezoelements 33b reduced. No current flows in the measuring lines in the bridge circuits given by way of example (in the case of an electroless or high-impedance evaluation, for example by means of an operational amplifier), so that less care must be taken to keep these lines low-resistance.

Claims (11)

Sensor arrangement ( 10 ) with a carrier substrate ( 20 ) and with a sensor substrate ( 30 ), wherein the sensor substrate ( 30 ) a sensor area ( 31 ) and a mounting area ( 32 ), wherein the sensor substrate ( 30 ) in the assembly area ( 32 ) with the carrier substrate ( 20 ) is connected such that at least a part of the sensor area ( 31 ) with respect to one in the carrier substrate ( 20 ) recess ( 21 ), characterized in that the sensor substrate ( 30 ) at least in the sensor area ( 31 ) is provided metal-free. Sensor arrangement ( 10 ) according to claim 1, characterized in that the sensor substrate ( 30 ) between the sensor area ( 31 ) and the mounting area ( 32 ) electrically conductive contacting tracks ( 35 ), wherein the electrically conductive contacting tracks ( 35 ) as doped regions within the sensor substrate ( 30 ) are provided. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the mounting area ( 32 ) on only one side of the sensor area ( 31 ) is arranged. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the sensor area ( 31 ) a sensor structure ( 33 ), in particular a pressure sensor membrane ( 33 ) having. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the electrically conductive contacting tracks ( 35 ) in the sensor area ( 31 ) by means of a LPCVD (Low Pressure Chemical Vapor Deposition) silicon nitride layer ( 36 ) are provided passivated. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the electrically conductive contacting tracks ( 35 ) in the sensor area ( 31 ) by means of a silicon nitride layer ( 36 ) and by means of a silicon oxide layer ( 37 ) are provided passivated. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the sensor substrate ( 30 ) at least in the sensor area ( 31 ) is provided oxidized, in particular on its the carrier substrate ( 20 ) facing away ( 30b ) is provided oxidized. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the contacting tracks ( 35 ) of the sensor substrate ( 30 ) by means of a flip-chip connection technology to the carrier substrate ( 20 ) are contacted. Sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that the mounting area ( 32 ) of the sensor substrate ( 30 ) by means of a passivating agent ( 34 ) is provided passivated. Method for producing a sensor arrangement ( 10 ) according to one of the preceding claims, characterized in that in a first step the sensor substrate ( 30 ) and that in a second step the sensor substrate ( 30 ) for passivation at least in the sensor area ( 31 ) is oxidized. Method according to claim 10, characterized in that for the passivation of the sensor substrate ( 30 ) at least in the sensor area ( 31 ) a silicon nitride layer (LPCVD method (Low Pressure Chemical Vapor Deposition)) ( 36 ) is applied.