DE102004039869A1 - Signal-differentiating method for differentiating between a frequency-/phase-modulated wanted signal and a noise signal in an incoming signal checks for phase noise - Google Patents

Abstract

An incoming signal (SEL) is fed to a limiting amplifier's (LA) (1) input (EL), whose amplification is selected so that a bit-output signal (SAL) with limited amplitude on the LA's output (AL) is checked for phase noise and the incoming signal is classified as a wanted signal, if phase noise output in the SAL falls below a preset threshold. An independent claim is also included for a circuit structure for differentiating between a frequency-/phase-modulated wanted signal and a noise signal in an incoming signal.

Description

The The invention relates to a method and a circuit arrangement for Distinction of a frequency-modulated or phase-modulated Useful signal from a noise signal

at recipients especially radio receivers, is a received frequency modulated or phase modulated Signal demodulated in a first step. The demodulated useful signal is then with the help of a corresponding signal processing device prepared for further use. To meet requirements such as MER (acronym for message Error Rate) or FAR (acronym for False Alarm rate = error rate of detection of data packets from the noise) to ensure, It is necessary to present the beginning of the rule in the form of a data packet Signal as possible to distinguish quickly and clearly from a noise signal.

Out In-house prior art, a method is known, in which a demodulated signal is classified as a useful signal, if its power exceeds a predetermined threshold. This method assumes that the power of the wanted signal is greater than the power of the noise signal is. In a frequency modulated or Phase modulated signal with a small modulation index is this Condition not fulfilled. The Use of this method in a frequency modulated or Phase modulated signal with a small modulation index is therefore eliminated out.

Out the internal state of the art is known, so-called Use correlation method for Nutzsignalerkennung. In such correlation methods will match or similarity a carrier signal carrying the useful signal with a simulated Carrier signal quantified. Will be a match or a high degree of similarity determined, the demodulated signal is classified as a useful signal, otherwise the demodulated signal will be considered a noise signal. To be a reliable To enable detection the signal-to-noise ratio of the received signal must be comparatively be great. Furthermore occurs in data filters that are adapted to the data rate, a large number on misdetections.

From the internal state of the art a detection of a noise power by means of a display of the radio reception strength is also known. This method, from which the invention proceeds, is described below with reference to the drawing in the drawing 5 described circuit arrangement for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal described.

The circuit arrangement known from the prior art comprises a limiter amplifier consisting of an amplifier chain 1 (In technical language, this is often referred to as a limiter) with an input E _L and with an output A _L , an FM / Φ demodulator 18 with an input E _Dem and an output A _Dem , a data evaluation circuit 19 (In technical language, this is often referred to as a data slicer) with an input E _S ⁽¹⁹⁾ and an output A _S ⁽¹⁹⁾ , consisting of a rectifier chain display of the radio reception strength 13 with an output A _F , an analog-to-digital converter 14 with an input E _ADC and an output A _ADC , a noise detector 15 with an input E _ND and with an output A _ND and a noise power evaluation device 16 (Slicer) with an input E _S ⁽¹⁶⁾ and with an output A _S ⁽¹⁶⁾ . The output A _{L of} the limiter 1 is connected to the input E _{D of} the FM / Φ demodulator 18 connected. The output A _{Dem of} the FM / Φ demodulator 19 is with the input E _S ^{(19) of the first} slicer 19 connected. Parallel to the limiter amplifier 1 is the rectifier chains - indication of the radio reception strength 13 arranged. The output A _F of the radio reception strength display 13 is to the input E _{ADF of} the analog-to-digital converter 14 connected. The output A _{ADC of} the analog-to-digital converter 14 is with the input E _{ND of} the noise detector 15 connected. The output A _{ND of} the noise detector 15 is with the noise power evaluation device 16 connected. The FM / Φ demodulator 18 , the data evaluation circuit 19 , the display of the radio reception strength consisting of a rectifier chain 13 , the analog-to-digital converter 14 , the noise detector 15 and the noise power evaluator 16 together form a signal detector 12d ,

The input E _{L of} the limiter amplifier 1 a frequency or phase modulated input signal S _{EL is} supplied. This may be, for example, a high-frequency radio signal directly converted into the low-frequency baseband without an intermediate stage (this radio signal will be referred to as Zero-IF-FM / φ signal; IF represents an acronym for Intermediate Frequency), FM represents an acronym for Frequency Modulation = frequency modulation and Φ represents an acronym for phase modulation = phase modulation) or an intermediate-converted (hereinafter referred to as IF-FM / Φ signal) radio signal act.

The gain of the limiter amplifier 1 is chosen so that at its output A _L always an amplitude-limited output signal S _AL , ie a essentially rectangular 1-bit signal with constant maximum signal amplitude corresponding to the limitation by the limiter 1 , is present. This 1 bit output signal S _AL . becomes the input E _{Dem of} the FM / Φ demodulator 18 fed as 1 bit input signal S _ESD . The FM / Φ demodulator 18 determines the data by evaluating the phase of the rising or falling edges of the quasi-rectangular 1-bit input signal S _ED and converts this into a corresponding amplitude fluctuation, which at the output A _{Dem of} the FM / Φ demodulator 18 as an output signal S is _{output to} it. This output signal S _ADem is the input E _S ^{(19) of} the slicer 19 which _converts this signal S _ADem into digital data by evaluating the amplitude by a threshold. At the output A _S ^{(19) of} the Slicers 19 Then the desired digital data are available.

Parallel to this signal conditioning by means of limiter 1 , FM / Φ demodulator 18 and slicer 19 another signal conditioning by means of limiter 1 , Display of the radio reception strength 13 , Analog-to-digital converter 14 , Noise detector 15 and slicer 16 ,

The limiter amplifier 1 comprises - as already indicated above - several series-connected amplifier stages. Each amplifier stage of the limiter 1 is connected to a rectifier whose outputs are connected in parallel (in the 5 this is not shown in the 5 shown connecting lines only suggest a coupling of the Begrenzerverstärkers 1 and the indication of the radio reception strength 13 at). At the output A _F of the radio reception strength display 13 is an analog signal, a so-called RSSI signal, tapped, which is a measure of the amplitude performance of the limiter or limiter 1 present signal E _L (in the presence) or noise. This RSSI signal is applied to the input E _{ADC of} the analog-to-digital converter 14 supplied to the output A _ADC a digitized signal is proportional to the noise power or signal power in the presence of the input at the Limiter. This digitized power signal becomes the input E _{ND of} the noise detector 15 supplied, which eliminates the DC component of the line signal by high / band pass filtering. At the output A _{ND of} the noise detector 15 This is a DC-free power signal, which in turn the input E _S ^{(16) of} the Slicers 16 is fed, which makes the evaluation by a barrier (Threshold), whether a noise or data signal at the limiter 1 is applied. At the output A _S ⁽¹⁶⁾ an indicator signal S _{I can be} tapped, which indicates whether the desired detected frequency or phase modulated signal FM / Φ signal S _D is present. It is expressly noted that the noise detector 15 and the slicer 16 can be considered together as a unit which serves only to judge performance which is greater or less than a predetermined limit.

As from the above results, the distinction between the useful signal and the noise signal based on the RSSI signal (RSSI = Acronym for Received Signal Strength Indicator). It is therefore imperative an indication of Radio reception strength required. If the further data or signal processing is digital In addition, an analog-to-digital converter (as used below) must be provided Abbreviation ADC is an acronym for Analogue Digital Converter dar), which converts the RSSI signal into a digitized one Data signal converted.

Even though the above-mentioned methods have basically proven themselves the need persists the simplification. Furthermore It should be noted that this method does not work for small amplitude FM / Φ signals suitable is.

The The object of the invention is a simple method for Distinction of a frequency-modulated or phase-modulated Useful signal from a noise signal and a corresponding circuit arrangement for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal, which also copes with small FM / Φ strokes.

These The object is achieved by a method having the features of the patent claim 1 and a circuit arrangement with the features of the claim 9 solved.

advantageous versions and further developments of the invention are specified in the subclaims.

The invention is based on a method and a circuit arrangement for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal, wherein the input signal is fed to an input of a Begrenzerverstärkers whose gain is selected so that at an output of this Begrenzerverstärkers an amplitude-limited 1 bit Output signal is present. In other words, the input signal of the limiter amplifier, for example a high-frequency radio signal (zero IF-FM / φ signal) directly converted into the low-frequency baseband without an intermediate stage or an IF-FM / Φ- implemented by means of an intermediate stage (eg at an intermediate frequency IF of 10.7 MHz) or low IF FM / Φ radio signal is amplified by the limiter amplifier so that the output in Begren goes.

The The invention is based on the recognition that the phase noise performance through the limiter amplifier is compressed, so is smaller, if the limiter amplifier with the reinforcement given above Input side, a useful signal is supplied.

at the method according to the invention Therefore, the amplitude-limited 1-bit output signal of the Begrenzerverstärkers on checked for phase noise. The Output signal of the limiter amplifier is classified as a useful signal, if the phase noise power of the amplitude limited 1 bit output signal falls below a predetermined threshold. From this statement it is concluded that the limiting amplifier input side, a useful signal, namely a data packet supplied has been.

Corresponding includes the circuit arrangement according to the invention a phase noise detector provided for limiting the amplitude 1 bit output signal of the limiter amplifier to a phase noise to check. He inventive circuit arrangement further comprises a noise power evaluation device, which is provided, the output and thus the input of the limiter amplifier exactly then classify as payload when the phase noise power of the amplitude-limited 1-bit output signal a predetermined Threshold falls below.

Of the size Advantage of this circuit is to avoid a Analog-to-digital converter for digital evaluation of the RSSI signal. Furthermore, the problem of detection of FM / φ signals also becomes with a small modulation index, i. small ratio of frequency deviation and modulator frequency, solved.

The amplitude limited 1 bit output signal is in a special preferred embodiment scanned to process it digitally.

to Realization of this preferred method has the circuit arrangement according to the invention a scanner, e.g. in the form of a bistable multivibrator (Flip-flop), which is formed, the amplitude-limited 1 bit output signal to be sampled at a predetermined sampling frequency.

As has already been indicated several times, it may be in the at the input of the limiter amplifier applied signal e.g. to one directly into the low-frequency baseband Intermediate high frequency radio signal (zero IF-FM / Φ signal), an IF-FM / Φ radio signal implemented by an intermediate stage or an intermediate IF low IF FM / φ radio signal act. Unless it's already in the low-frequency Baseband implemented zero-IF signal is a corresponding Implementation before the reinforcement through the limiter amplifier or after the reinforcement respectively. According to the invention, it is therefore provided the input signal or the amplitude limited 1 bit output signal or the abge sampled amplitude-limited 1-bit output signal in a Zero-IF signal (or if necessary in a Zero-IF signal) to convert. Such, but not in principle required implementation, depending on the application advantages in Signal processing process. For example, the implementation takes place into a zero-IF signal frequently, to enable low sampling rates or the conversion is done in an IF signal by DC offsets with one High pass filter.

to execution the implementation, the circuit arrangement according to the invention a Conversion, in particular a mixer, on which is provided, the input signal or the amplitude-limited 1 bit output signal or the sampled amplitude limited 1 bit output signal into a Zero IF signal or possibly a low IF signal to convert .

to noise reduction is in an advantageous embodiment provided that the amplitude-limited 1 bit output signal or the sampled amplitude limited 1 bit output signal or from the amplitude limited 1 bit output signal or the sampled one amplitude-limited 1 bit output signal converted Zero-IF output signal is filtered.

Device wise this step in a circuit arrangement according to the invention with the aid of a filter device, in particular with the aid of a Noise filter, implemented, which is intended to the amplitude-limited 1 bit output signal or the sampled amplitude limited 1 bit output signal or that from the amplitude-limited 1 bit output signal or converted to the sampled amplitude limited 1 bit output signal Zero-IF output signal to filter.

The above-described basic principle of phase noise detection and subsequent Evaluation or evaluation of the phase noise power determined in this case can be implemented in a variety of ways.

However, it has proven to be particularly easy to implement and reliable results delivering variant, the phase fluctuation of the amplitude-limited 1 bit Ausgangssig nals or the sampled amplitude-limited 1-bit output signal or the Zero-IF output signal or the filtered output signal into an amplitude fluctuation of a signal and then determine the power of the amplitude variation of the converted signal to obtain the phase noise performance.

at a particularly advantageous embodiment of the invention the circuit arrangement likewise comprises a conversion device, in particular a demodulator, which is intended to, the Phase variation of the amplitude-limited 1-bit output signal or the sampled amplitude limited 1 bit output signal or the zero-IF output signal or the filtered output signal to convert into an amplitude fluctuation of a signal. Farther a power detector is provided, which is intended the power of the amplitude fluctuation of the converted signal to determine the phase noise performance.

One the power of the amplitude fluctuation of the converted signal representing Signal leaves For example, determine that the converted signal is differentiated that of the differentiated signal the square or the absolute value is formed and that subsequently the the Absolute value forming signal is filtered.

Of the Power detector can for this purpose a differentiator, which is intended to differentiate the converted signal, a Absolutwertbildner, which is intended to the absolute value of the differentiated signal and another filter device, In particular, a finite-impulse-response filter, which include is intended to filter the signal forming the absolute value.

Further it has to be cheap proved when checking if the phase noise performance of the amplitude limited 1 bit output signal falls below a predetermined threshold thereby occurs that the filtered signal is compared with a threshold signal.

The Noise power evaluation device is, for example, accordingly trained, checking, whether the phase noise performance of the amplitude limited 1 bit output signal a predetermined threshold value falls short of a comparison of the filtered signal with a threshold signal.

Further it has proved to be advantageous if the threshold signal is specified by a user.

To For this purpose, the noise power evaluation device according to the invention has an adjustment device up, over which a user can specify the threshold signal.

The Invention will now be described with reference to the drawing. Show it:

1 FIG. 2: a block diagram of a first exemplary embodiment of a circuit arrangement according to the invention for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal,

2 1 is a block diagram of a second exemplary embodiment of a circuit arrangement according to the invention for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal,

3 FIG. 2 shows a block diagram of a third exemplary embodiment of a circuit arrangement according to the invention for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal,

• a) das Eingangssignal des Signaldetektors in Abhängigkeit von der Zeit und
• b) das Phasenrauschsignal und das Entscheidungssignal in Abhängigkeit von der Zeit zeigt, sowie

4 : various signals on the circuit arrangement according to the invention by the 3 predetermined transmission path, wherein

• a) the input signal of the signal detector as a function of time and
• b) shows the phase noise signal and the decision signal as a function of time, as well

5 : a block diagram of an embodiment of a circuit arrangement for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal according to the prior art.

The 1 shows a block diagram of a first embodiment of a circuit arrangement according to the invention for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal.

The circuit arrangement according to the invention is identical in parts, as described above and in 5 illustrated circuit arrangement according to the prior art. The circuit arrangement comprises a limiter amplifier consisting of an amplifier chain 1 with an input E _L and with an output A _L , a phase noise detector 2a with an input E _D and ei nem output A _D and a noise power evaluation 3 with an input E _S and an output A _S. The output A _{L of} the limiter amplifier 1 is to the input E _{D of} the phase noise detector 2a connected. The output A _{D of} the phase noise detector 2a is with the input E _{S of} the noise power evaluation device 3 connected. The phase noise detector 2a and the noise power evaluator 3 together form a signal detector 12a ,

The input E _{L of} the limiter amplifier 1 a frequency or phase modulated input signal S _{EL is} supplied. As already explained above, this may be, for example, a radio-frequency radio signal (zero IF-FM / φ signal) directly converted into the low-frequency baseband without an intermediate stage or a signal converted by means of an intermediate stage (hereinafter referred to as IF-FM / φ signal). Signal designated) radio signal act.

The gain of the limiter amplifier 1 is chosen so that at its output A _L always an amplitude-limited output signal S _AL , ie a substantially rectangular 1-bit signal with a constant maximum signal amplitude corresponding to the limitation by the Begrenzerverstärker 1 , is present. This 1-bit output signal S _AL is the input E _{D of} the phase noise detector 2a fed as 1 bit input signal S _ESD . The phase noise detector 2a determines the phase noise of the rising or falling edges of the quasi-rectangular 1-bit input signal S _ED and converts this into a corresponding amplitude fluctuation, which at the output A _{D of} the phase noise detector 2a is output as the output signal S _ASD . This output signal S _ASD becomes the input E _{S of} the noise power evaluation device 3 supplied, which classifies the output signal S _AL as a useful signal when the phase noise power of the amplitude-limited 1-bit output signal S _AL falls below a predetermined threshold. At the output A _{S of} the noise power evaluation device 3 is then the desired decision signal S _AD , which indicates whether the input side, a useful or data signal is present or whether only noise, possibly from the limiter amplifier 1 self-generated self-noise, which is fed to further signal processing.

The implementation of with reference to the 1 explained basic principle of the invention can be done in various ways.

The 2 shows a block diagram of a second embodiment of a circuit arrangement according to the invention for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal.

The circuit arrangement in turn comprises a limiter amplifier consisting of an amplifier chain 1 with an input E _L and with an output A _L , a phase noise detector 2 B with an input E _D and an output A _D and a noise power evaluation device 3 with an input E _S and an output A _S. The output A _{L of} the limiter amplifier 1 is to the input E _{D of} the phase noise detector 2 B connected. The output A _{D of} the phase noise detector 2 B is with the input E _{S of} the noise power evaluation device 3 connected.

The phase noise detector 2 B includes in the present embodiment, a scanning device 4 , eg a flip-flop, an FM / Φ demodulator 7 and a power detector B. The output of the flip-flop 4 is at the input of the FM / Φ demodulator 7 (In the figure, two connecting arrows are drawn in. This symbolizes that a transmission on several signal paths is possible, eg an arrow for IF / Low-IF signals or two arrows (I / Q-signal ) in Zero IF signals). The output of the FM / Φ demodulator 7 is connected to the input E _{PD of} the power detector 8th connected. The power detector 8th and the noise power evaluator 3 together form a signal detector 12b , The input E _{D of} the signal detector 12b is through the input E _{PD of} the power detector 8th , the output A _{D of} the signal detector 12b is determined by the output A _{S of} the noise power evaluation device 3 educated.

The input E _{L of} the limiter amplifier 1 is a frequency- or phase-modulated input signal S _EL , for example, implemented directly in the low-frequency baseband without intermediate high-frequency zero-IF-FM / Φ signal or implemented by means of an intermediate IF-FM / Φ- or low-IF-FM / Φ signal supplied.

The gain of the limiter amplifier 1 is again chosen so that at its output A _L always an amplitude-limited 1-bit output signal S _AL is applied. This 1-bit output signal S _AL is the input E _{D of} the flip-flop 4 supplied as a 1-bit input signal S _ESD , which samples the signal at a predetermined sampling rate to obtain a signal S _ALA with very steep signal edges.

The edges of the square wave signal S _ALA generated in this way have a phase jitter. This phase jitter is detected using the FM / Φ demodulator 7 converted into an amplitude fluctuation. This amplitude fluctuation lies as an input signal S _EPD at the input E _{PD of} the power output tektors 7 at. The power detector 8th determines the power of the amplitude fluctuation. Since the amplitude of the input signal S _{EPD is} proportional to the power, the power _detector generates 8th an output signal S _ASD proportional to the phase fluctuation of the sampled signal S _ALA . This output signal S _ASD becomes the input E _{S of} the noise power evaluation device 3 supplied, which classifies the output signal S _AL as a useful signal when the phase noise power of the sampled amplitude-limited 1-bit output signal S _ALA proportional output signal S _ASD falls below a predetermined threshold. At the output A _{S of} the noise power evaluation device 3 and correspondingly at the output A _{D of} the signal detector 12b is then the desired decision signal S _AD , which indicates whether the input side, a useful or data signal is present or whether only noise, possibly from the Begrenzerverstärker 1 self-generated self-noise, which is fed to further signal processing.

The 3 shows a block diagram of a third embodiment of a circuit arrangement according to the invention for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal.

The circuit arrangement in turn comprises a limiter amplifier consisting of an amplifier chain 1 with an input E _L and with an output A _L , a phase noise detector 2c with an input E _D and an output A _D and a noise power evaluation device 3 with an input E _S and an output A _S. The output A _{L of} the limiter amplifier 1 is to the input E _{D of} the phase noise detector 2c connected. The output A _{D of} the phase noise detector 2c is with the input E _{S of} the noise power evaluation device 3 connected.

The phase noise detector 2c includes as in the embodiment described above, a scanning device 4 , z. A flip-flop, an FM / Φ demodulator 7 and a power detector 8th , In addition, there is a mixer 5 as well as a noise filter 6 intended. The output of the flip flop 4 is with the entrance of the mixer 5 connected. The output of the mixer 5 is with the input of the noise filter 6 connected (Note: two arrows in the drawing figure again symbolize the possible transmission on several signal paths, see above). The output of the noise filter 6 is at the input of the FM / Φ demodulator 7 connected. The output of the FM / Φ demodulator 7 is connected to the input E _{PD of} the power detector 8th connected. The output A _{PD of} the power detector 8th at the same time forms the output A _{D of} the Pha senrauschdetektors 2c , Accordingly, the input of the scanner forms 4 the input of the phase noise detector 2c , The power detector 8th forms together with the noise power evaluation device 3 an FM / Φ signal detector 12c , The power detector 8th includes in the present embodiment, a differentiator 9 , an absolute value generator 10 and a finite-impulse-response filter 11 (the term FIR filter is often used as an acronym).

It is assumed that the input E _{L of} the limiter amplifier 1 As in the previous embodiments, a frequency or phase modulated input signal S _EL , for example, an implemented by means of an intermediate IF-FM / Φ signal (with an intermediate frequency IF of eg 10.7 MHz) is supplied.

The gain of the limiter amplifier 1 is again set so that the output signal S _{AL is} limited, ie that at the output A _{L is} a 1-bit output signal S _AL . This 1 bit output signal S _AL is the input of the scanner 4 supplied as a 1-bit input signal which samples the signal S _AL at a predetermined sampling rate to obtain a signal S _ALA with very steep signal edges.

The sampled output signal S _{ALA of} the limiter amplifier or limiter 1 becomes the entrance of the mixer 5 fed. This mixer 5 converts the sampled IF-FM / φ output signal S _ALA (with the intermediate frequency IF = 10.7 MHz) to the low-frequency baseband, thus generating a low-frequency zero-IF-FM / φ signal S _Zero-IF .

The flanks of the high-frequency zero-IF FM / φ signal S _Zero-IF generated in this way exhibit phase jitter, as does the square-wave signal S _ALA . This phase jitter of the high-frequency zero-IF FM / φ signal S _Zero-IF is detected by means of the FM / Φ demodulator 7 converted into an amplitude fluctuation. This amplitude fluctuation is present as an input signal S _EPD at the input E _{PD of} the power detector 8th (or corresponding to the input E _{D of} the FM / Φ signal detector 12c ) at.

4a ) shows the input signal E _{PD of} the power detector 8th plotted over time t. It is noticeable that the input signal S _EPD = S _ED in the time between t = 0 and t = 17.5 and between t = 28.5 and t = 48 between values of 60 and 190 and within the time interval between t = 17, 5 and t = 28.5 varies only between values of 110 and 150. Consequently, in the time between t = 17.5 and t = 28.5, the mean maximum signal amplitude is significantly smaller than in the rest of the time. Since the signal amplitude of the input signal S _EPD = S _{ED is} derived from the phase jitter, the phase jitter must have been lower in this time interval. From the realization that the phase noise performance by the Begrenzerverstärker 1 is compressed when this limiter amplifier 1 On the input side a useful signal is supplied, it can be concluded that in the time interval between t = 17.5 and t = 28.5 the Begrenzereingang E _L a useful signal was supplied. In order to provide the information as to whether a useful signal was supplied on the input side or whether only a noise signal is supplied to the further signal processing process, it is now sufficient to classify the different signals S _EPD = S _ED in the aforementioned time intervals.

For this purpose, the power detector determines 8th the power of the amplitude fluctuation. Since the amplitude of the input signal S _{EPD is} proportional to the power, the power _detector generates 8th an output signal S _ASD proportional to the phase fluctuation of the sampled signal S _ALA . This output signal S _ASD becomes the input E _{S of} the noise power evaluation device 3 supplied, which classifies the output signal S _AL as a useful signal when the phase noise power of the sampled amplitude-limited 1-bit output signal S _ALA proportional output signal S _ASD falls below a predetermined threshold.

Specifically, this is at the input E _{PD of} the power detector 8th applied input signal S _EPD with the aid of the differentiator 9 differentiated. A signal fluctuating around a zero point with a large signal amplitude is obtained in the time intervals between t = 0 and t = 17.5 and between t = 28.5 and t = 48 and with a comparatively small signal amplitude between t = 17.5 and t = 28 ; 5. This signal, which fluctuates around the zero point, becomes an absolute value generator 10 fed. Alternatively, a squarer could be used. The signal generated in this case is proportional to the magnitude of the phase noise of the limiter output signal S _AL or, more precisely, the sampled limiter output signal S _ALA and is therefore referred to below as the phase noise signal S _R.

The time course of the phase noise signal S _R is in the 4b ). This phase noise signal S _R fluctuates comparatively weakly in the time between t = 0 and t = 17.5 and between t = 28.5 and t = 48 by an average value of approximately 30. Within the time interval between t = 17.5 and t = 28.5, the phase noise signal S _R fluctuates around an average of 10. By defining a threshold signal S _th between these two values, the time intervals indicated above can be automatically distinguished from one another and a classification of the type described above can be made. To perform these operations, the noise power evaluator is 3 provided, which according to the classification a decision signal S _AD with smaller (no useful signal available) or large (useful signal available) outputs ( 4b )). The determination of the threshold value S _th can be made, for example, by a user.

In order to increase the discrimination security, the fluctuation amplitude of the phase noise signal S _R fluctuating around the mean values 10, 30 can be reduced with the aid of a suitable filter. In the present embodiment, the noise power evaluation device 3 therefore still another FIR filter 11 upstream.

1

limiter

2a

Phase noise detector

2 B

Phase noise detector

2c

Phase noise detector

3

Rauschleistungsauswerteeinrichtung

4

scanning

5

mixer

6

noise filter

7

demodulator

8th

power detector

9

differentiator

10

Absolute value

11

Finite Impulse Response Filters

12a

signal detector

12b

signal detector

12c

signal detector

12d

signal detector

13

display the radio reception strength

14

Analog-to-digital converter

15

noise detector

16

Rauschleistungsauswerteeinrichtung

17

adjustment

18

FM / Φ demodulator

19

Data evaluation circuit

A _ADC

output RD converter

A _D

output signal detector

A _Dem

output demodulator

A _F

output Display of the radio reception strength

A _L

output limiter

A _ND

output noise detector

A _PD

output power detector

A _S

output slicer

E _ADC

entrance AD converter

E _D

entrance signal detector

E _Dem

entrance demodulator

E _F

entrance Display of wireless success

E _L

entrance limiter

E _ND

entrance noise detector

E _PD

entrance power detector

E _S

entrance slicer

RSSI

Received Signal Strength Indicator

S _Abs

absolute value of the differentiated signal

S _AD

decision signal

S _ADem

output demodulator

S _AL

output limiter

S _ALA

sampled Output limiter

S _ASD

output signal detector

S _D

detected FM / ∅ signal

S _diff

differentiated signal

S _EDem

input demodulator

S _EL

input limiter

S _EPD

input power detector

S _ESD

input signal detector

S _Fil

filtered signal

S _I

indicator signal

S _R

Phase noise signal

S _th

threshold

S _ZERO-IF

on Zero IF down-mixed signal

Claims (16)

Method for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal (S _EL ), wherein the input signal (S _EL ) _{corresponds to} an input (E _L ) of a limiting amplifier ( 1 ) whose gain is selected so that at an output (A _L ) of the Begrenzerverstärkers ( 1 ) an amplitude-limited 1-bit output signal (S _AL ) is applied, characterized in that the amplitude-limited 1-bit output signal (S _AL ) is checked for phase noise and that the input signal (S _EL ) is classified as a useful signal when the phase noise power of the amplitude-limited bit output signal (S _AL ) _falls below a predetermined threshold (S _th ). Method according to Claim 1, characterized in that the amplitude-limited 1-bit output signal (S _AL ) is sampled. Method according to one of Claims 1 or 2, characterized in that the input signal (S _EL ) or the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _ALA ) are converted into a zero-IF signal (S _{zero). IF} ) is converted. Method according to one of the preceding claims, characterized in that the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _ALA ) or from the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _ALA ) filtered Zero-IF output signal (S _Zero-IF ) is filtered. Method according to one of the preceding claims, characterized in that the phase fluctuation of the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _ALA ) or the zero-IF output signal (S _Zero-IF ) or the filtered output signal ( S _Fil ) is converted into an amplitude fluctuation of a signal (S _ED ) and that the power of the amplitude fluctuation of the converted signal (S _ED ) is detected to obtain the phase noise power. A method according to claim 5, characterized in that the power of the amplitude variation of the converted signal (S _ED ) is determined by differentiating the converted signal (S _ED ), forming the absolute value of the differentiated signal (S _Diff ), and that the absolute value forming signal (S _Abs ) is filtered. Method according to Claim 6, characterized in that the check as to whether the phase noise power of the amplitude-limited 1-bit output signal (S _AL ) _falls below a predetermined threshold value (S _th ) is effected by the filtered signal (S _Fil ) being _supplied with a threshold signal (S _th ). is compared. A method according to claim 7, characterized in that the threshold signal (S _th ) is predetermined by a user. Circuit arrangement for distinguishing a frequency-modulated or phase-modulated useful signal from a noise signal in an input signal (S _EL ), with a limiter amplifier ( 1 ) having an input (E _L ) for supplying the input signal (S _EL ) and having an output (A _L ), the gain of the limiting amplifier ( 1 ) is selected so that at the output (A _L ) an amplitude-limited 1-bit output signal (S _AL ) is applied, characterized in that a phase noise detector ( 2a . 2 B . 2c ), which is intended to check the amplitude-limited 1-bit output signal (S _AL ) for phase noise and that a noise power evaluation device ( 3 ), which is intended to classify the input signal (S _EL ) as a useful signal when the phase noise power of the amplitude-limited 1-bit output signal (S _AL ) _falls below a predetermined threshold value (S _th ). Circuit arrangement according to Claim 9, characterized in that a scanning device ( 4 ) is provided, which is designed to sample the amplitude-limited 1-bit output signal (S _AL ). Circuit arrangement according to one of claims 9 or 10, characterized in that a converter, in particular a mixer ( 5 ), which are provided, the input signal (S _EL ) or the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _ALA ) into a Zero-IF signal (S _Zero-IF ) to convert. Circuit arrangement according to one of claims 9 to 11, characterized in that a filter device, in particular a noise filter ( 6 ), which is provided, which is provided, the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _ALA ) or from the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal ( S _ALA ) filtered Zero-IF output signal (S _Zero-IF ). Circuit arrangement according to one of claims 9 to 12, characterized in that a conversion device, in particular a demodulator ( 7 ), which is provided, the phase fluctuation of the amplitude-limited 1-bit output signal (S _AL ) or the sampled amplitude-limited 1-bit output signal (S _AZA ) or the zero-IF output signal (S _Zero-IF ) or the filtered output signal (S _Fil ) into an amplitude fluctuation of a signal (S _ED ) and that a power detector ( 8th ) which is provided to determine the power of the amplitude fluctuation of the converted signal (S _ED ) to obtain the phase noise power. Circuit arrangement according to Claim 13, characterized in that the power detector ( 8th ) a differentiator ( 9 ), which is intended to differentiate the converted signal (S _ED ), that the power detector ( 8th ) an absolute value former ( 10 ), which is intended to form the absolute value of the differentiated signal (S _Diff ) and that the power detector ( 8th ) further comprises a filter device, in particular a finite-impulse-response filter ( 11 ) which is arranged to filter the absolute value representative signal (S _Abs ). Circuit arrangement according to Claim 14, characterized in that the noise power evaluation device ( 3 ), the check is made as to whether the phase noise power of the amplitude-limited 1-bit output signal (S _AL ) _falls below a predetermined threshold value (S _th ) on the basis of a comparison of the filtered signal (S _Fil ) with a threshold signal (S _th ). Circuit arrangement according to Claim 15, characterized in that the noise power evaluation device ( 3 ) has an adjustment means by which a user can specify the threshold signal (S _th ).