DE102004028648B3 - Voltage measuring circuit has first transistor load path node connected via first current valve to load path with variable resistance, second node connected to voltage-controlled input of adder circuit whose output voltage can be detected - Google Patents

Abstract

The circuit arrangement measures a voltage (UAK) across a load section (DUT) with a variable resistance and has a transistor (S101) with a control connection connected to a first voltage supply (U2). A first connection of the transistor's load path is connected via a first current valve (D101) to the load path with the variable resistance. A second connection of the transistor's load path is connected, along with a connection of a second current valve (D102) connected to a second voltage source (U1), to a voltage-controlled input of an adder circuit (IC101) whose output voltage can be detected. An independent claim is also included for a device for monitoring a controllable power semiconductor.

Description

The The invention relates to a circuit arrangement for measuring an over one a changeable one Resistive load line with decreasing voltage a load path and a control terminal having transistor, whose control terminal is connected to a voltage source.

The The invention also relates to a device for monitoring a power semiconductor.

at a voltage monitoring switchable high-power semiconductors, such as insulated gate Bipolar transistors (IGBTs), through a gate turn-off thyristors (GTOs for Gate turn-off thyristors) or through a field effect transistor controlled thyristors (MCTs for MOS Controlled Thyristors) the problem occurs that over the High power semiconductors falling voltages in a range between a reverse voltage of several kV and a forward voltage vary from a few V additionally the voltage varies within a few microseconds. A Measuring circuit must have voltages with a large bandwidth over one Measuring range of three orders of magnitude can handle.

From particular interest in monitoring of the power semiconductor is its transmission behavior, based on which for example, by short circuits Overcurrents caused within a load circuit of the power semiconductor detected be that require a shutdown of the semiconductor. An overcurrent This can be based on an elevation of the above Power semiconductors falling voltage can be detected, since these with increasing current of the current flowing through the semiconductor Electricity increased. A voltage monitor has opposite a surveillance of the current has the advantage of having a circuit for measuring the voltage unlike a circuit for measuring the current at a Short circuit in the load circuit of the power semiconductor not from the flows through a very high short-circuit current, the destruction of can cause components used in the circuit.

For reliable monitoring the on-state behavior requires a measurement circuit which an override resistance in the area of reverse voltage over having the power semiconductor and in the range of the forward voltage enables a high measuring accuracy.

It is known, voltage dividers in a measuring circuit for monitoring of power semiconductors consisting of at least two in Series switched resistors exist, which connected in parallel to the high-power semiconductor are. By a voltage measurement on one of the resistors can doing so based on the known division ratio of the voltage divider the above the voltage of the power semiconductor voltage to be determined.

at a sufficiently large chosen division ratio is doing an oversteer prevents the actual voltage measuring device. The order However, has the disadvantage that a measurement signal in a measurement of Forward voltage due to the large division ratio very small and thus very susceptible to interference. A Voltage measurement, for example, by present electromagnetic Significantly affected fields, so an elaborate Shielding of the measuring circuit must be provided. In addition, will be possibly for processing the measurement results provided analog-to-digital converter by small Measurement signals used only in a subrange of their input voltage, whereby their accuracy is significantly reduced.

Out U.S. Patent No. 5,166,549 discloses circuitry for detecting a zero crossing of a voltage across a soft switching component forth. When the circuit is one with a load resistor connected in series load path of a transistor connected in parallel to the component, and at a control terminal of the transistor is at a gate voltage greater than a threshold voltage which is a conductive state of the transistor allows.

at very big Tensions over the transistor is completely switched off and the one above it Load resistance applied voltage corresponds to the gate voltage. When the voltage over However, the component sinks to a value lower than the Is gate voltage, the load path of the transistor becomes conductive, so that the voltage over the load resistance substantially of the falling over the component Voltage corresponds.

at This circuit is thus the load resistance or a instead of the load resistor or additionally introduced into the circuit arrangement Measuring device protected by the transistor from overdrive. To to a height a breakdown voltage of the transistor, the voltage is through the transistor is "blocked", and the one above Load resistance applied voltage is based on the value of the gate voltage limited.

The known from the US patent circuit arrangement thus allows a Überwa The transmission behavior of a power semiconductor, in which an overcurrent in the power semiconductor can be detected when the forward voltage exceeds a predetermined value. This is also limited by the gate voltage, since higher values for the forward voltage can not be measured.

at the use of this circuit for voltage monitoring, it is therefore necessary that the measured voltage very reliable to a given Value is limited, because at low peaks incorrectly a short circuit is detected in the load circuit of the power semiconductor.

A reliable Limitation of the measured voltage can in the known circuit arrangement however, only be ensured if a transistor with very low parasitic capacitances used becomes. Transistors with this property have only small Breakdown voltages that currently do not exceed values of a few 100 V

With Help the known circuit arrangement can be when using a MOSFET only components with a reverse voltage of currently at most Monitored 1.5 kV become. However, there are known circuit breaker, the reverse voltages of up to 6 kV or more.

Of the Invention is therefore based on the object, a generic circuit arrangement so to further develop that reliable monitoring of on-the-go behavior also for Power semiconductors are performed with a very high reverse voltage can. In particular, a reliable detection of short circuits in the load circuit Such power semiconductors are possible.

According to the invention this Task by a circuit arrangement according to claim 1 solved.

Appropriate further education the circuit arrangement are subject of the dependent claims 2 to 11th

According to the invention Task also solved by a device according to claim 12.

Appropriate further education the device are specified in the subclaims 13 and 14.

The In particular, the invention provides that a circuit arrangement for measuring a voltage over one changeable one Resistance load line with a one between two connections lying load path and a control terminal having transistor, whose control terminal is connected to a first voltage source is formed so that a series circuit with a second Voltage source, a first flow valve, the variable Resistance load line and a second flow control valve is included that a first terminal of the load path of the transistor over the first flow control valve with the load path with the variable Resistor is connected, and that a second terminal of the load path of the transistor and one connected to the second voltage source Connection of the second flow control valve with a voltage-controlled Input of an adder circuit are connected, whose output voltage is detectable.

Of the Transistor is connected by the inventive circuit with the first Current valve and the second voltage source effectively against overdriving by too big Voltage signal protected. As a flow valve can It uses all the electronic components that have at least two connections feature and at one polarity a voltage between the terminals conductive and at a other polarity the voltage are essentially non-conductive. As examples are here To name diodes and transistors. There are also flow valves for one Use in the circuit arrangement according to the invention in question, composed of several individual components are. The flow control valve can for example consist of several consecutively switched diodes or from a series connection of transistors or consist of diodes and transistors.

Conveniently, is the first flow valve in such a way with the second voltage source and the load range with the variable Connected resistor that it is conductive when the over this load path decreasing voltage is smaller than that of the second voltage source to disposal Asked voltage.

Preferably allows a supplied from the first voltage source control voltage a conductive State of the transistor.

The voltage provided by the second voltage source is advantageously in absolute value between a breakdown voltage of the first current valve and the control voltage of the transistor, so that it becomes conductive when the voltage drop across the load path with variable resistance below the magnitude a threshold voltage decreased control voltage of the transistor falls, but is locked when the falling across the load path with variable resistance voltage falls in magnitude below the voltage of the second voltage source and the flow valve is just conductive.

Thereby is achieved that the voltage measurement at the output of the adder circuit not by voltage peaks when Turning on the first flow control valve is impaired, as in particular in high-voltage diodes are usually observed.

in the conductive state of the transistor and negligible Resistance of its load distance differ over that Load range with variable Resistance decreasing voltage as well as a voltage between the second connection of the load path of the transistor and one not connected to the transistor connection of the load path with variable Resistance to one over the forward current dropping the first current valve.

By which is connected to the second terminal of the load path of the transistor and According to the invention, an adder circuit connected to the second current valve is one above the second flow valve falling forward voltage from the output voltage of the transistor subtracted, so that the output voltage of the adder circuit advantageously essentially over the load range with the variable Resistance falling voltage equals when over both Flow valves in terms of amount the same Forward voltage drops.

Conveniently, In this case, a voltage between an output of the adder circuit and the not connected to the transistor terminal of the load path with changeable Resistance detected as output voltage.

The over the Current valves falling forward voltages are through a Type of flow valves, an amperage of a current flowing through them as well as other operating parameters, such as an operating temperature certainly.

In a preferred embodiment of the circuit arrangement according to the invention Therefore, both flow valves are designed identical. In addition, the flow valves preferably maintained at the same operating temperature.

The inventive circuit arrangement Also, make sure that both flow valves are powered by a stream essentially the same current intensity be flowed through.

Consequently falls over both Current valves from a substantially same forward voltage.

It As a result, it is advantageously achieved that the output voltage of the Adder circuit over the load range with variable Resistance dropping voltage can be measured if this the control voltage of the transistor falls below.

The Flow control valves are in a further preferred embodiment the invention as diodes, preferably as high-voltage diodes, executed so that the circuitry in very simple and economical Way can be realized.

Advantageous the transistor has only low parasitic capacitances. In addition, the transistor is preferred designed as a voltage-controlled device. In a preferred embodiment the circuit is thus in the transistor a field effect transistor, for example a MOSFET.

The Using a voltage-controlled component has the advantage that only a current with very low current flows through it becomes, by the voltage measurement is hardly affected.

In a likewise advantageous embodiment of the circuit arrangement the transistor is designed as a bipolar transistor.

To the Protection of the transistor is in a preferred embodiment the circuit arrangement a Zener diode between the control terminal and one of the connections the load path of the transistor connected, which the voltage between these connections limited.

It is also preferred, the control terminal of the transistor with a Provide series resistor to the current flowing through the Zener diode current to limit, since this affects the voltage measurement.

Further It is advantageously provided that a diode connected via the series resistor which is preferably a fast diode. By this measure will be a charge time of a parasitic capacity between the first terminal of the transistor and its control terminal clearly decreases as the current to charge the capacitance through the conductive diode and not flowing through the resistor.

It is at this parasitic capacity around the so-called Miller capacity, which is considered intrinsic capacity at each Transistor occurs.

If the Miller capacity not loaded, increased an electrical potential at the control terminal of the transistor and therefore also the potential at the second output of its load path. A reliable one Limiting the measured voltage to a predetermined value would be through a delayed one Loading this capacity thus be affected due to the resistance at the control terminal, if it were not bridged by the diode.

The Adder circuit of the circuit arrangement is preferably as a connected as inverting amplifier operational amplifiers executed its inverting input via in each case a resistor with the load path of the transistor and is connected to the second flow control valve, and its non-inverting Input connected to a ground.

Thus, according to the invention a simple and compact circuit arrangement provided a particularly reliable voltage monitoring a load range with variable Resistance allows. In particular, the measured output voltage becomes reliable limits a given value.

at suitable choice of components, the circuit also works very fast, so that even rapidly varying voltages reliably measured can be.

In a preferred embodiment the circuit arrangement according to the invention is the load path with the variable resistance to one Load path of a power semiconductor, such as an IGBT or a GTO.

Next the illustrated circuit arrangement also provides the invention an advantageous device for monitoring a controllable Power semiconductor available, which is characterized in that it is a circuit arrangement according to the invention contains.

The Device is preferably with a comparator circuit for comparing the output voltage of the adder circuit with a reference voltage fitted.

Based the comparison of these voltages, for example, a short circuit in a load circuit of the power semiconductor at one opposite the Reference voltage excessive output voltage be recognized.

To the Protection of the power semiconductor, it is therefore intended that the Device has a control means for controlling the power semiconductor, with which the power semiconductor is switched off when the output voltage the adder circuit exceeds the reference voltage.

Further Advantages and appropriate training The invention will become apparent from the dependent claims and the following Representation of preferred embodiments the invention with reference to the figures.

From the figures shows

1 a circuit diagram of an embodiment of a circuit arrangement according to the invention,

2a another circuit diagram in the 1 shown embodiment of the circuit arrangement according to the invention, in which different voltages are shown,

2 B a diagram illustrating a time course of the voltages,

3 a circuit diagram of another embodiment of a circuit arrangement according to the invention and

4 a circuit diagram of a comparator circuit.

The The following representations describe exemplary preferred embodiments the invention. However, this is by no means on the illustrated embodiments limited.

That in the 1 shown circuit diagram shows the series connection of a DC voltage source U ₁ , a resistor R ₁₀₁ , a diode D ₁₀₁ , a load path of a measuring object DUT and a diode D _102nd

at The DUT may be a high power semiconductor, such as an IGBT or a GTO, act.

The Load path of such semiconductor is between two terminals, the for example, in GTOs usually as an anode and as a cathode and in the case of IGBTs as a collector and be referred to as emitter.

For the following representation of the circuit arrangement, the terms anode and cathode are adopted. In this case, in particular, the connection of the load path, which is connected to the diode D ₁₀₁ , as the anode and the connection, which is connected to the diode D ₁₀₂ , referred to as the cathode.

The DUT can be integrated into a load circuit in the circuit diagram is indicated.

The illustrated circuit arrangement is constructed such that an anode of the diode D _{101 is} connected via the resistor R ₁₀₁ to a positive pole of the voltage source U ₁ and a cathode of the diode D ₁₀₁ to the anode of the DUT. A cathode of the diode D ₁₀₂ is connected to a negative pole of the voltage source U ₁ and an anode of the diode D ₁₀₂ and the cathode of the DUT are connected to a ground 0. Diode D ₁₀₂ is operated in the pass band in this arrangement when U ₁ > 0.

The diodes D ₁₀₁ and D ₁₀₂ are designed to be identical in the illustrated circuit arrangement and are kept at the same temperature. If both diodes D ₁₀₁ and D _{102 are} applied to a common board, it is generally to be assumed that identical operating temperatures for the diodes D ₁₀₁ and D ₁₀₂ are present, without a temperature control being carried out. When using the circuit in an environment in which this is not the case, however, a temperature control is provided.

Instead of the diodes D ₁₀₁ and D ₁₀₂ , which are designed here as high-power diodes, can also be used identical switchable flow control valves, such as transistors. In order to block sufficiently high voltages, a series connection of several diodes is also possible.

In parallel with the DUT, a transistor S _{101 is} connected, which is an n-channel MOSFET, which is operated in a so-called source circuit. A drain terminal of the transistor S ₁₀₁ is connected via the diode D ₁₀₁ to the anode of the DUT. A gate terminal of the MOSFET S ₁₀₁ is connected to a positive pole of a DC voltage source U ₂ whose negative pole is connected to the ground.

The transistor S ₁₀₁ can likewise be designed, for example, as a JFET or as a bipolar transistor. In the following, however, the embodiment of the circuit arrangement with a MOSFET S _{101 is} considered.

The voltage source U ₂ is designed such that the voltage provided by it U _{2 is} above a threshold value U _{GS, th} the voltage u _GS between the gate and a source terminal of the MOSFET S ₁₀₁ , so that in one between the gate - And the source terminal of the MOSFET S ₁₀₁ lying p-doped bulk layer can form an inversion channel, the presence of which characterizes a conductive state of the MOSFET S ₁₀₁ .

The source terminal of the MOSFET S ₁₀₁ and the cathode of the diode D ₁₀₂ are each connected via resistors R ₁₀₃ and R ₁₀₄ to an inverting input - a voltage-controlled operational amplifier IC ₁₀₁ whose non-inverting input + is applied to ground 0 via a resistor R ₁₀₂ . Via a resistor R _{105 there} is a feedback between an output of the operational amplifier IC ₁₀₁ and the inverting input -.

The resistors R ₁₀₃ and R ₁₀₄ are the same size, so that the operational amplifier IC ₁₀₁ acts as an adder whose output voltage -u _mess between the output of the operational amplifier IC ₁ and the ground 0 a multiple of the negative sum of the source voltage u _{S of} the MOSFET S. ₁₀₁ corresponds between the source terminal of the MOSFET S ₁₀₁ and the ground 0 and an electrical potential related to the ground 0 at the cathode of the diode D ₁₀₂ . In the illustrated circuit arrangement, this potential has just a negative value of a forward voltage u _D2 dropping across the diode. The forward voltages are referred to below with the usual term for diode discharge voltage.

A gain results from the ratio R ₁₀₅ / R ₁₀₃ or R ₁₀₅ / R ₁₀₄ . For a direct measurement of the sum, which is assumed below, a gain of one is selected, for which the resistor R _{105 is selected to be the} same size as the resistors R ₁₀₃ and R ₁₀₄ . However, if unity gain is desired, it is also possible to choose a different ratio between the resistances. The resistor R ₁₀₂ in the present circuit should be about half as large as one of the resistors R ₁₀₃ , R ₁₀₄ and R ₁₀₅ .

The operation of the above-described circuit arrangement can be described in the following way:
The diode D ₁₀₁ becomes conductive only when the voltage u _AK across the DUT drops below the voltage U ₁ , so that the value of U _{1 represents} the maximum value of the voltage applied across the MOSFET S ₁₀₁ . Before higher voltages u _AK , the MOSFET S _{101 is} therefore protected by means of the diode D ₁₀₁ .

The diode D ₁₀₂ is permanently conductive in the illustrated circuit arrangement. However, a current only flows through this diode when the diode D _{101 is} conductive, since the circuit is otherwise interrupted.

A conductive state of the MOSFET S ₁₀₁ provides when the voltage u _GS exceeds the value U _{GS, th} , but this is especially possible only when a drain voltage u _D between the drain terminal of the transistor S ₁₀₁ and the ground 0 assumes a value at least equal to the value U _{GS, th is} less than the value of a gate voltage U _gate between the gate terminal of the MOSFET and the ground 0, which is given by the voltage U ₂ in the illustrated circuit arrangement. The load path of the MOSFET S ₁₀₁ thus becomes conductive when the value of the drain voltage u _{D of} the MOSFET S ₁₀₁ , which corresponds to the electrical potential at the anode of the diode D ₁₀₁ , is less than the value of the voltage U ₂ - U _{GS, th} ,

In the case of the conducting MOSFET S ₁₀₁ , a turn-on resistance R _{DS, on} a drain-source path of the MOSFET S _{101 is} small, so that the source voltage u _S , which serves as one of the input voltages of the operational amplifier IC ₁₀₁ to be added, essentially corresponds to the drain voltage u _D and thus substantially corresponds to the potential at the anode of the diode D ₁₀₁ .

It is thus to be noted that a voltage -u _mess between the output of the operational amplifier IC ₁ and the mass 0 in terms of magnitude either by the voltage U ₁ or the voltage U ₂ - U _{GS, th is} limited, depending on which of these voltages is smaller.

If the voltage u _AK across the DUT falls below the lower value of these two voltages, then both the diode D ₁₀₁ and the MOSFET S _{101 are} conducting and the voltage u _mess corresponds to the voltage u _AK across the DUT.

The value of the source voltage u _{S of} the MOSFET S ₁₀₁ corresponds to the voltage u _AK , which is increased by a forward voltage u _{D1 of} the diode D ₁₀₁ . The diode D ₁₀₂ has the forward voltage u _D2 , which assumes the same value as the forward voltage u _D1 , so that the addition of the source voltage u _S and the potential at the cathode of the diode D ₁₀₂ influences the effects of the forward voltages u _D1 and u _{D2 be} compensated for the value of the voltage u _mess .

The forward voltage of a diode shows a dependence on the type of diode, its operating temperature and the current intensity of the current flowing through it. In the illustrated circuit arrangement with identical diodes D ₁₀₁ and D _102nd are held at the same temperature and applied with a substantially equal current, it is ensured that the forward voltages u _D1 and u _D2 assume the same value. The resistors R ₁₀₃ and R ₁₀₄ are chosen to be so large in particular that the currents of the currents flowing through them are negligibly small compared to those of the currents flowing through the diodes D ₁₀₁ and D ₁₀₂ , so that substantially identical current strengths in both diodes D ₁₀₁ and D ₁₀₂ occur.

When switching on diodes, in particular high-voltage diodes, large voltage fluctuations usually occur. So that the voltage u _{mess is} not influenced by the voltage fluctuations, it is provided that the voltage source U _{1 be designed} so that the voltage provided by it is greater than the voltage U ₂ .

Idealized temporal courses of several tensions between different points within in the 1 are shown in the circuit 2 B shown. In the diagram in the 2a is shown, between which points the tensions exist, whose course in the 2 B is shown.

Dash-dotted lines in the diagram in the 2 B show the time course of the constant voltages U ₁ and U ₂ .

As soon as the voltage u _AK across the DUT falls below the constant voltage U ₁ at the time t ₁ , the diode D ₁₀₁ begins to conduct, and a current flows through that with the resistor R ₁₀₁ , the diode D ₁₀₁ the DUT and the Diode D ₁₀₂ formed circuit. As a result, the voltage u _D2 across the diode D ₁₀₂ increases in magnitude by the forward voltage of the diode D ₁₀₂ , so that the voltage u _mess at the output of the operational amplifier also increases by the forward voltage u _D2 .

The MOSFET S ₁₀₁ is non-conductive until a time t ₂ . The source voltage u _S takes on the value U ₂ -U _{GS, th} up to this time, and the drain voltage u _D corresponds to the anode potential of the diode D ₁₀₁ . With non-conducting diode D ₁₀₁ , that is to say until time t ₁ , the drain voltage u _D thus has the value U ₁ , and with conducting diode D _{1 it} corresponds to the voltage u _AK, increased by the forward voltage u _D1 = u _D2 .

At time t ₂ , the drain voltage u _D drops below the value U _{2 -U GS, th} , so that the MOSFET S ₁₀₁ becomes conductive. The source voltage u _S is then just as large as the drain voltage u _D and the voltage u _mess just follows the voltage u _AK , wherein the flux voltages u _D1 and u _{D2 of} the diodes D ₁₀₁ and D ₁₀₂ corresponding contributions to the voltage u _mess just compensate.

At a time t ₃ , the voltage u _D again exceeds the value U _{2 -U GS, th} , so that the MOSFET S ₁₀₁ transitions to the non-conductive state. Diode D ₁₀₁ turns off at time t ₄ when u _AK becomes greater than U ₁ .

It is in the illustrated circuit thus a so-called. Voltage magnifier whose output is only in a certain range corresponds to the input voltage.

The 3 shows a circuit diagram of another embodiment of the circuit arrangement according to the invention. The voltage and resistance values given in the following description of this circuit arrangement and the type designations given for the individual components are to be understood as examples. The invention is by no means limited to these values and types.

A voltage supply takes place in the illustrated circuit by a single AC voltage source U ₃₀₁ . The AC voltage is converted by a diode D ₃₀₁ , D ₃₀₂ , D ₃₀₃ and D ₃₀₄ and a capacitor C ₃₀₁ existing two-phase diode rectifier in a DC voltage u ₃₂ . In order to avoid fluctuations in the voltage u ₃₀₂ , the capacitor C _{302 has} a sufficiently large capacitance of, for example, 10 μF.

A measuring circuit is realized here by the series connection of connected to the ground 0 diode D ₃₀₆ , the rectifier, the resistors R ₃₀₁ , R ₃₀₂ and R ₃₀₃ , the diode D ₃₁₀ and in turn connected to the ground 0 DUT. The diodes D ₃₀₆ and D ₃₁₀ , which the diodes D ₁₀₁ and D ₁₀₂ in the 1 Corresponding circuit arrangement correspond, are designed as identical high voltage diodes, for example of the type BY8410 and are kept at the same temperature. This is ensured by the fact that there are no temperature differences on the board, which contains the circuit shown.

The maximum current flowing through the measuring circuit at a given voltage u ₃₀₂ is limited, in particular by a suitable dimensioning of the resistors R ₃₀₁ , R ₃₀₂ and R _303, to a value at which a maximum forward current of the diodes D ₃₀₆ and D ₃₁₀ , which in the case of diodes of the the aforementioned type is 5 mA, is not exceeded. There are three resistors used to limit the current, because the dielectric strength of a single resistor is not sufficiently high. In the case of an alternating voltage U ₁ , which may be in the range from 80 V to a few 100 V and, for example, 200 V, a total resistance of R ₃₀₁ + R ₃₀₂ + R ₃₀₃ 90 kΩ was selected here.

It has also proved to be advantageous to switch the resistor R ₃₀₉ between the diode D ₃₁₀ and the resistor R ₃₀₃ , or between the diode D ₃₁₀ and the MOSFET S ₃₀₁ . The resistor R ₃₀₉ preferably has about 300 Ω. However, it is also possible to dispense with this resistance.

The voltage supply of the gate terminal of the MOSFET S ₃₀₁ with a conductive state of the MOSFET S ₃₀₁ enabling voltage U _gate is based on the voltage divider formed by the resistors R ₃₀₄ , R ₃₀₅ and R ₃₀₆ . These resistors have, for example, values of R ₃₀₄ = 100 kΩ and R ₃₀₅ = R ₃₀₆ = 22 kΩ. A capacitor C ₃₀₂ with a sufficiently large capacitance of, for example, 1 μF stabilizes the gate voltage U _Gate and in addition a parallel to the capacitor C ₃₀₂ connected zener diode D ₃₀₇ , for example of the type BZX84C27, is provided which the gate voltage U _gate to a predetermined Value limited, for example, 27V.

The MOSFET S ₃₀₁ satisfies in this circuit the same function as the MOSFET S ₁₀₁ in the in the 1 illustrated circuit arrangement. A MOSFET S _{301 of} the type BSP125 was used here, which is characterized by a dielectric strength of up to 600 V and because of its small spatial dimensions by very small parasitic capacitances. A maximum permissible voltage u _GS for this type is 14V.

To limit the voltage u _GS , a further zener diode D ₃₀₉ , for example of the type BZX84C12, is provided which is connected in parallel with the gate-source path of the MOSFET S ₃₀₁ ; the gate terminal of the MOSFET S ₃₀₁ is also provided with a series resistor R ₃₀₈ . By the diode D ₃₀₉ , the voltage u _DS, for example, limited to 12 V, with a residual voltage across the resistor R ₃₀₈ drops. It is thereby prevented that the voltage u _GS at very small values of the source potential exceeds the permissible value and the MOSFET S _{1 is} destroyed.

The resistance R ₃₀₈ assumes as large a value as possible, for example 100 kΩ, so that a current flowing through the diode D ₃₀₉ is so small that it does not appreciably affect the measurement result.

However, due to the necessarily large resistance R ₃₀₈ , a charging time of a parasitic Miller capacitance present between the drain and gate of MOSFET S ₃₀₁ increases significantly. With an increase of the drain voltage U _D at the drain terminal of the MOSFET S _301, the potential at the gate terminal and therefore also the source voltage u _S at the source terminal of the MOSFET S but ₃₀₁ This is to be limited to the predetermined value increases during this charging time, which fast in particular a Increase in drain voltage u _D not guaranteed due to the excessive loading time of the Miller capacity is done.

It is therefore intended to switch a diode D _{308 in} parallel with the resistor R ₃₀₈ so that a charging current for charging the Miller capacitance does not flow through the resistance R ₃₀₈ , which limits the amperage of the charging current, but through the diode D ₃₀₈ which is connected with its anode to the gate terminal of the MOSFET S ₃₀₁ .

In order to ensure a sufficiently large current for charging the Miller capacitance even with a very rapid increase in the potential at the drain terminal of the transistor, the diode D ₃₀₈ is a fast diode, for example of the MURS160 type.

Analogous to that in the 1 3, the cathode of the diode D ₃₀₆ and the source terminal of the MOSFET S _{301 are} connected via resistors R ₃₁₂ and R ₃₁₁ to the inverting input - an operational amplifier IC ₃₀₁ whose non-inverting input + is connected to ground 0 via the resistor R ₃₁₀ , For example, an LM7171 operational amplifier IC _{301 is} used, which is a fast operational amplifier characterized in particular by a large 200 MHz gain bandwidth product and a high slew rate of 4100 V / μs. The resistors R ₃₁₂ and R ₃₁₁ are adapted to the requirements of the operational amplifier IC ₃₀₁ and are chosen to be equal in size to implement the adder circuit. For example, they have a value of 10 kΩ or more. The feedback between the output and the inverting input - of the operational amplifier takes place via the resistor R ₃₁₂ , which has the same value as the resistors R ₃₁₁ and R ₃₁₂ . The resistance R ₃₁₀ between the non-inverting input + of the operational amplifier IC ₃₀₁ and the ground O is, for example, about half as large as the resistors R ₃₁₁ , R ₃₁₂ and R ₃₁₃ .

The output voltage u _{mess of} the operational amplifier IC ₃₀₁ results in an analogous manner, as already with reference to the 2a and 2 B was explained.

Since the components of the circuit arrangement shown may be in close spatial proximity to the switched high-power semiconductor DUT, the measurement signal u _mess at the in the 3 shown circuit filtered by a first order RC low-pass filter to filter out high-frequency couplings caused by switching operations. The low-pass filter is implemented here by the resistor R ₃₁₅ and the capacitor C ₃₀₃ and has, for example, a time constant of 1 μs. The output voltage is the voltage u _mess2 .

The voltage signal u _mess or the signal u _mess2 are now suitable for further processing within a device for monitoring power semiconductors. Since it is a very compact circuit, it is particularly suitable for use within a measuring head, which can be connected, for example, to a circuit containing a power semiconductor.

From particular interest in monitoring of power semiconductors is a detection of short circuits in the load circuit of the power semiconductor, as a result of the short circuit arising large currents destroy the power semiconductor can. Such short circuits can do it at an elevation of Forward voltage of the power semiconductor can be detected.

It is therefore provided that the device for monitoring the power semiconductor in addition to the basis of the 3 illustrated circuitry includes a comparator circuit, by means of which the voltage u _{mess2 is compared} with a reference voltage U _Ref .

A circuit diagram of one embodiment of this comparator circuit is shown in FIG 4 shown. The reference voltage U _Ref is provided in this circuit arrangement by means of a potentiometer adjustable from the resistors R ₄₀₁ , R ₄₀₂ and R ₄₀₃ existing voltage divider with a downstream capacitor C ₄₀₁ , wherein above the voltage divider an input voltage U _e is applied.

The voltages U _Ref and u _mess2 form the input voltages for a comparator IC ₄₀₂ , which is for example a fast comparator of the type LM319. In particular, the voltage u _mess2 at the inverting input - and the voltage U _Ref at the non-inverting input + of the operational amplifier IC _{401 are applied} . In order to avoid possible oscillation of the operational amplifier IC ₄₀₁ , a positive feedback resistor R _{406 is connected} between the noninverting input + of the operational amplifier IC ₄₀₁ and its output. The resistance R ₄₀₆ causing a switching hysteresis has, for example, a value of 100 kΩ. The input resistors R ₄₀₅ and R ₄₀₆ are the same size and have, for example, a value of 10 kΩ.

As the output voltage of the operational amplifier IC ₄₀₁ results in the voltage u _Komp , which corresponds to a difference of the input voltages in the above-described wiring.

In connection with the comparator circuit, the circuit arrangement according to the invention is suitable especially for use within a driver stage for controlling a power semiconductor. To protect the power semiconductor, it can be provided in particular that this is turned off when the output voltage u _{comp of} the operational amplifier IC ₄₀₁ amount exceeds a predetermined threshold.

0

Dimensions

+

Not inverting input of an operational amplifier

-

inverting Input of an operational amplifier

C _k

Capacitor with capacitance C _k (k = 301, 302, 303, 401)

D _l

diode (l = 101, 102, 301, 302, ..., 310)

DUT

measurement object (Device Under Test)

IC _n

Operational amplifier (n = 101, 301, 401)

R _m

resistance (m = 101, 102, ..., 105, 301, 302, ..., 315, 401,

402 406)

S ₁₀₁

MOSFET

S ₃₀₁

MOSFET

t

Time

t _q

time (t = 1, ..., 4)

U ₁

Voltage source with terminal voltage U ₁

U ₂

Voltage source with terminal voltage U ₂

U ₃₀₁

AC voltage source

u ₃₀₂

supply voltage

u _AK

over one Load path decreasing voltage

u _d

drain voltage

u _D1

Forward voltage of the diode D ₁

u _D2

Forward voltage of diode D ₂

U _e

input voltage

U _gate

gate voltage

u _GS

tension between a gate and a source

U _{GS, th}

Threshold for the voltage u _GS

u _comp

output voltage an operational amplifier

u _mess

output voltage an operational amplifier

u _mess2

filtered Output voltage of an operational amplifier

U _ref

reference voltage

u _s

source voltage

Claims (14)

Circuit arrangement for measuring a voltage (u _AK ) via a load resistor (DUT) having a variable resistance with a transistor (S ₁₀₁ , S ₃₀₁ ) having a load path and a control terminal, whose control terminal is connected to a first voltage source (U ₂ , U _gate ) characterized in that a series connection with a second voltage source (U ₁ , U ₃₀₁ ), a first flow control valve (D ₁₀₁ , D ₃₁₀ ), the variable resistance load line (DUT) and a second flow control valve (D ₁₀₂ , D ₃₀₆ ) is included, that a first terminal of the load path of the transistor (S ₁₀₁ , S ₃₀₁ ) via the first flow control valve (D ₁₀₁ , D ₃₁₀ ) to the load path (DUT) is connected to the variable resistor, and that a second terminal of the load path of the transistor (S ₁₀₁ , S ₃₀₁ ) and connected to the second voltage source (U ₁ , U ₃₀₁ ) connection of the second flow control valve (D ₁₀₂ , D ₃₀₆ ) with a spannungsge controlled input of an adder circuit (IC ₁₀₁ , IC ₃₀₁ ) are connected, whose output voltage (u _mess ) can be detected. Circuit arrangement according to claim 1, characterized in that the first flow control valve (D ₁₀₁ , D ₃₁₀ ) and the second flow control valve (D ₁₀₂ , D ₃₀₆ ) are identical. Circuit arrangement according to one of Claims 1 and 2, characterized in that the current valves (D ₁₀₁ , D _102, D ₃₀₆ , D ₃₁₀ ) are diodes. Circuit arrangement according to one of the preceding claims, characterized in that it is the transistor (S ₁₀₁ , S ₃₀₁ ) is a field effect transistor. Circuit arrangement according to one of claims 1 to 3, characterized in that it is the transistor (S ₁₀₁ , S ₃₀₁ ) is a bipolar transistor. Circuit arrangement according to one of the preceding claims, characterized in that a Zener diode (D ₃₀₉ ) is connected between the control terminal of the transistor (S ₃₀₁ ) and one of the terminals of its load path. Circuit arrangement according to one of the preceding claims, characterized in that the control input of the transistor via a resistor (R ₃₀₈ ) to the voltage source (U _gate ) is connected. Circuit arrangement according to one of the preceding claims, characterized in that a diode (D ₃₀₈ ) is connected in parallel with the resistor (R ₃₀₈ ) between the control terminal and the first voltage source (U _gate ). Circuit arrangement according to one of the preceding claims, characterized in that the adder circuit as an operational amplifier connected as a reverse amplifier (IC ₁₀₁ , IC ₃₀₁ ) is executed, whose inverting input (-) via a respective resistor (R ₁₀₃ , R ₃₁₁ , R ₁₀₄ , R ₃₁₂ ) with the load path of the transistor (S ₁₀₁ , S ₃₀₁ ) and with the second flow control valve (D ₁₀₁ , D ₃₀₆ ), and whose non-inverting input (+) is connected to a ground (0). Circuit arrangement according to one of the preceding claims characterized in that it is in the load path (DUT) with variable Resistor around the load path of a power semiconductor, for example an IGBT or a GTO. Circuit arrangement according to one of the preceding claims, characterized in that the output voltage (u _mess ) of the adder circuit (IC ₃₀₁ ) by a low-pass filter (R ₃₁₅ , C ₃₀₃ ) is filtered. Device for monitoring a controllable power semiconductor (DUT), characterized in that a circuit arrangement according to one of the preceding claims is. Apparatus according to claim 12, characterized in that a comparator circuit (IC ₄₀₁ ) for comparing the output voltage (u _mess ) of the adder circuit with a reference voltage (U _Ref ) is included. Device according to one of claims 12 and 13, characterized in that a control means for controlling the Leistungshalblei ester (DUT) is included, with which the Leistungshableiter (DUT) is switched off when the output voltage (u _mess ) of the adder circuit (IC ₁₀₁ , IC ₃₀₁ ) exceeds the reference voltage (U _Ref ).